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Understanding Delta-Sigma Data Converters

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TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

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Citations
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Journal ArticleDOI

Correlated Dual-Loop Sturdy MASH Continuous-Time Delta-Sigma Modulators

TL;DR: In this paper , a delta-sigma modulator (DSM) was proposed to combine the advantages of both the traditional multi-stage noise shaping (MASH) and sturdy MASH (SMASH) architectures.
Journal ArticleDOI

Technique to Improve SNR for Sigma Delta Adcs for Audio Signals

TL;DR: A RISR architecture for Sigma-delta analog to digital converters with modified noise transfer function to obtain a better performance in terms of SNR is proposed and it is noted that SNR of 115dB is achieved by cascading of two Modified second order RISR architectures which is 8dB more than the normal RISR Architecture.
Journal ArticleDOI

An Intrinsically Linear 13-Level Capacitive DAC for Delta Sigma Modulators

TL;DR: In this article , an intrinsically linear 13-level DAC with Switched-Capacitor (SC) was proposed and the DAC architecture was used in a discrete-time modulator, but could also be employed in a Continuous-Time DSM (CTDSM).
Proceedings ArticleDOI

A 0.18 µm high resolution bandpass delta-sigma modulator for acceleration transducer applications

TL;DR: In this paper, a low-power high-resolution band-pass ΔΣ modulator for acceleration transducer applications is presented, which is fabricated in 0.18 µm 1P6M CMOS process with a core area of 1.47 mm2.
Proceedings ArticleDOI

Low-frequency analog signal distribution on digital photonic networks by optical delta-sigma modulation

TL;DR: By using a clock and data recovery circuit at the receiver to reduce jitters, the single-sideband phase noise of the generated signals can be significantly reduced.
References
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Journal ArticleDOI

A higher order topology for interpolative modulators for oversampling A/D converters

TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI

Decimation for Sigma Delta Modulation

TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI

An analysis of nonlinear behavior in delta - sigma modulators

TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI

The Structure of Quantization Noise from Sigma-Delta Modulation

TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI

A fourth-order bandpass sigma-delta modulator

TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.