Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
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Journal Article•
01 Jan 2014-International Journal of Advanced Research in Electrical, Electronics and Instrumentation Energy
TL;DR: This paper explains Field-programmable gate array (FPGA) based digital control of DC-DC phase shifted full bridge converter operating at very high switching frequency.
Abstract: This paper explains Field-programmable gate array (FPGA) based digital control of DC-DC phase shifted full bridge converter operating at very high switching frequency. To achieve required high switching frequency, theoretically very high clock frequency is needed but how to achieve with less clock frequency has been shown here. The implementation in FPGA includes control algorithm and hybrid Digital Pulse Width Modulator (DPWM). Microsemi’s Proasic3E FPGA is used for implementation with 32 MHz clock frequency to achieve required 1 MHz switching frequency.
Cites methods from "Understanding Delta-Sigma Data Conv..."
...The Δ-Σ operation is based on the well known noise-shaping concept which is used in analog-to-digital and digital-to-analog converters [14], [15]....
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01 Jan 2016
TL;DR: Today's complex electronic systems with billions of transistors on a single die are enabled by the aggressive scaling down of the device feature size at an exponential rate as predicted by the Moor…
Abstract: Today's complex electronic systems with billions of transistors on a single die are enabled by the aggressive scaling down of the device feature size at an exponential rate as predicted by the Moor ...
01 Jan 2011
TL;DR: This chapter shows how cycle length maximization through architecture modification can be applied to two important classes of multi-bit modulators, namely higher order Error Feedback Modulators (EFMs) and Single-Quantizer DDSMs (SQ-DDSMs).
Abstract: In this chapter, we show how cycle length maximization through architecture modification can be applied to two important classes of multi-bit modulators, namely higher order Error Feedback Modulators (EFMs) and Single-Quantizer DDSMs (SQ-DDSMs).
DOI•
TL;DR: In this article , the authors investigated a flexible millimeter-wave sigma-delta-over-fiber based transmitter solution with digital beamforming MISO and MIMO functionality.
Abstract: Millimeter-wave and multiple-input-multiple-output (MIMO) technologies combine broad bandwidth with spatial diversity to offer a greater data rate. This paper investigates a flexible millimeter-wave sigma-delta-over-fiber based transmitter solution with digital beamforming MISO and MIMO functionality. Those functions are controlled by a central unit connecting a remote radio head with a standardized QSFP28 fiber link. The central unit generates binary encoded intermediate frequency signals using bandpass sigma-delta modulation. The QSFP28 based fiber link transmits the intermediate frequency bitstreams to the remote radio head. The remote radio head consists of a QSFP28 module, 90$^\circ$ hybrids, and upconverters. The remote radio head feeds four parallel, independent, coherent, and central-unit controlled 28 GHz signals to a linear array transmitting antenna. The transmitter performance is experimentally verified, demonstrating up to 800 Msym/s at an EVM/NMSE of 6.7%/−23.5 dB when tested with a 64 quadrature amplitude modulation (64-QAM) modulation scheme. Digital over-the-air beamforming MISO functionality is demonstrated up to 700 Msym/s across 1 m wireless distance. MIMO communication capabilities is demonstrated by over-the-air transmission of two independent 500 Msym/s to two spatially separated receivers. The results show that the proposed link can be used for realization of scalable, low-cost and flexible transmitter solution for emerging distributed antenna systems.
DOI•
TL;DR: In this article , a DAC-free filter-bank multi-carrier (FBMC) signal generation scheme is proposed and experimentally investigated in a red light-emitting diode-based VLC system.
Abstract: Digital-to-analog converters (DACs) are widely used in bandwidth-limited visible-light communication (VLC) systems for high spectral-efficiency multi-carrier signal generation. To reduce the implementation complexity of the transmitter, a digital 1-bit low-pass delta-sigma modulation (DSM)-enabled DAC-free filter-bank multi-carrier (FBMC) signal generation scheme is proposed and experimentally investigated in a red light-emitting diode-based VLC system. In this scheme, one field programmable gate array gigabit transceiver in combination with a low-pass filter is employed to realize the 609 MHz baseband FBMC signal generation. Besides, a low-complexity fast Walsh-Hadamard transform (FWHT)-based interleaved block precoding (IBP) technique is also proposed to reduce peak-to-average power ratio and achieve a uniform signal-to-noise ratio profile, and then improve the bit error rate (BER) performance. The experimental results exhibit that the net data rate of 2.38-Gbit/s 16-ary quadrature amplitude modulation-encoded FBMC signal, generated by the proposed scheme, can transmit 2.3-m free space with the BER less than 3.8×10-3. With the help of the FWHT-IBP technique, about 2-dB improvement in receiver sensitivity is achieved. In addition, the proposed scheme can provide a slight improvement in the BER performance, compared to the conventional DAC-based FBMC-VLC.
References
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TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations