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Understanding Delta-Sigma Data Converters
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TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.Abstract:
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.read more
Citations
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Dissertation
Design of Noise Shaping Filters in ΔΣ Modulators for Quantization Error Reduction
TL;DR: In this paper, the authors propose a 3.3-approximation algorithm for the 3.1-GHz bandit-16.3 GHz frequency bandit model, and
Proceedings ArticleDOI
A 78.20dB SNDR CT Sigma-Delta Modulator Achieving 40.6fJ/conv
TL;DR: A 3rd-order 3-bit continuous-time Sigma-Delta modulator clocked at 512MHz, suitable for direct-conversion receivers, and implemented in 65nm CMOS process.
Proceedings ArticleDOI
A 1-1 MASH using two Noise-Shaping Switched-Capacitor Dual-Slope converters
TL;DR: Noise-shaping dual-slope converters show an interesting property which can be exploited in MASH converters and this property is utilized in this paper by building an audio bandwidth 1-1 MASH using two switched-capacitor dual- slope converters.
Architectures for Maximum-Sequence-Length Digital
TL;DR: This paper extends the idea developed in some of the earlier works of using output feedback to make the quantiza- tionstep inadigitaldelta-sigma modulator (DDSM) appearprime, and shows how this concept can be applied to multibit higher order error-feed- back modulators (EFMs).
Book ChapterDOI
Very Low OSR Sigma-Delta Converters
TL;DR: This chapter investigates ΣΔ modulators and incremental A/D converters at low oversampling ratios and a sample 8th-order cascaded architecture is demonstrated for both topologies.
References
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Journal ArticleDOI
A higher order topology for interpolative modulators for oversampling A/D converters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI
Decimation for Sigma Delta Modulation
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI
An analysis of nonlinear behavior in delta - sigma modulators
Sasan H. Ardalan,J.J. Paulos +1 more
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI
The Structure of Quantization Noise from Sigma-Delta Modulation
James C. Candy,O. Benjamin +1 more
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI
A fourth-order bandpass sigma-delta modulator
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.