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Understanding Delta-Sigma Data Converters

TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

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Citations
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Journal ArticleDOI
TL;DR: This paper presents techniques to detect, digitize, denoise and classify a certain set of analytes, and demonstrates signal denoising using a discrete wavelet transform based technique.
Abstract: Environmental monitoring relies on compact, portable sensor systems capable of detecting pollutants in real-time. An integrated chemical sensor array system is developed for detection and identification of environmental pollutants in diesel and gasoline exhaust fumes. The system consists of a low noise floor analog front-end (AFE) followed by a signal processing stage. In this paper, we present techniques to detect, digitize, denoise and classify a certain set of analytes. The proposed AFE reads out the output of eight conductometric sensors and eight amperometric electrochemical sensors and achieves 91 dB SNR at 23.4 mW quiescent power consumption for all channels. We demonstrate signal denoising using a discrete wavelet transform based technique. Appropriate features are extracted from sensor data, and pattern classification methods are used to identify the analytes. Several existing pattern classification algorithms are used for analyte detection and the comparative results are presented.

24 citations

Proceedings ArticleDOI
24 May 2009
TL;DR: A 2W filterless class-D amplifier using multi-level delta-sigma modulation is presented to achieve high efficiency and high performance without the use of a filter.
Abstract: A 2W filterless class-D amplifier using multi-level delta-sigma modulation is presented. LC filters consume large PCB space and add significant system cost, so filterless class-D solutions are preferred for portable applications. In this design, a multi-level, delta-sigma modulator is implemented to achieve high efficiency and high performance without the use of a filter. Although the modulator internally generates an 8MHz clock, the average switching frequency of output signal is dynamically reduced to 300kHz to minimize switching loss. Analog feedback from the output stages along with common-mode control yields 0.003% total harmonic distortion, and 103dB dynamic range.

24 citations

Journal ArticleDOI
TL;DR: This work shows that ΔΣ modulators can be interpreted as heuristic solvers for a particular class of optimization problems, and proposes a novel technique to deal with very large unconstrained discrete quadratic programming (UDQP) problems characterized byquadratic forms entailing a circulant matrix.
Abstract: We show that ΔΣ modulators can be interpreted as heuristic solvers for a particular class of optimization problems. Then, we exploit this theoretical result to propose a novel technique to deal with very large unconstrained discrete quadratic programming (UDQP) problems characterized by quadratic forms entailing a circulant matrix. The result is a circuit-based optimization approach involving a recast of the original problem into signal processing specifications, then tackled by the systematic design of an electronic system. This is reminiscent of analog computing, where untreatable differential equations were solved by designing electronic circuits analog to them. The approach can return high quality suboptimal solutions even when many hundreds of variables are considered and proved faster than conventional empirical optimization techniques. Detailed examples taken from two different domains illustrate that the range of manageable problems is large enough to cover practical applications.

24 citations


Additional excerpts

  • ...We start by providing a set of formal definitions and properties regarding the optimization problems being tackled and the signal processing tools exploited to this aim....

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Journal ArticleDOI
TL;DR: The proposed architecture in low power Delta-Sigma modulators is studied and a noise-shaped two-step ADC is presented to achieve high order noise shaping with minimal design complexity.
Abstract: A noise-shaped two-step ADC is presented in this paper. This ADC exploits residue feedback and a new capacitor/opamp sharing scheme to achieve high order noise shaping with minimal design complexity. The application of the proposed architecture in low power Delta-Sigma modulators is studied in this paper. A prototype ADC is fabricated in a 0.18 μm CMOS process. With a 1.56 MHz bandwidth (8x OSR), 2.6 mW analog power consumption, and 1.2 V analog supply voltage, the measured dynamic range and SNDR of this prototype IC are 78 dB and 75 dB.

24 citations

Journal ArticleDOI
TL;DR: In this article, the authors demonstrate wavelength locking of a hybrid CMOS-silicon photonics ring-based transmitter using a 40 nm CMOS circuit to directly monitor the optical modulation amplitude (OMA) at the drop port of the ring modulator.
Abstract: Silicon micro-ring modulators have the potential to enable energy efficient, high-bandwidth-density optical interconnects in CMOS compatible silicon technologies. However, their operation is highly susceptible to any thermal, laser wavelength or process variations and, as such, require a feedback control system for guaranteeing stable modulation. This paper demonstrates wavelength locking of a hybrid CMOS-silicon photonics ring-based transmitter using a 40 nm CMOS circuit to directly monitor the optical modulation amplitude (OMA) at the drop port of the ring modulator. OMA stabilization with an accuracy of $\sim {0.125}\,\,\,^{\circ }\text {C}$ or within $\sim $ 2% of the maximum OMA), a tracking speed of 5 nm/s ( $\sim {62.5}\,\,^{\circ }\text {C}$ /s), and a tuning range of 5 nm ( $\sim {62.5}\,\,^{\circ }\text {C}$ ) is demonstrated by subjecting the photonic transmitter both to thermal and laser wavelength variations under dynamic modulation at 2 Gbps. The demonstrated wavelength locking concept is also robust to the variations in the input laser power and can be implemented with low power.

23 citations


Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...Therefore, this is indeed a delta modulator-based negative feedback loop wherein the average value of λe is minimized (and thus, VOMADP is maximized) by the high gain at low frequency provided by the counter [41], [42]....

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References
More filters
Journal ArticleDOI
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >

399 citations

Journal ArticleDOI
James C. Candy1
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.

342 citations

Journal ArticleDOI
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.

284 citations

Book ChapterDOI
James C. Candy1, O. Benjamin1
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.

255 citations

Journal ArticleDOI
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >

211 citations