Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
More filters
TL;DR: In this article, a digitized vibration detector implemented by CMOS digitized capacitive transducer with in-plane silicon-on-insulator (SoI) accelerometer is newly proposed.
Abstract: In this paper, a digitized vibration detector implemented by CMOS digitized capacitive transducer with in-plane silicon-on-insulator (SoI) accelerometer is newly proposed. The proposed digitized vibration detector is attractive due to the fact that all the circuits and the sensor can be robustly and compactly combined together. A total solution including the continuous-time-voltage (CTV) analog sensing circuits and digitalized interface are proposed in this paper. Based upon 0.35-μm 2P4M CMOS technology with 3 V power supply, all the functions and performance of the proposed CMOS digitized capacitive transducer are successfully tested and proven through measurements and confirmed it to be applied on the in-plane SoI accelerometer. The sensitivity of the proposed CTV analog sensing circuits is 50.488 mV/g and maximum nonlinearity is 2.5% over the excitation of 0.25-5.75-g intensity. The peak signal-to-noise-plus-distortion ratio of the proposed digitized vibration detector is 67.6 dB under excitation of 3.25-g intensity. The proposed digitized vibration detector is suitable for digitized accelerometer applications, such as automobiles, consumer electronics, Wii game player, and so on.
16 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...In order to consider the degradation of the achievable DR [33] and circuit non-idealities, an OSR of 256 and n of 4 are...
[...]
...resolution, such as multi-loop cascade, multibit, high-order single-loop single-bit, etc [33]....
[...]
TL;DR: In this paper, the authors identify the cause of distortion and quantify its amplitude and frequency in a single carrier environment, and show that offsets less than 1% of the carrier frequency are required to keep unwanted components 40 dB below the signal level.
Abstract: High-efficiency linear radio frequency (RF) power amplifiers are needed for today’s wireless
communication systems Switch mode techniques have the potential for high efficiency but require a pulse
drive signal The generation of pulse width modulated signals and pulse position modulated signals by sigma
delta modulators can introduce unwanted spectral components Third order and image components are the
dominant distortions generated in the pulse position modulation circuit The authors identify the cause of
distortion and mathematically quantify its amplitude and frequency In a single carrier environment, an
increase in offset frequency increases the unwanted spectral components Calculations, simulations and
measurements show that offsets less than 1% of the carrier frequency are required to keep unwanted
components 40 dB below the signal level Simulations and measurements show that the effect on a multichannel
orthogonal frequency division multiplexing (OFDM) system is less detrimental Nonetheless,
unacceptable noise increases of up to 20 dB are observed in odd harmonic channels when the transmission is
not centred on the nominal carrier frequency
16 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...2 shows the block diagram of the proposed Cartesian Σ∆ which consists of two secondorder lowpass Σ∆s (MOD 2) [12], amplitude and phase quantisers and a ‘polar to PWM/PPM’ block....
[...]
TL;DR: An efficiency optimization procedure of burst-mode multilevel transmitters for signals with high PAPRs and signals at variable transmit power levels and the obtained optimum threshold value can be applied to Doherty and multistage Doherty PAs to achieve maximum transmitter efficiency.
Abstract: The utilization of a burst-mode power amplifier (PA) together with pulse-width modulation (PWM) is a promising concept for achieving high efficiency in radio frequency (RF) transmitters. Nevertheless, such a transmitter architecture requires bandpass filtering to suppress side-band spectral components to retrieve the wanted signal, which reduces the transmit power and the transmitter efficiency. High efficiency can only be expected with the maximum transmit power and signals with low peak-to-average-power ratios (PAPRs). To boost efficiency for signals with high PAPRs and signals at variable transmit power levels, the burst-mode multilevel transmitter architecture has been widely discussed as a potential solution. This paper presents an efficiency optimization procedure of burst-mode multilevel transmitters for signals with high PAPRs and signals at variable transmit power levels. The impact of the threshold value on the transmitter efficiency is studied, where the optimum threshold value and the maximum transmitter efficiency can be obtained according to input magnitude statistics. In addition, the relation between the threshold value and the efficiency expression of burst-mode multilevel transmitters and those of Doherty PAs is investigated. It is shown that the obtained optimum threshold value, although originally designed for burst-mode transmitters, can also be applied to Doherty and multistage Doherty PAs to achieve maximum transmitter efficiency. Simulations are used to validate the efficiency improvement of the optimized burst-mode multilevel transmitters compared to two-level and non-optimized multilevel transmitters.
16 citations
Cites methods from "Understanding Delta-Sigma Data Conv..."
...In order to drive such burst-mode PAs in an efficient way, appropriate modulation techniques such as modulation [15], [16] and pulse-width modulation (PWM) [17]–[19] are employed to encode the envelope-varying input signal into bursts with constant envelope, where the duty-cycle varies depending on the magnitude information of the input...
[...]
TL;DR: An intuitive high-level argument is presented suggesting that direct-sampling radio frequency (RF) receivers using Nyquist analog-digital converters can be as power-efficient as analog heterodyne receivers for equal dynamic range specifications, at least at lower RF frequencies well below the ft of the IC process.
Abstract: An intuitive high-level argument is presented suggesting that direct-sampling radio frequency (RF) receivers using Nyquist analog–digital converters can be as power-efficient as analog heterodyne receivers for equal dynamic range specifications, at least at lower RF frequencies well below the $f_{t}$ of the IC process. System planning for direct-sampling receivers is reviewed, highlighting dBFS/Hz as an intrinsic measure of dynamic range, independent of channel and Nyquist bandwidths. Power dissipation versus dynamic range for recently reported heterodyne and direct-sampling receivers is examined.
16 citations
Cites methods from "Understanding Delta-Sigma Data Conv..."
...) The Schreier figure-of-merit (FoM) [7] for ADC power dissipation is scaled by the ratio of PFS to noise floor, and is therefore a good measure of the suitability of an ADC for use in radio receiver front ends...
[...]
05 Dec 2005
TL;DR: In this paper, the first implementation results for a time-interleaved continuous-time /spl Delta/spl Sigma/ modulator are presented, which achieves an SNDR of 57dB and 49dB in signal bandwidths of 10MHz and 20MHz, respectively.
Abstract: This paper presents the first implementation results for a time-interleaved continuous-time /spl Delta//spl Sigma/ modulator. The 3rd-order low-pass modulator operates at an oversampling ratio of 5 with a time-interleaving factor of 2 at sampling frequencies of 100MHz and 200MHz. It achieves an SNDR of 57dB and 49dB in signal bandwidths of 10MHz and 20MHz, respectively.
16 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Typically, continuous-time modulators are able to operate two to four times faster than their discrete-time counterparts, but with lower accuracy and linearity [2]....
[...]
References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations