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Understanding Delta-Sigma Data Converters

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TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

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Citations
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Journal ArticleDOI

A Low Switching Noise and High-Efficiency Buck Converter Using a Continuous-Time Reconfigurable Delta-Sigma Modulator

TL;DR: A delta-sigma modulation control scheme for buck converters that features a reconfigurable loop filter with a scalable sampling frequency for effective switching noise reduction and high conversion efficiency is presented.
Journal ArticleDOI

Single-Bit All-Digital Frequency Synthesis Using Homodyne Sigma-Delta Modulation.

TL;DR: All-digital frequency synthesis using bandpass sigma-delta modulation to achieve spectrally clean single-bit output is presented and mathematically analyzed resulting in a complete model to predict the stability and output spectrum.
Journal ArticleDOI

Design and Implementation of a Rail-to-Rail 460-kS/s 10-bit SAR ADC for the Power-Efficient Capacitance Measurement

TL;DR: The specifications of ADC are optimized at system level, emphasizing the ADC following a switched-capacitor capacitance-to-voltage (C2V) converter, to be compatible to the output of C2V, and a bootstrap switch with body effect reduction is adopted to provide the rail- to-rail processing ability.
Journal ArticleDOI

A Delta-Sigma Pulse-Width Digitization Technique for Super-Regenerative Receivers

TL;DR: The proposed architecture is capable of suppressing the PW quantization error over the direct-sampling-type PW detector by 23 dB, and a linear model for the ΔΣ-PWD is devised in this paper for system analysis and design optimization.
Proceedings ArticleDOI

Semidefinite Programming in Analysis and Optimization of Performance of Sigma-Delta Modulators for Low Frequencies

TL;DR: It is shown that after various convex relaxations this problem can be set up as a semidefinite program and several second order Sigma- Delta modulators are designed and their performances are compared with a benchmark Sigma-Delta modulator.
References
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Journal ArticleDOI

A higher order topology for interpolative modulators for oversampling A/D converters

TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI

Decimation for Sigma Delta Modulation

TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI

An analysis of nonlinear behavior in delta - sigma modulators

TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI

The Structure of Quantization Noise from Sigma-Delta Modulation

TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI

A fourth-order bandpass sigma-delta modulator

TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.