Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
More filters
TL;DR: Initial analysis of the measurement data shows an effective resolution in the range of 18-19 bits at an equivalent sampling rate of 64 kHz, and the integral nonlinearity error of the system was measured to be within plusmn7 muV/V or one least significant bit at this resolution.
Abstract: This paper describes a sampling system designed using a commercial sigma-delta analog-to-digital converter (Sigma-Delta ADC). In addition to characterization measurements using a conventional high-quality signal generator, a Josephson waveform synthesizer that provides ultimately noise- and drift-free voltages was used. To evaluate the suitability of this sampling system as part of a transfer power standard, additional comparisons of the root-mean-square (RMS) values measured were performed against a thermal converter and the primary power sampling standard at the Physikalisch-Technische Bundesanstalt, Braunschweig, Germany. Initial analysis of the measurement data shows an effective resolution in the range of 18-19 bits at an equivalent sampling rate of 64 kHz. The integral nonlinearity error of the system was measured to be within plusmn7 muV/V or one least significant bit at this resolution.
13 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...S IGMA–DELTA analog-to-digital converters (Σ–Δ ADCs) have recently become more attractive for high-precision sampling applications due to their improved low-noise characteristics, high resolution, and low nonlinearity [1]....
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...Boltzmann’s constant, T is the absolute temperature, and C is the input capacitance [1]....
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01 Jan 2008
TL;DR: Results from a prototype current-DAC driven by a VHDL simulation of the digital design at 2.66 GHz show that 56-dB linearity is achievable in 90-nm CMOS within a 1-V supply over a 155-MHz signal bandwidth making the architecture suitable for emerging ultra-wide-band and 60-GHz radio applications.
Abstract: This paper describes a delta-sigma ( ) digital-to- analog converter (DAC) architecture that combines a polyphase de- composition of the interpolation filter and a time-interleaved error- feedback modulator. Noise-shaped oversampling is achieved while clocking the digital circuitry at the Nyquist rate. The de- sign of a third-order 4-bit modulator with eight times oversam- pling using the architecture is presented. Results from a prototype current-DAC driven by a VHDL simulation of the digital design at 2.66 GHz show that 56-dB linearity is achievable in 90-nm CMOS within a 1-V supply over a 155-MHz signal bandwidth making the architecture suitable for emerging ultra-wide-band and 60-GHz radio applications.
13 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...3 is very efficient but sensitive to inaccuracies in the loop filter [11]....
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TL;DR: A system for measuring optical proximity based on reflection of modulated light based on synthesized inductance provides readouts with a resolution better than 13.2 ENOB, which allows the sensor system to be flexibly used also for heart rate and blood oximetry monitoring.
Abstract: A system for measuring optical proximity based on reflection of modulated light is presented. Its novel input stage topology comprising an ac coupled TIA and a two stage dc rejection circuit based on a synthesized inductance, provides readouts with a resolution better than 13.2 ENOB. This allows the sensor system to be flexibly used also for heart rate and blood oximetry monitoring.
13 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...The basic formula for the lowest achievable power of the input referred noise in the ADC, including the improvement due to the double sampling of the input signal, is [9]...
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...the differential input signal of the first integrator is double sampled and the charge transferred to the first integrator is also doubled improving the SNR, usually limited by the input referred thermal noise [9], [10]....
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01 Jan 2018
TL;DR: In this article, the authors investigate the output noise and distortion of high-power, digitally controlled switchmode (Class-D) amplifiers for precision positioning and motion applications, and the resulting implications on important sources of Noise and distortion within such systems are carefully and comprehensively analyzed.
Abstract: I semiconductor structures continuously shrink in size and grow in complexity, driven by the incessant digitization of our everyday lives. Likewise, the corresponding industrial manufacturing tools and processes keep pushing technological limits to achieve this feat, for example with the upcoming adoption of extreme ultraviolet lithography, which facilitates semiconductor technology node sizes below 10 nm. Thus, nanometer-precision mechatronic positioning systems are essential tools for this industry. They are used for various applications, such as the positioning and moving of semiconductor wafers in lithography, inspection, or other manufacturing processes. Different electromagnetic actuators, like permanent magnet linear motors or magnetically levitating bearings, are employed. The forceand torqueproducing electric currents of these actuators must be free of noise and other unwanted signal components to prevent the generation of undesired forces that otherwise lead to positioning errors. Thus, shrinking semiconductor features and more complex manufacturing processes demand an increasing accuracy and precision of the positioning actuators and their corresponding driving currents. Similarly, the demand for a high manufacturing throughput increases the required actuator output powers. Traditionally, the desired low-noise and low-distortion actuator currents are provided by linear amplifiers due to their inherently low output noise. However, the achievable power conversion efficiencies are limited and high output powers cannot be generated in the vicinity of precision motion systems due to thermal constraints. Hybrid amplifiers, which combine a linear amplifier with a switch-mode power electronic converter, strive to alleviate these restrictions. Nonetheless, such systems are more complex and require careful tuning to achieve the desired load current quality. This thesis investigates output noise and distortion of high-power, digitally controlled switch-mode (Class-D) amplifiers for precision positioning and motion applications. Such power converters feature simple and scalable topologies, which reduces development time and cost. The resulting implications on important sources of noise and distortion within such systems are carefully and comprehensively analyzed. Amplifier constituents that critically affect noise and distortion are identified and optimized. Extensive measurements on smalland full-scale hardware prototypes verify the findings. In a first step, suitable and modern wide-bandgap power electronic switching devices and converter topologies are analyzed, using detailed computer circuit simulations that model both the electrical and thermal power transistor
13 citations
15 Jun 2008
TL;DR: The motivation for using pulse-density modulation (PDM) to achieve linear amplitude modulation of a nominally nonlinear switching power amplifier achieves linearity suitable for wideband wireless standards, with peak efficiency of 43.5% at 1.95 GHz and up to 20 dBm output power.
Abstract: Switching processes such as pulse-width and pulse-density modulation have been used for many years in power electronics applications. Due to rapid scaling of semiconductor technology, similar approaches may be successfully applied to blocks in the radio architecture. This work outlines the implementation of a class-D power amplifier for RF applications in low-GHz frequency bands. We describe the motivation for using pulse-density modulation (PDM) to achieve linear amplitude modulation of a nominally nonlinear switching power amplifier. The amplifier achieves linearity suitable for wideband wireless standards, with peak efficiency of 43.5% at 1.95 GHz and up to 20 dBm output power. The system generates amplitude-modulated waveforms with up to 20 MHz envelope bandwidth, demonstrating the validity of this approach for modern communication standards.
13 citations
References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations