Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
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24 Jun 2014
TL;DR: In this paper, a novel approach for data-compression using Delta-sigma modulator (ΔΣ-M) and applies it to design bit-stream based controllers.
Abstract: This paper proposes a novel approach for data-compression using Delta-sigma modulator (ΔΣ-M) and applies it to design bit-stream based controllers. An adaptive scheme is introduced to automatically determine the upper and lower boundaries of the quantizer of the ΔΣ-M. The stability condition of the feedback control system with embedded ΔΣ-M is derived analytically based on sliding mode analysis. The effectiveness of the proposed controller is illustrated experimentally by designing hybrid bit-stream based feedback controller to control the position of a D.C. motor. Experimental results from a laboratory prototype illustrate that the adaptive ΔΣ-M with the feedback controller effectively controls the systems while consuming less significant channels interfaces between the measurement device and the controller.
12 citations
Cites background or methods from "Understanding Delta-Sigma Data Conv..."
...the channel between modulator and demodulator which limits its uses [7]....
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...For example, deltamodulator (△-M), which is essentially a differential coding method, had been extensively used in voice communication [6], analog to digital (A/D) convertor [7] and switch mode power supply (SMPS) [8]....
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TL;DR: A sigma-delta-type digital converter suitable for a resistive-potentiometer-type displacement sensor with a floating slide is presented here and results obtained from simulation studies, emulation studies, and experimentation conducted on a prototype sensor establish the efficacy of the proffered scheme.
Abstract: A sigma–delta-type digital converter (SDC) suitable for a resistive-potentiometer-type displacement sensor with a floating slide is presented here. The delta modulator in a conventional SDC is suitably altered to incorporate, as its integral part, a resistive-potentiometer-type displacement sensor with a floating slide. The operation of the 1-b quantizer in the SDC is modified such that the digital output of the SDC directly indicates the displacement being sensed. The results obtained from simulation studies, emulation studies, and experimentation conducted on a prototype sensor establish the efficacy of the proffered scheme.
12 citations
Cites methods from "Understanding Delta-Sigma Data Conv..."
...Since its inception in the early 1960s, sigma–delta ADC (SDADC) has evolved and now stands as a popular method for high performance and high precision analogto-digital conversion [8]....
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23 Dec 2010
TL;DR: In this paper, a method to extract the necessary saliency information without applying test signals is proposed and analyzed based on oversampling techniques and uses the information that appears in current sensor signals during the switching transients.
Abstract: Controlling an ac machine without speed or position sensor at zero frequency requires the extraction of its inherent or engineered saliencies. This extraction is currently linked to injected high frequency or transient test signals that are superposed to the fundamental wave. These test signals also affect noise emission, maximum inverter output voltage, and switching frequency. Different methods for an integration of the test signal injection into the fundamental wave excitation have been made, however a full integration in all operating states is still not possible. In this paper a method to extract the necessary saliency information without applying test signals is proposed and analyzed. It is based on oversampling techniques and uses the information that appears in current sensor signals during the switching transients. Different realizations are presented and their performance compared with respect to changes in the operating parameters. It is shown by measurement results that applying the proposed techniques it is possible to obtain the saliency information necessary for speed sensorless control.
12 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...See for example [16] for a more detailed description....
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TL;DR: A 22-bit read-out integrated circuit (IC) is constructed from a capacitively coupled instrumentation amplifier (CCIA) followed by an incremental delta-sigma analog-to-digital converter (ADC), both of which have programmable gain.
Abstract: A 22-bit read-out integrated circuit (IC) is constructed from a capacitively coupled instrumentation amplifier (CCIA) followed by an incremental delta-sigma ( $\Delta \Sigma $ ) analog-to-digital converter (ADC), both of which have programmable gain. The CCIA has a cascode Miller-compensated differential difference amplifier (DDA) with clamp transistors for energy efficiency. The offset and 1/ $f$ noise of the fully differential read-out IC are suppressed by chopping and correlated double sampling (CDS) techniques, which are synchronized with sampling by the ADC. Residual low-frequency noise is reduced by the second-order system-level chopping technique with an on-chip moving-averaged finite impulse response (FIR) filter. Implemented in a standard 0.13- $\mu \text{m}$ CMOS process, the read-out IC achieves a maximum effective resolution (ER) of 21.9 bit, an integral nonlinearity (INL) of 7 ppm, and a 1/ $f$ corner of 40 $\mu $ Hz. The chip draws only 142 $\mu \text{A}$ from 3-V supply and 18 $\mu \text{A}$ from the 1.5-V supply, and it has an active area of 0.65 mm2 including digital filter.
12 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Since the first integrator is the most critical block of the ADC, the design of its amplifier has to take account of IRN and sampling error [26], [27]....
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14 Sep 2016
TL;DR: Delta-Sigma-Umsetzer sind aus der Audio-Technik fur ihren hohen Signal-zu-Rausch Abstand bei Abtastraten im 10 bis 100 kHz Bereich bekannt and werden zunehmend auch in der Stromregelung of elektrischen Antrieben als Analog-Digital-UMSetzer eingesetzt as discussed by the authors.
Abstract: Delta-Sigma-Umsetzer sind aus der Audio-Technik fur ihren hohen Signal-zu-Rausch Abstand bei Abtastraten im 10 bis 100 kHz Bereich bekannt und werden zunehmend auch in der Stromregelung von elektrischen Antrieben als Analog-Digital-Umsetzer eingesetzt Delta-Sigma-Umsetzer bestehen aus einem Modulator und einem digitalen Tiefpassfilter Die Auswirkungen des digitalen Filters auf die Stromregelung eines elektrischen Antriebs werden hinsichtlich der erreichbaren Bandbreite des Stromregelkreises und der Unterdruckung von Storungen in der Strommessung untersucht In dieser Arbeit werden zwei Ansatze zur Steigerung der Bandbreite des Stromregelkreises verfolgt Der Stromregler wird direkt in dem hochfrequenten Zeitraster (10 MHz) der Delta-Sigma-Modulatoren gerechnet, so dass auf einen digitalen Tiefpassfilter verzichtet werden kann Dieses Vorgehen erfordert eine neuartige Signalverarbeitung, da der Ausgang des Delta-Sigma-Modulators aus einem gering quantisierten Delta-Sigma-Bitstrom mit einer Auflosung von einem Bit besteht Die vorhandenen Ansatze zur direkten Signalverarbeitung des Delta-Sigma-Bitstroms werden verglichen und erweitert Der zweite Ansatz zur Steigerung der Bandbreite besteht darin, die hochfrequenten Delta-Sigma-Bitstrome breitbandig in PWM Signale fur eine Leistungselektronik im 4 - 40 kHz Bereich umzusetzen Das grundsatzliche Prinzip wird an einer einphasigen Last untersucht Die im Stand der Forschung bekannte Losung fur eine dreiphasige Last weist erhebliche Nachteile auf In dieser Arbeit wird ein Verfahren fur einen hochdynamischen dreiphasigen Leistungselektronik-Modulator zur direkten Verarbeitung von Delta-Sigma-Bitstromen vorgestellt, welcher die Nachteile der bekannten Losung aufhebt
Zusatzlich wird eine direkte Ruckfuhrung der Strom- und Spannungsmesswerte uber Delta-Sigma-Bitstrome realisiert Dies ermoglicht eine hochdynamische Strom- und Spannungsregelung einer permanenterregten Synchronmaschine
12 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Der Integrator im digitalen Filter verstärkt Rauschen und Offsets, die durch die Übertragung des Bitstroms entstehen können [60]....
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...Das Maß der Überabtastung wird durch die Überabtastrate (auf englisch oversampling ratio OSR) definiert [60]....
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...Die Differenzengleichung des Bitstromausgangs y(ν) als Linearkombination der Eingangsgröße u(ν) und dem Quantisierungsfehler dq(ν) ergibt nach [60] y(ν) = u(ν − 1) + dq(ν)− dq(ν − 1)....
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...Ein einfacher digitaler Filter ist dementsprechend ein Mittelwertbilder [60], welcher das Verhältnis von Nullen und Einsen bildet und damit Gleichung (2....
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...11 zeigt die modifizierte Struktur [60] mit der folgenden Führungs- und Störübertragungsfunktion:...
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References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations