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Journal ArticleDOI

Void formation on ultrathin thermal silicon oxide films on the Si(100) surface

26 Aug 1996-Applied Physics Letters (American Institute of Physics)-Vol. 69, Iss: 9, pp 1270-1272
TL;DR: In this article, the formation of voids on the thermally grown (650 °C) ultrathin (∼1 nm) silicon oxide films on the Si(100) surface was investigated by using ultrahigh vacuum scanning tunneling microscopy.
Abstract: The formation of voids on the thermally grown (650 °C) ultrathin (∼1 nm) silicon oxide films on the Si(100) surface was investigated by using ultrahigh vacuum scanning tunneling microscopy. Voids form randomly on the ultrathin oxide film upon thermal annealing at 750 °C. In contrast to void formation observed on thicker (>5 nm) thermal silicon oxide films and that observed on ultrathin (∼1 nm) oxide films formed by room temperature O2 adsorption, the number of voids increases during annealing. We find that Si monomer creation and SiO production compete kinetically in the void formation process.
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Journal ArticleDOI
TL;DR: In this paper, a review of the literature in the area of alternate gate dielectrics is given, based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success.
Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

5,711 citations

Journal ArticleDOI
TL;DR: In this paper, a method for removing SiO2 and producing an ordered Si(100) surface using Sr or SrO has been developed, which is well suited for the growth of crystalline high-k dielectric SrTiO3 films.
Abstract: A method for removing SiO2 and producing an ordered Si(100) surface using Sr or SrO has been developed. In this technique, a few monolayers of Sr or SrO are deposited onto the as-received Si(100) wafer in an ultrahigh vacuum molecular-beam epitaxy system. The substrate is then heated to ∼800 °C for about 5 min, the SiO2 is removed to leave behind a Sr- or SrO-terminated ordered Si(100) surface. This Sr- or SrO-terminated Si(100) surface is well suited for the growth of crystalline high-k dielectric SrTiO3 films. Temperature programmed desorption measurements were carried out to understand the mechanism of removing SiO2 from Si(100) using Sr or SrO. The species we observed coming off the surface during the temperature cycle were mainly SiO and O, no significant amount of Sr containing species was observed. We conclude that the SiO2 removal is due to the catalytic reaction SiO2+Sr(or SrO)→SiO(g)+O+Sr(or SrO). The reaction SiO2+Si→2SiO(g) at the SiO2/Si interface is limited and the pit formation is suppressed. The main roles that Sr or SrO play during the oxide removal process are catalysts promoting SiO formation and passivating the newly exposed Si surface, preventing further etching and the formation of pits in the substrate.A method for removing SiO2 and producing an ordered Si(100) surface using Sr or SrO has been developed. In this technique, a few monolayers of Sr or SrO are deposited onto the as-received Si(100) wafer in an ultrahigh vacuum molecular-beam epitaxy system. The substrate is then heated to ∼800 °C for about 5 min, the SiO2 is removed to leave behind a Sr- or SrO-terminated ordered Si(100) surface. This Sr- or SrO-terminated Si(100) surface is well suited for the growth of crystalline high-k dielectric SrTiO3 films. Temperature programmed desorption measurements were carried out to understand the mechanism of removing SiO2 from Si(100) using Sr or SrO. The species we observed coming off the surface during the temperature cycle were mainly SiO and O, no significant amount of Sr containing species was observed. We conclude that the SiO2 removal is due to the catalytic reaction SiO2+Sr(or SrO)→SiO(g)+O+Sr(or SrO). The reaction SiO2+Si→2SiO(g) at the SiO2/Si interface is limited and the pit formation is suppresse...

103 citations

Journal ArticleDOI
TL;DR: In this article, the thermal decomposition of ultrathin oxide layers (less than 1 nm thick) on Si(111) surfaces was studied by using scanning reflection electron microscopy and scanning tunneling microscopy.
Abstract: Thermal decomposition of ultrathin oxide layers (less than 1 nm thick) on Si(111) surfaces was studied by using scanning reflection electron microscopy and scanning tunneling microscopy. Void formation, where the diameter and density of the voids depend on the oxide film thickness, occurred on terraces randomly and independently of the buried steps at SiO2/Si(111) interfaces. Decomposition of the oxide layers caused by the void growth produced atomic-height holes on exposed Si surfaces. The surface roughness produced by the holes after thermal decomposition increased with the thickness of the oxide layers. The surface mass transport of Si adatoms to form volatile SiO products explains these experimental results.

82 citations

Journal ArticleDOI
TL;DR: In this article, the authors used scanning tunneling microscopy (STM) to investigate the local leakage current through ultrathin silicon dioxide (SiO2) films grown on Si substrates.
Abstract: We used scanning tunneling microscopy (STM) to investigate the local leakage current through ultrathin silicon dioxide (SiO2) films grown on Si substrates. Individual leakage sites, which were created by hot-electron injection from the STM tip under a high sample bias of +10 V, were identified from the local change in surface conductivity due to defect creation in the oxide films. When we reversed the stressing polarity (using a negative sample bias) no leakage sites were created in the oxide film.

52 citations

Journal ArticleDOI
TL;DR: In this article, the chemistry and morphology of the silicon oxide film controlled liquid Ga nucleation position and shape; these determine GaAs nanowire growth morphology, and the lowest energy Ga droplet shapes are then correlated to the orientation of nanowires with respect to the substrate.
Abstract: Ga-catalyzed growth of GaAs nanowires on Si is a candidate process for achieving seamless III/V integration on IV. In this framework, the nature of silicon’s surface oxide is known to have a strong influence on nanowire growth and orientation and therefore important for GaAs nanowire technologies. We show that the chemistry and morphology of the silicon oxide film controls liquid Ga nucleation position and shape; these determine GaAs nanowire growth morphology. We calculate the energies of formation of Ga droplets as a function of their volume and the oxide composition in several nucleation configurations. The lowest energy Ga droplet shapes are then correlated to the orientation of nanowires with respect to the substrate. This work provides the understanding and the tools to control nanowire morphology in self-assembly and pattern growth.

47 citations