Watermarking and Cryptography Based Image Authentication on Reconfigurable Platform
Altaf O. Mulani,P. B. Mane +1 more
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TLDR
FPGA based implementation of DWT alongwith Advanced Encryption Standard (AES) based watermarking is discussed and with this approach, improved security can be achieved.Abstract:
Now-a-days, multimedia based applications have been developed rapidly. Digital information is easy to process but it allows illegal users to access the data. For protecting the data from this illegal use, Digital Rights Management (DRM) can be used. DRM allows secure exchange of digital data over internet or other electronic media. In this paper, FPGA based implementation of DWT alongwith Advanced Encryption Standard (AES) based watermarking is discussed. With this approach, improved security can be achieved. The complete system is designed using HDL and simulated using Questasim and MATLAB Simulink model. The synthesis result shows that this implementation occupies only 2117 slices and maximum frequency reported for this design is 228.064 MHz.read more
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High-Speed Area-Efficient Implementation of AES Algorithm on Reconfigurable Platform
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References
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Proceedings ArticleDOI
A watermark for digital images
TL;DR: This work describes two techniques for the invisible marking of images and analyzes the robustness of the watermarks with respect to linear and nonlinear filtering, and JPEG compression.
Journal ArticleDOI
Combined DWT-DCT Digital Image Watermarking
TL;DR: An imperceptible and a robust combined DWT-DCT digital image watermarking algorithm that watermarks a given digital image using a combination of the Discrete Wavelet Transform (DWT) and thediscrete Cosine transform (DCT).
Proceedings ArticleDOI
An efficient FPGA implementation of advanced encryption standard algorithm
Shuenn-Shyang Wang,Wan-Sheng Ni +1 more
TL;DR: An efficient FPGA implementation of advanced encryption standard (AES) is proposed, which is shown to be more efficient than published approaches.
Journal ArticleDOI
VLSI architecture and chip for combined invisible robust and fragile watermarking
TL;DR: The development of a very-large-scale integration architecture for a high-performance watermarking chip is presented which can perform both invisible robust and invisible fragile image water marking in the spatial domain.
Book ChapterDOI
FPGA based implementation of an invisible-robust image watermarking encoder
TL;DR: An FPGA based implementation of an invisible spatial domain watermarking encoder consists of a watermark generator, watermark insertion module, and a controller and focuses on the structural design aspects of watermarks generator using linear feedback shift register.