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Journal ArticleDOI

Wide-band CMOS low-noise amplifier exploiting thermal noise canceling

06 Feb 2004-IEEE Journal of Solid-state Circuits (IEEE)-Vol. 39, Iss: 2, pp 275-282
TL;DR: In this article, a feed-forward noise-canceling technique is proposed to cancel the noise and distortion contributions of the matching device, which allows for designing wide-band impedance-matching amplifiers with noise figure (NF) well below 3 dB.
Abstract: Known elementary wide-band amplifiers suffer from a fundamental tradeoff between noise figure (NF) and source impedance matching, which limits the NF to values typically above 3 dB. Global negative feedback can be used to break this tradeoff, however, at the price of potential instability. In contrast, this paper presents a feedforward noise-canceling technique, which allows for simultaneous noise and impedance matching, while canceling the noise and distortion contributions of the matching device. This allows for designing wide-band impedance-matching amplifiers with NF well below 3 dB, without suffering from instability issues. An amplifier realized in 0.25-/spl mu/m standard CMOS shows NF values below 2.4 dB over more than one decade of bandwidth (i.e., 150-2000 MHz) and below 2 dB over more than two octaves (i.e., 250-1100 MHz). Furthermore, the total voltage gain is 13.7 dB, the -3-dB bandwidth is from 2 MHz to 1.6 GHz, the IIP2 is +12 dBm, and the IIP3 is 0 dBm. The LNA drains 14 mA from a 2.5-V supply and the die area is 0.3/spl times/0.25 mm/sup 2/.

Summary (3 min read)

Introduction

  • In contrast, the technique presented in this paper can reach much lower NF, as was validated through the design of a sub-2-dB noise figure wide-band LNA in a 0.25- m CMOS [6].
  • Section IV analyzes properties and limitations of noise canceling.

II. REVIEW OF EXISTING TECHNIQUES

  • Capable of matching a real source impedance (biasing not shown).
  • Still, cannot be lower than NEF as the impedance-matching constraint still stands.
  • The feedback resistor determines the minimum noise factor2 ).
  • The latter can be well below 2 (i.e., 3 dB), provided adequate gain is available.
  • This amplifier suffers from important drawbacks, as follows, motivating the search for alternatives.

III. NOISE-CANCELING TECHNIQUE

  • A wide-band low-noise technique is presented, which is able to decouple from without needing global negative feedback or compromising the source match.
  • This is achieved by canceling the output noise of the matching device without degrading the signal transfer.

A. Noise Canceling Principle

  • To understand the principle of noise canceling, consider the amplifier stage of Fig. 1(c) redrawn in Fig.
  • Let us now analyze the signal and the noise voltages at the input node X and output node Y, both with respect to ground, due to the noise current of the impedance-matching MOSFET.
  • On the other hand, signal components along the two paths add constructively, leading to an overall gain (assuming and ) (4) From (3), two characteristics of noise canceling are evident.
  • Noise canceling depends on the absolute value of the real impedance of the source, (e.g., the impedance seen “looking into” a properly terminated coax cable).
  • Amplifier A and the adder are replaced with the common-source stage M2–M3, rendering an output voltage equal to the voltage at node X times the gain .

B. Noise Factor

  • The latter can also be significantly smaller than 1 when the gain is large, which is desired in any case for an LNA.
  • The matching stage provides with and a voltage gain of dB. Fig. 3(c) shows the transfer function from to the LNA output (right axis) versus .
  • This noise transfer is zero for , meaning that the noise from the matching device cancels at the output.

C. Generalization

  • The concept of noise canceling can be generalized to other circuit topologies according to the model shown in Fig. 4(a).
  • It consists of the following functional blocks: 1) an amplifier stage providing the source impedance matching, ; 2) an auxiliary amplifier sensing the voltage (signal and noise) across the real input source; and 3) a network combining the output of the two amplifiers, such that noise from the matching device cancels while signal contributions add.
  • Fig. 4(b) shows another implementation example (biasing not shown) among several alternatives [9].
  • Noise cancellation oc- curs for , while low requires high .
  • Moreover, it offers advantages compared to feedback techniques.

IV. PROPERTIES AND LIMITATIONS

  • Properties and limitations of noise canceling are analyzed.
  • For simplicity, the authors refer to the LNA in Fig. 3(a).

B. Distortion Canceling

  • The same mechanism leading to cancellation of the output noise due to the matching device can also be exploited to cancel its distortion components.
  • In the following, distortion is assumed to originate only from the nonlinear memoryless voltage to current conversion of the matching device.
  • From inspection of the circuit in Fig. 3(a), the signal voltage at nodes X and Y can now be written as (9) Equation (9) shows that the distortion voltage at node Y has times higher amplitudes than at node X and has equal sign, exactly in the same way as in (1) for the noise.
  • Therefore, a gain cancels all nonlinear terms contributed by the matching device like it cancels its noise contribution (i.e., simultaneous noise and distortion cancellation).
  • Nevertheless, this distortion canceling might prove an useful asset in linear receiver designs.

C. High-Frequency Limitations

  • The 3-dB bandwidth of the amplifier in Fig. 3(b) has been analyzed using a dominant pole estimation technique.
  • In order to investigate the dominant frequency limitations of noise canceling, the simplified case of Fig. 3(b) with appears to be adequate.
  • Here, accounts for the parasitic capacitance contributed to the input node mainly by the matching device and amplifier A.
  • The frequency-dependent noise factor can now be written as NEF (13) where is the low-frequency noise factor as given in (5) and is the input pole.
  • This effect and the increase of with the frequency can be modest up to relatively high frequencies because of the low input-node resistance .

V. LNA IC DESIGN

  • No attempt was made to optimize linearity because at the time of this design the authors were not aware yet of the possibility to cancel distortion.
  • The following requirements for high-sensitivity applications were targeted: 1) signal bandwidth from a few megahertz to 2 GHz (covering most mobile communication bands); 2) voltage gain: dB; 3) ; and 4) NF well below 3 dB over the bandwidth.
  • To reduce the sensitivity of gain and to variations in the supply voltage, the inverter is biased via a current mirror while a large MOS capacitor pF grounds the source of M1b.
  • To achieve this aim, the following design procedure was followed.
  • The noise factor was then optimized at its minimum for and a given gain and .

VI. MEASUREMENTS

  • At low frequencies, drops due to the shunt capacitor in the matching stage.
  • NF and distortion were measured with the chip die glued to a low-loss ceramic substrate with 50- input/output transmission lines connected via short bondwires.
  • Fig. 8 shows the measured, simulated, and the calculated 50- NF using the improved formula [9].
  • At low frequency, the NF rises due to the high-pass filter C2-R2.

VII. CONCLUSION

  • A wide-band noise-canceling technique was presented, which is able to break the tradeoff between noise factor and source impedance matching without degrading the signal transfer or the quality of the source match.
  • This is done placing an auxiliary voltage-sensing amplifier in feedforward to the matching stage such that the noise from the matching device cancels at the output, while adding signal contributions.
  • One can minimize the LNA noise figure, at the price of power dissipation in the auxiliary amplifier.
  • By using this technique in an LNA, low noise figures over a wide range of frequencies can be achieved, greatly relaxing the instability issues that are typically associated with wide-band amplifiers exploiting global negative feedback.
  • Measurement results of a wide-band LNA realized in 0.25- m standard CMOS show 1.6-GHz bandwidth, NF values below 2.4 dB over more than one decade of bandwidth, and below 2 dB over more than two octaves.

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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 2, FEBRUARY 2004 275
Wide-Band CMOS Low-Noise Amplifier Exploiting
Thermal Noise Canceling
Federico Bruccoleri, Eric A. M. Klumperink, Member, IEEE, and Bram Nauta, Senior Member, IEEE
Abstract—Known elementary wide-band amplifiers suffer
from a fundamental tradeoff between noise figure (NF) and source
impedance matching, which limits the NF to values typically above
3 dB. Global negative feedback can be used to break this tradeoff,
however, at the price of potential instability. In contrast, this paper
presents a feedforward noise-canceling technique, which allows
for simultaneous noise and impedance matching, while canceling
the noise and distortion contributions of the matching device. This
allows for designing wide-band impedance-matching amplifiers
with NF well below 3 dB, without suffering from instability issues.
An amplifier realized in 0.25-
m standard CMOS shows NF
values below 2.4 dB over more than one decade of bandwidth
(i.e., 150–2000 MHz) and below 2 dB over more than two octaves
(i.e., 250–1100 MHz). Furthermore, the total voltage gain is 13.7
dB, the
3-dB bandwidth is from 2 MHz to 1.6 GHz, the IIP2 is
+
12 dBm, and the IIP3 is 0 dBm. The LNA drains 14 mA from a
2.5-V supply and the die area is 0.3
0.25 mm
2
.
Index Terms—Broadband, distortion canceling, low-noise ampli-
fier (LNA), noise canceling, noise cancellation, wide band.
I. INTRODUCTION
W
IDE-BAND low-noise amplifiers (LNAs) are used in
receiving systems where the ratio between bandwidth
(BW) and its center frequency
can be as large as two.
Application examples are analog cable (50–850 MHz), satellite
(950–2150 MHz), and terrestrial digital (450–850 MHz) video
broadcasting. Moreover, a wide-band LNA can replace several
LC-tuned LNAs typically used in multiband and multimode
narrow-band receivers. A wide-band solution saves chip area
and fits better with the trend towards flexible radios with as
much signal processing (e.g., channel selection, image rejec-
tion, etc.) as possible in the digital domain (toward “software
radio”).
High-sensitivity integrated receivers require LNAs with suf-
ficiently large gain, noise figure (NF) well below 3 dB, ade-
quate linearity, and source impedance matching
. The
latter is to avoid signal reflections on a cable or alterations of
the characteristics of the RF filter preceding the LNA, such as
pass-band ripple and stop-band attenuation [1]. These require-
ments must be achieved over a wide range of frequencies while
also allowing some variable gain to handle interference gener-
ated by strong adjacent channels.
Manuscript received March 6, 2003; revised September 16, 2003.
F. Bruccoleri was with the MESA+ Research Institute, University of Twente,
7500AE Enschede, The Netherlands. He is now with Catena Microelectronics,
2628XG Delft, The Netherlands.
E. A. M. Klumperink and B. Nauta are with the MESA+ Research In-
stitute, University of Twente, 7500AE Enschede, The Netherlands (e-mail:
e.a.m.klumperink@utwente.nl; b.nauta@utwente.nl).
Digital Object Identifier 10.1109/JSSC.2003.821786
Traditional wide-band LNAs built of MOSFETs and resistors
have difficulties in meeting the above-mentioned requirements.
Known elementary amplifiers [2], [3] fail to achieve low NF
upon
. On the other hand, amplifiers exploiting global
negative feedback might achieve low NF with
,but
they are prone to instability [4]. In this paper, a thermal-noise
canceling technique is presented that allows for designing LNAs
with low NF and source impedance matching over a wide range
of frequencies without instability problems. In earlier work [2],
[5], a limited form of noise cancellation was already presented.
However, it does not allow for low NF
dB upon .
In contrast, the technique presented in this paper can reach much
lower NF, as was validated through the design of a sub-2-dB
noise figure wide-band LNA in a 0.25-
m CMOS [6]. This
paper analyzes the noise-canceling technique and its properties
in depth.
The paper is organized as follows. Section II reviews existing
wide-band CMOS low-noise techniques. Section III introduces
the noise-canceling technique. Section IV analyzes properties
and limitations of noise canceling. Section V describes the IC
design of a wide-band CMOS LNA. Section VI deals with the
measurements. Finally, Section VII presents the conclusions.
II. R
EVIEW OF EXISTING TECHNIQUES
In this section, common wide-band CMOS low-noise tech-
niques are reviewed in order to highlight their NF limitations. A
MOSFET in saturation is modeled as a voltage-controlled cur-
rent source with transconductance
. Its channel noise spectral
density
NEF is assumed the dominant source of
noise. NEF
is the noise excess factor, where
is the channel conductance for and is a parameter.
For a submicron MOSFET,
and holds
[8], resulting in an NEF well above 1.
Fig. 1(a)–(e) shows known elementary wide-band amplifiers
capable of matching a real source impedance
(biasing not
shown). These amplifiers suffer from a fundamental tradeoff be-
tween their noise factor
NF and impedance
matching,
. For a sufficiently large gain, low re-
quires a large
or .
1
Conversely, impedance matching de-
mands a fixed
or . is larger than
NEF (i.e., 3 dB). This tradeoff is somewhat relaxed
for the balanced common-gate LNA exploiting capacitive input
cross coupling in Fig. 1(f) [3]. Still,
cannot be lower than
NEF as the impedance-matching constraint still stands.
1
For the amplifier in Fig. 1(a), low
F
demands the MOSFET
g
to be large
as well.
0018-9200/04$20.00 © 2004 IEEE

276 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 2, FEBRUARY 2004
Fig. 1. Known wide-band LNAs (biasing not shown).
The tradeoff between and source impedance matching
can be broken, exploiting negative feedback prop-
erly. Fig. 1(g) shows a commonly used wide-band feedback
amplifier capable of a low
upon .
In this case, the feedback resistor
determines the minimum
noise factor
2
). The latter can be well
below 2 (i.e., 3 dB), provided adequate gain
is available.
Despite its noise performance, this amplifier suffers from
important drawbacks, as follows, motivating the search for
alternatives.
Sufficient gain and gigahertz bandwidth often mandate the
use of multiple cascaded stages within the feedback loop
[2 in Fig. 1(g)], making its operation prone to instability.
For
, the open-loop gain is lower
than 1. Thus, the closed-loop linearity is not much better
than that of the loop amplifier A. If A consists of cascaded
stages and most of the gain is in the first one (i.e., to opti-
mize noise), linearity can be poor [4].
depends on and , so it is sensitive to process
variations. Next,
and are directly coupled and vari-
able gain at
is not straightforward.
III. N
OISE-CANCELING TECHNIQUE
In this section, a wide-band low-noise technique is presented,
which is able to decouple
from without needing
global negative feedback or compromising the source match.
This is achieved by canceling the output noise of the matching
device without degrading the signal transfer.
A. Noise Canceling Principle
To understand the principle of noise canceling, con-
sider the amplifier stage of Fig. 1(c) redrawn in Fig. 2. Its
input impedance is
and the voltage gain is
where the index MS refers to
the matching amplifier stage in Fig. 1(c). For
, its
2
Since amplifier A is not constrained by matching, its contribution to
F
can
be made arbitrarily small by increasing the
g
of its input stage at the price
of power dissipation.
Fig. 2. Matching MOSFET (a) noise and (b) signal voltage at nodes X and Y
for the amplifier in Fig. 1(c) (biasing not shown).
is larger than 1
NEF, as discussed in the previous section. Let
us now analyze the signal and the noise voltages at the input
node X and output node Y, both with respect to ground, due
to the noise current
of the impedance-matching MOSFET.
Depending on the relation between
and ,
a noise current
flows out of the matching
MOSFET through
and [Fig. 2(a)], with . This
current causes two instantaneous noise voltages at nodes X and
Y, which have equal sign. On the other hand, the signal voltages
at nodes X and Y have opposite sign [Fig. 2(b)], because the
gain
is negative, assuming . This difference
in sign for noise and signal makes it possible to cancel the
noise of the matching device, while simultaneously adding the
signal contributions constructively. This is done by creating a
new output, where the voltage at node Y is added to a scaled
negative replica of the voltage at node X. A proper value for
this scaling factor renders noise canceling at the output node,
for the thermal noise originating from the matching device.
Fig. 3(a) shows a straightforward implementation using an
ideal feedforward voltage amplifier A with a gain
(with
). By circuit inspection, the matching device noise
voltages at node X and Y are
(1)
The output noise voltage due to the noise of the matching device,
is then equal to
(2)
Output noise cancellation,
, is achieved for a gain
equal to
(3)
where the index
denotes the cancellation. On the other hand,
signal components along the two paths add constructively,
leading to an overall gain (assuming
and
)
(4)

BRUCCOLERI et al.: WIDE-BAND CMOS LOW-NOISE AMPLIFIER EXPLOITING THERMAL NOISE CANCELING 277
Fig. 3. (a) Wide-band LNA exploiting noise canceling. (b) Elementary
implementation of amplifier A plus adder (biasing not shown). (c) Matching
device noise transfer (right axis) and NF at 1 GHz (left axis) versus gain
A
for (a).
From (3), two characteristics of noise canceling are evident.
Noise canceling depends on the absolute value of the real
impedance of the source,
(e.g., the impedance seen
looking into a properly terminated coax cable).
The cancellation is independent on
and on the
quality of the source impedance match. This is because
any change of
equally affects the noise voltages
and .
Fig. 3(b) shows an elementary implementation of the noise-
canceling LNA in Fig. 3(a). Amplifier A and the adder are re-
placed with the common-source stage M2M3, rendering an
output voltage equal to the voltage at node X times the gain
. Transistor M3 also acts as a source follower,
copying the voltage at node Y to the output. The superposition
principle renders the final addition of voltages with an overall
gain
.
Note that any small signal that can be modeled by a current
source between the drain and source of the matching device
is cancelled as well (e.g.,
noise, thermal noise of the dis-
tributed gate resistance, and the bias noise current injected into
node Y). However, the noise of
is not cancelled. This can be
seen splitting its noise current
in two correlated sources to
ground, at the output node Y and the input node X. The former
is cancelled for
, the latter is not.
B. Noise Factor
The noise factor
of the LNA in Fig. 3(a) can be written as
EF EF EF (5)
where the excess noise factor EF is used to quantify the con-
tribution of different devices to
, where index refers to
the matching device,
to the resistor , and to amplifier
A. For the implementation in Fig. 3(b), expressions for EF for
are (assuming equal NEF)
EF
NEF
EF (6)
EF
NEF
Upon cancellation , (6) becomes
EF
EF (7)
EF
NEF
The noise factor at cancellation, , is thus only determined
by EF
and EF , neither of which are constrained by the
matching requirement. EF
can be made arbitrarily smaller
than 1 by increasing
of its input stage, at the price of power
dissipation. The minimum achievable
is now determined by
EF
. The latter can also be significantly smaller than 1 when
the gain
is large, which is desired in any case for an
LNA. In practical design,
can be lowered below 2 (i.e., 3 dB)
by increasing
until it saturates to EF
.
The LNA concept in Fig. 3(a) was simulated using MOS
model 9 in a 0.25-
m CMOS process using an ideal noise-
less amplifier A (i.e., a voltage-controlled voltage source). The
matching stage provides
with
and a voltage gain of dB. Fig. 3(c)
shows the transfer function from
to the LNA output
(right axis) versus . It is evaluated at 1 GHz, which is more
than a factor of ten below the
3-dB bandwidth of the matching
stage. This noise transfer is zero for
, meaning
that the noise from the matching device cancels at the output.
On the other hand, the noise transfer rises for
due
to imperfect cancellation. Fig. 3(c) also shows the simulated NF
versus
at 1 GHz (left axis). The NF drops from a maximum
of 6 dB for
, (i.e., NF of the matching stage standalone)
to NF
dB for (i.e., the contribution of
), which is very close to the value predicted from (3) and (7).
C. Generalization
The concept of noise canceling can be generalized to other
circuit topologies according to the model shown in Fig. 4(a). It
consists of the following functional blocks: 1) an amplifier stage

278 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 2, FEBRUARY 2004
Fig. 4. (a) Block diagram of an LNA exploiting noise cancellation.
(b) Alternative circuit example (biasing not shown).
providing the source impedance matching, ;2)an
auxiliary amplifier sensing the voltage (signal and noise) across
the real input source; and 3) a network combining the output
of the two amplifiers, such that noise from the matching device
cancels while signal contributions add.
Fig. 4(b) shows another implementation example (biasing not
shown) among several alternatives [9]. Noise cancellation oc-
curs for
, while low requires high . The
2-MOSFETs in Fig. 4(b) is a well-known transconductor [10],
also used for a double-balanced active mixer [11]. However, in
both cases, noise canceling was apparently not recognized.
As shown in the previous section, the noise-canceling tech-
nique is capable of NF well below 3 dB upon
. More-
over, it offers advantages compared to feedback techniques.
It is a feedforward technique free of global feedback, so
instability risks are greatly relaxed.
To first order,
depends only on . Thus, is less
sensitive to process spread.
Implementing variable gain at
is more straight-
forward due to the orthogonality between the gain
and (changing the value of and changes the
gain, but not
).
Furthermore, it can be shown [9] that simultaneous noise and
power matching is achieved.
3
IV. PROPERTIES AND LIMITATIONS
In this section, properties and limitations of noise canceling
are analyzed. Although most of the conclusions of this section
apply in general, for simplicity, we refer to the LNA in Fig. 3(a).
A. Robustness
The noise-canceling technique is relatively robust to device
parameter variations. The cancellation depends only on a re-
duced set of device parameters. For instance, the impedance
3
This is strictly true for frequencies where parasitic capacitors can be ne-
glected.
Fig. 5. Contribution to F of the matching device
(
EF
)
versus
R
=R
and
A
=A
.
from node Y to ground (e.g., of the matching device), the
load
(e.g., and of M3) and of the matching device
in Fig. 3(b) do not affect the cancellation because they load the
two feedforward paths in the same fashion. On the other hand,
any deviation of the source resistance
and the gain from
their nominal values
and affect the cancellation,
as shown by (3). Using (6) and assuming for
,
deviations
and lead to a variation of EF given by
EF
NEF
(8)
Contours of (8) are shown in Fig. 5 for NEF
and
. Clearly, and as large as % are
needed in order to raise
EF to only 0.1, one tenth of the con-
tribution of the input source. Thus, the sensitivity to variations
of
and the gain is low.
B. Distortion Canceling
The same mechanism leading to cancellation of the output
noise due to the matching device can also be exploited to
cancel its distortion components. In the following, distortion
is assumed to originate only from the nonlinear memoryless
voltage to current conversion of the matching device. Using
a Taylor approximation, the drain-current variations of the
matching device can be written as
, where
denotes all nonlinear high-order terms. From inspection of
the circuit in Fig. 3(a), the signal voltage at nodes X and Y can
now be written as
(9)
Equation (9) shows that the distortion voltage at node Y has
times higher amplitudes than at node X and has equal
sign, exactly in the same way as in (1) for the noise. Therefore,
a gain
cancels all nonlinear terms

BRUCCOLERI et al.: WIDE-BAND CMOS LOW-NOISE AMPLIFIER EXPLOITING THERMAL NOISE CANCELING 279
contributed by the matching device like it cancels its noise con-
tribution (i.e., simultaneous noise and distortion cancellation).
On the other hand, the nonlinearity of amplifier A increases the
output distortion. Nevertheless, this distortion canceling might
prove an useful asset in linear receiver designs.
C. High-Frequency Limitations
The
3-dB bandwidth of the amplifier in Fig. 3(b) has
been analyzed using a dominant pole estimation technique. As-
suming parasitic node capacitors
and , and
, results in
(10)
where
is the resistance from node Y to
ground and
is the amplifier output impedance. For
, (10) can be written as
(11)
Equation (11) shows how the capacitors determine the band-
width for a given
and .
Circuit parasitic capacitors not only limit the signal band-
width but also degrade noise and distortion cancellation.
In order to investigate the dominant frequency limitations
of noise canceling, the simplified case of Fig. 3(b) with
appears to be adequate. Here, accounts for
the parasitic capacitance contributed to the input node mainly
by the matching device and amplifier A. This simple model
is realistic because: 1)
and the load in Fig. 3(b) do
not affect the cancellation and 2)
does not affect the of
the LNA standalone. The noise current
flowing out
from the matching device sees a complex source impedance
) as shown in Fig. 3(b). In this
case, the output noise due to the matching device,
,
is obtained by replacing
with in (2) asfollows:
(12)
Equation (12) shows that exact noise cancellation occurs only
at dc for
. As the frequency increases, the cancella-
tion degrades because
(i.e., the complex source impedance
) affects the noise voltage at node X and Y in a different
manner, e.g.,
.
The frequency-dependent noise factor
can now be
written as
NEF (13)
where
is the low-frequency noise factor as given in (5) and
is the input pole. For smaller than
NEF increases with mainly because the
cancellation degrades. However, this effect and the increase
of
with the frequency can be modest up to relatively
high frequencies because of the low input-node resistance
Fig. 6. Schematic of the wide-band CMOS LNA.
. Equation (13) shows the importance of maximizing
(i.e., minimizing ) in order to mitigate the degradation of
noise factor. This can be done by increasing
of Mi
and M2, cascoding to reduce the Miller effect, by frequency
compensation, e.g., so-called shunt-peaking technique or using
a more advanced deep-submicron CMOS process with higher
.
V. L N A I C D
ESIGN
A wide-band LNA according to the concept of Fig. 3(b) was
designed in a 0.25-
m standard CMOS process. The design was
aimed at low NF over a wide range of frequencies. No attempt
was made to optimize linearity because at the time of this design
we were not aware yet of the possibility to cancel distortion. The
following requirements for high-sensitivity applications were
targeted: 1) signal bandwidth from a few megahertz to 2 GHz
(covering most mobile communication bands); 2) voltage gain:
dB; 3) ; and
4) NF well below 3 dB over the bandwidth.
Fig. 6 shows the LNA schematic. The matching stage exploits
shunt feedback around a CMOS inverter to provide the input
impedance
. To reduce the
sensitivity of gain and
to variations in the supply voltage,
the inverter is biased via a current mirror while a large MOS ca-
pacitor
pF grounds the source of M1b. The matching
stage is ac coupled to M3 via the high-pass filter
(i.e.,
0.8 pF and 95 k
). The cascode M2b improves the isolation and
reduces the input capacitance by decreasing the Miller effect due
to M2a. In order to fit a supply voltage of 2.5 V, M3 conducts
only part of the drain current of M2. This is done without sac-
rificing NF because the LNA gain is large and enough voltage
headroom is available for the output mirror. The capacitance of
the output bondpad
pF is used as load. The design
of the LNA was targeted to a NF of 1.9 dB for
.To
achieve this aim, the following design procedure was followed.
Design equations for
, and more precise than
(4), (6), and
were derived in order to take into ac-
count the effect of the output conductance
of M1 and
the body transconductance
of M3 [9].
The noise factor was then optimized at its minimum for
and a given gain and . By in-
troducing a deliberate noise-cancellation error,
, the optimal , , can be lower

Citations
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Journal ArticleDOI
TL;DR: It is shown that a CS-stage with deep submicron transistors can have high IIP2, because the nugsldr nuds cross-term in a two-dimensional Taylor approximation of the IDS(VGS, VDS) characteristic can cancel the traditionally dominant square-law term in the IDs(V GS) relation at practical gain values.
Abstract: An inductorless low-noise amplifier (LNA) with active balun is proposed for multi-standard radio applications between 100 MHz and 6 GHz. It exploits a combination of a common-gate (CGH) stage and an admittance-scaled common-source (CS) stage with replica biasing to maximize balanced operation, while simultaneously canceling the noise and distortion of the CG-stage. In this way, a noise figure (NF) close to or below 3 dB can be achieved, while good linearity is possible when the CS-stage is carefully optimized. We show that a CS-stage with deep submicron transistors can have high IIP2, because the nugsldr nuds cross-term in a two-dimensional Taylor approximation of the IDS(VGS, VDS) characteristic can cancel the traditionally dominant square-law term in the IDS(VGS) relation at practical gain values. Using standard 65 nm transistors at 1.2 V supply voltage, we realize a balun-LNA with 15 dB gain, NF +20 dBm, while simultaneously achieving an IIP3 > 0 dBm. The best performance of the balun is achieved between 300 MHz to 3.5 GHz with gain and phase errors below 0.3 dB and plusmn2 degrees. The total power consumption is 21 mW, while the active area is only 0.01 mm2.

579 citations


Cites background from "Wide-band CMOS low-noise amplifier ..."

  • ...A more detailed discussion on high frequency limitations and robustness for component variations can be found in [5]....

    [...]

Journal ArticleDOI
TL;DR: In this paper, a software-defined radio receiver is designed from a low-power ADC perspective, exploiting programmability of windowed integration sampler and clock-programmable discrete-time analog filters.
Abstract: A software-defined radio receiver is designed from a low-power ADC perspective, exploiting programmability of windowed integration sampler and clock-programmable discrete-time analog filters. To cover the major frequency bands in use today, a wideband RF front-end, including the low-noise amplifier (LNA) and a wide tuning-range synthesizer, spanning over 800 MHz to 6 GHz is designed. The wideband LNA provides 18-20 dB of maximum gain and 3-3.5 dB of noise figure over 800 MHz to 6 GHz. A low 1/f noise and high-linearity mixer is designed which utilizes the passive mixer core properties and provides around +70 dBm IIP2 over the bandwidth of operation. The entire receiver circuits are implemented in 90-nm CMOS technology. Programmability of the receiver is tested for GSM and 802.11g standards

433 citations

Journal ArticleDOI
TL;DR: An ultra-wideband 3.1-10.6-GHz low-noise amplifier employing a broadband noise-canceling technique is presented, which achieves a power gain of 9.7 dB over a -3 dB bandwidth of 1.2-11.9-GHz and a noise figure of 4.5-5.1 dB in the entire UWB band.
Abstract: An ultra-wideband 3.1-10.6-GHz low-noise amplifier employing a broadband noise-canceling technique is presented. By using the proposed circuit and design methodology, the noise from the matching device is greatly suppressed over the desired UWB band, while the noise from other devices performing noise cancellation is minimized by the systematic approach. Fabricated in a 0.18-mum CMOS process, the IC prototype achieves a power gain of 9.7 dB over a -3 dB bandwidth of 1.2-11.9-GHz and a noise figure of 4.5-5.1 dB in the entire UWB band. It consumes 20 mW from a 1.8-V supply and occupies an area of only 0.59 mm2

392 citations


Cites methods from "Wide-band CMOS low-noise amplifier ..."

  • ...In this paper, the concept of noise cancellation [10], [11] is extended to higher frequencies by using inductive series and shunt peaking techniques and the proposed design methodology....

    [...]

  • ...The purpose of noise cancellation is to decouple the input matching with the NF by canceling the output noise from the matching device [10], [11]....

    [...]

Journal ArticleDOI
TL;DR: A new wideband receiver architecture is proposed that employs two separate passive-mixer-based downconversion paths, which enables noise cancelling, but avoids voltage gain at blocker frequencies.
Abstract: A new wideband receiver architecture is proposed that employs two separate passive-mixer-based downconversion paths, which enables noise cancelling, but avoids voltage gain at blocker frequencies. This approach significantly relaxes the trade-off between noise, out-of-band linearity and wideband operation. The resulting prototype in 40 nm is functional from 80 MHz to 2.7 GHz and achieves a 2 dB noise figure, which only degrades to 4.1 dB in the presence of a 0 dBm blocker.

338 citations


Cites background from "Wide-band CMOS low-noise amplifier ..."

  • ...More recently, recognizing the high linearity of passive-mixers, a number of “blocker-tolerant” CMOS receivers have been developed [6]–[13], but in each case linearity and wideband operation comes at the expense of noise figure....

    [...]

  • ...A fully-differential prototype is briefly discussed in Section IX, before conclusions are drawn in Section X....

    [...]

Journal ArticleDOI
TL;DR: This tutorial catalogues and analyzes previously reported CMOS low noise amplifier (LNA) linearization techniques and highlights the impact of CMOS technology scaling on linearity and outlines how to design a linear LNA in a deep submicrometer process.
Abstract: This tutorial catalogues and analyzes previously reported CMOS low noise amplifier (LNA) linearization techniques. These techniques comprise eight categories: a) feedback; b) harmonic termination; c) optimum biasing; d) feedforward; e) derivative superposition (DS); f) IM2 injection; g) noise/distortion cancellation; and h) post-distortion. This paper also addresses broadband-LNA-linearization issues for emerging reconfigurable multiband/multistandard and wideband transceivers. Furthermore, we highlight the impact of CMOS technology scaling on linearity and outline how to design a linear LNA in a deep submicrometer process. Finally, general design guidelines for high-linearity LNAs are provided.

325 citations

References
More filters
Journal ArticleDOI
TL;DR: The examined class of circuits includes voltage multipliers, current multiplier circuits, linear V-I convertors, linear I-V convertor circuits, current squaring circuits, and current divider circuits.
Abstract: The examined class of circuits includes voltage multipliers, current multipliers, linear V-I convertors, linear I-V convertors, current squaring circuits, and current divider circuits. Typical for these circuits is an independent control of the sum as well as the difference between two gate-source voltages. As direct use is made of the basic device characteristics, only a small number of transistors is required in the presented circuits.

380 citations


"Wide-band CMOS low-noise amplifier ..." refers background in this paper

  • ...4(b) is a well-known transconductor [10], also used for a double-balanced active mixer [11]....

    [...]

Proceedings ArticleDOI
01 Jan 2000
TL;DR: In this paper, an approach to improve the noise performance of RF low noise amplifiers (LNAs) and down-conversion mixers is described. But the authors focus on capacitive cross-coupling across the two sides of a differential input stage.
Abstract: We report an approach to improve the noise performance of RF low noise amplifiers (LNAs) and down-conversion mixers. The technique we described here is based on capacitive cross-coupling across the two sides of a differential input stage. A LNA and mixer have been implemented in 0.5µ CMOS process to demonstrate the viability of this technique. The measurements show that the LNA achieves 3.0dB noise figure and 12.2 dB voltage gain (optimized for the maximum power transfer), and the mixer has 5.2dB DSB noise figure and 13.2 dB voltage conversion gain. Both LNA and mixer operate at 2.7V voltage supply and consume 27mW and 8.1mW power, respectively.

170 citations

Proceedings ArticleDOI
07 Aug 2002
TL;DR: In this article, a noise-cancelling technique in a wideband LNA achieves low noise figure (NF) and source impedance matching without global feedback, and the 0.25 μm LNA provides <2.4 dB NF from 0.01-2 GHz, total voltage gain is 13.7 dB, -3 dB bandwidth is 0.1-1.6 GHz, S/sub 12/ is <-36 dB, and s/sub 11/ is −10 dB.
Abstract: A noise-cancelling technique in a wideband LNA achieves low noise figure (NF) and source impedance matching without global feedback. The 0.25 μm LNA provides <2.4 dB NF from 0.01-2 GHz, total voltage gain is 13.7 dB, -3 dB bandwidth is 0.01-1.6 GHz, S/sub 12/ is <-36 dB, and S/sub 11/ is <-10 dB. IIP2 is 12 dBm, and IIP3 is 0 dBm drawing 14 mA at 2.5 V.

159 citations


"Wide-band CMOS low-noise amplifier ..." refers background in this paper

  • ...Next, and are directly coupled and variable gain at is not straightforward....

    [...]

Proceedings ArticleDOI
05 Dec 1999
TL;DR: In this article, a surfacepotential-based compact MOS model with improved descriptions of carrier mobility and velocity saturation was used to evaluate drain current thermal noise for three different CMOS technologies and for gate lengths ranging from 2 /spl mu/m down to 0.17 /spl µ/m.
Abstract: Extensive measurements of drain current thermal noise are presented for 3 different CMOS technologies and for gate lengths ranging from 2 /spl mu/m down to 0.17 /spl mu/m. Using a surface-potential-based compact MOS model with improved descriptions of carrier mobility and velocity saturation, all the experimental results can be described accurately without invoking carrier heating effects or introducing additional parameters.

98 citations

Journal ArticleDOI
01 Jul 2001
TL;DR: In this paper, the authors present a methodology that systematically generates all 2-MOS-transistor wide-band amplifiers, assuming that MOSFET is exploited as a voltage-controlled current source.
Abstract: This paper presents a methodology that systematically generates all 2-MOS-transistor wide-band amplifiers, assuming that MOSFET is exploited as a voltage-controlled current source. This leads to new circuits. Their gain and noise factor have been compared to well-known wide-band amplifiers. One of the new circuits appears to have a relatively low noise factor, which is also gain independent. Based on this new circuit, a 50-900 MHz variable-gain wide-band LNA has been designed in 0.35-/spl mu/m CMOS. Measurements show a noise figure between 4.3 and 4.9 dB for gains from 6 to 11 dB. These values are more than 2 dB lower than the noise figure of the wide-band common-gate LNA for the same input matching, power consumption, and voltage gain. IIP2 and IIP3 are better than 23.5 and 14.5 dBm, respectively, while the LNA drains only 1.5 mA at 3.3 V.

88 citations

Frequently Asked Questions (8)
Q1. What are the contributions in "Wide-band cmos low-noise amplifier exploiting thermal noise canceling" ?

In contrast, this paper presents a feedforward noise-canceling technique, which allows for simultaneous noise and impedance matching, while canceling the noise and distortion contributions of the matching device. Furthermore, the total voltage gain is 13. 

Other attractive assets of the technique are:• simultaneous cancellation of noise and distortion terms due to the matching device; • simultaneous noise and power matching for frequencies where the effect of parasitic capacitors can be neglected; • orthogonality of design parameters for input impedance and gain, allowing for an easier implementation of variable gain while maintaining input impedance matching; • robustness to variations in device parameters and the external source resistance ; • applicability in other IC technologies and amplifier topologies. 

The following requirements for high-sensitivity applications were targeted: 1) signal bandwidth from a few megahertz to 2 GHz (covering most mobile communication bands); 2) voltage gain: dB; 3) ; and 4) NF well below 3 dB over the bandwidth. 

By circuit inspection, the matching device noise voltages at node X and Y are(1)The output noise voltage due to the noise of the matching device, is then equal to(2)Output noise cancellation, , is achieved for a gain equal to(3)where the index denotes the cancellation. 

its2Since amplifier A is not constrained by matching, its contribution to F can be made arbitrarily small by increasing the g of its input stage at the price of power dissipation. 

In this case, the output noise due to the matching device, , is obtained by replacing with in (2) asfollows:(12)Equation (12) shows that exact noise cancellation occurs only at dc for . 

The noise factor of the LNA in Fig. 3(a) can be written asEF EF EF (5)where the excess noise factor EF is used to quantify the contribution of different devices to , where index refers to the matching device, to the resistor , and to amplifier A. For the implementation in Fig. 3(b), expressions for EF forare (assuming equal NEF)EF NEFEF (6)EF NEFUpon cancellation , (6) becomesEFEF (7)EF NEFThe noise factor at cancellation, , is thus only determined by EF and EF , neither of which are constrained by the matching requirement. 

This is done placing an auxiliary voltage-sensing amplifier in feedforward to the matching stage such that the noise from the matching device cancels at the output, while adding signal contributions.