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The method is suitable for application in systems which do not require the clock perfectly synchronised to the data.
The clocking methodology of the present Alpha microprocessor handles such challenges by radically departing from a single chip-wide clock distribution, to better control clock skew, jitter and power dissipation.
Then, the bulky electrolytic capacitor can be replaced with a small film capacitor.
Proceedings ArticleDOI
20 Aug 2006
37 Citations
We propose a novel approach to read the video clock in real time by recognizing the clock digits using a few techniques relative to the transition patterns of the clock.
This topology is more suitable for high-speed switched-capacitor applications when compared to a conventional switched-capacitor CMFB, enabling operation at higher clock frequencies.
Proceedings ArticleDOI
Can Sitik, Baris Taskin 
02 May 2013
Low-swing clock trees are preferred for a reduction in the clock switching power, with an expected trade-off in clock slew and skew.
This paper proposes a low-cost clock cleaner solution for reference clock sources called the Clock Cleaner.
When this clock is used as the sampling clock in a switched-capacitor filter (SCF) to set its frequency response, the time-varying period causes nonuniform sampling, which is acceptable under certain conditions that are described.
Open accessProceedings ArticleDOI
V. Tirumalashetty, Hamid Mahmoodi 
27 May 2007
30 Citations
Such a modification in clock signal prevents application of existing clock gating solutions.
The design has been shown to achieve this performance without affecting the jitter on one (sampling) edge of the input clock, which is very important for high-performance switched capacitor-based designs.
Journal ArticleDOI
Rogerio Drummond, Ozalp Babaoglu 
26 Citations
Our approach decouples theprecision concern of clock synchronization—limiting how much correct clocks can differ from each other—from theaccuracy concern—limiting the rate at which any correct clock may drift from real time.
Thus, a clock-controlled dbp gene may play an important role in central clock oscillation.
We show that a dominant negative version of Clock can block the function of the endogenous Clock gene.
The proposed structure uses only two nonoverlapping clock phases and is fully programmable through the use of three independent capacitor arrays.

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How to design low power chip?
4 answers
To design a low power chip, various techniques can be employed based on the specific requirements of the application. Implementing clock gating, standby modes, multi-threshold voltage, power gating, and multi-voltage design are popular strategies for reducing power consumption in System-on-Chip (SoC) designs. Additionally, utilizing low power complementary metal-oxide-semiconductor (CMOS) integrated circuit design techniques such as forward-biasing MOSFETs, Dynamic threshold MOSFET (DTMOS) method, and adaptive body-biasing can significantly enhance power efficiency in chip design. It is crucial to optimize design methodologies at all levels to achieve low power objectives, considering factors like dynamic power dissipation due to transition activity and the impact of semiconductor process technology size on leakage power. Incorporating these techniques can lead to the development of energy-efficient and cost-effective chips for various applications.
Which components of electronic equipment have energy recover potential?
5 answers
Electronic equipment such as electric braking devices, electronic components, plasma display panels, and variable-frequency drives exhibit energy recovery potential. For instance, energy recovering electric braking devices can store energy consumed during braking processes. Similarly, electronic component recovery systems can utilize energy sources in electronic waste effectively. Plasma display panels incorporate an energy recovery circuit with reduced component count for efficient energy recuperation. Additionally, variable-frequency drives feature DC power supply buses and electric power storage modules for energy recovery from electric loads. By harnessing waste heat from electronic components, particularly Integrated Circuits (IC's), thermoelectric energy recovery modules can convert heat into electricity, enhancing energy efficiency and prolonging equipment life.
What are the applications of AlScN in Neuromorphic systems?
5 answers
Aluminum Nitride (AlN) and Aluminum Scandium Nitride (AlScN) find applications in neuromorphic systems for synaptic weight elements and neural network simulations. AlN-based memristors demonstrate reliable resistive switching behaviors, long retention, and multi-level storage, showcasing potential for electronic synapses in future neuromorphic systems. Carbon nanotube-based ferroelectric synaptic transistors, including AlScN, exhibit well-mimicked plasticity, achieving distinguishable conductance states and dynamic ranges suitable for artificial synapses in flexible neuromorphic devices. These materials contribute to the development of energy-efficient computing, neuroprosthetics, and smart health monitoring through their ability to mimic biological nervous system functions and enable pattern recognition with high accuracy in artificial neural network simulations.
HOW DOES time stamp is important to a computer laboratory activity?
5 answers
Time stamping plays a crucial role in computer laboratory activities by providing accurate timing verification and event synchronization. It allows for precise recording and time-stamping of input and output events with high accuracy, aiding in determining event initiation, duration, and termination, as well as synchronization with screen refresh cycles. Time stamping systems, such as those involving time distribution servers and user PCs, generate time stamps based on time certification objective data, ensuring the integrity and authenticity of digital information. Techniques like digital time stamping help prove the existence of digital data before a specific time point, addressing challenges related to administrative costs and scalability in centralized time-stamping authorities. Additionally, circuits with fine timing and correction mechanisms ensure accurate determination of event occurrence within clock periods, enhancing the reliability of time-stamped data.
What are the most important reliability issues in vlsi systems?
5 answers
Reliability issues in VLSI systems encompass various challenges. Concerns include fault detection, fault tolerance, and system degradation. In VLSI systems, the ability to detect faults promptly and accurately is crucial for ensuring system safety and performance. Additionally, fault-tolerant designs play a vital role in mitigating reliability issues, allowing systems to continue operating even when faults occur. Moreover, managing system degradation and deferring hard failures are essential aspects to enhance the reliability of VLSI systems. By addressing these factors through fault detection techniques, fault-tolerant designs, and dynamic reliability management strategies, VLSI systems can achieve improved reliability and longevity in operation.
What are the disadvantages and advantages of synchronous counters?
5 answers
Synchronous counters offer advantages such as efficient power consumption and reduced error ranges in digital outputs. They are essential components in digital systems, providing reliable performance and optimized energy usage. However, challenges like increased power requirements during testing modes can be a drawback. Implementing synchronous counters based on innovative designs can significantly improve power dissipation, delay, and power delay product compared to traditional architectures, showcasing advancements in technology and circuit complexity. By utilizing techniques like BICMOS logic, latch-up problems can be eliminated, enhancing the efficiency of synchronous counters. Overall, synchronous counters excel in performance metrics like power consumption and error reduction, making them valuable components in digital circuit design.
What forms the backbone of ICT, seamlessly integrating computing capabilities with high-speed communication links?
5 answers
The backbone of Information and Communication Technology (ICT) seamlessly integrates computing capabilities with high-speed communication links. This integration is crucial for various applications like electronic mail, file transfer, CAD/CAM, and more, leading to the installation of Local Area Networks (LANs) in offices and the need to interconnect these LANs globally. Technologies such as wavelength division multiplexing, memory storage devices with high-speed data interfaces, 3D integrated circuits with through-silicon vias, clock-data-recovery circuits, and ATM cell relay principles play vital roles in enabling high-speed data interconnectivity and communication services. These advancements facilitate the efficient transfer of data across different locations worldwide, ensuring seamless connectivity and enhancing overall ICT performance.
What can be the observation and conclusion regarding the autotransformer experiment? Explain in essay form in 100 words?
5 answers
The autotransformer experiment showcased various advancements in power transmission technology. The bidirectional DC-AUTO transformer and the UUDAT proved efficient in transmitting DC power between systems with different voltage levels, highlighting reduced capacity requirements compared to conventional methods. Mathematical modeling of autotransformers revealed the need for specific models due to the unique power transfer mechanisms, emphasizing the importance of deriving a general model for broader applications. Additionally, experimental results of a direct ac-ac converter demonstrated high efficiency and bidirectional power flow capabilities, making it suitable for solid-state autotransformers. The study on autotransformer discrete voltage regulators further validated simulation results with experimental data, showcasing excellent accuracy. Overall, these experiments underscore the potential for autotransformers to revolutionize power transmission with enhanced efficiency and versatility.
How to measure noise margin of a signal in a circuit?
5 answers
To measure the noise margin of a signal in a circuit, various methods have been proposed in the field of integrated circuits. One approach involves applying a voltage waveform with a linear falling edge to a test memory cell and capturing the input and output voltages to determine the static noise margin (SNM). Another method focuses on measuring the noise margin in SRAM by analyzing the maximum noise signal amplitude that can be tolerated by a memory unit, crucial for assessing its anti-jamming capability. Additionally, margin circuits utilizing variable delay circuits and margin controllers have been developed to control skew between signals and determine margin, enabling adjustments for clock and data signals in circuits. These methods collectively contribute to accurately and efficiently measuring noise margins in various circuit components.
What are the rules followed in Generating Mimicked Data?
4 answers
The rules followed in generating mimicked data involve several steps. Firstly, the input and output spaces of numerical data are divided into fuzzy regions. Subsequently, fuzzy rules are generated from the given data, with degrees assigned to resolve conflicts among them. A combined fuzzy rule base is then created based on both the generated rules and linguistic rules of human experts. Finally, a mapping from input space to output space is determined using a defuzzifying procedure, capable of approximating any real continuous function with high accuracy. These steps ensure the generation of fuzzy rules that can be applied in various scenarios such as truck backer-upper control and time series prediction problems.
Which is the function of the most co.mon class's lever 3rd level?
4 answers
The function of the most common class's lever at the 3rd level typically involves controlling three functions, such as in the case of hydraulic valves. This lever arrangement consists of two control levers mounted on separate means of mounting, allowing for independent operation of the first and second functions by pivoting around different axes. The second lever, when pivoted around a specific axis, activates the third function, while a connecting member facilitates operational linkage between the levers for coordinated movement around different axes. This design enables efficient and versatile control over multiple functions, showcasing the practical application of lever systems in managing complex operations like those in hydraulic systems.