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Adaptive Multi-Rate audio codec

About: Adaptive Multi-Rate audio codec is a research topic. Over the lifetime, 1467 publications have been published within this topic receiving 19736 citations. The topic is also known as: AMR & Adaptive Multi-Rate.


Papers
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Journal ArticleDOI
TL;DR: The encoder and decoder algorithms for HVXC, including fast harmonic synthesis, time scale modification, and pitch-change decoding, are discussed, which provides near toll-quality speech at 4.0 kbit/s, and communication- quality speech at 2.0kbit/S, thus outperforming FS1016 4.8-k bit/s CELP.
Abstract: A coding algorithm for speech called harmonic vector excitation coding (HVXC) has been developed that encodes speech at very low bit rates (2.0–4.0 kbit/s). It breaks speech signals down into two types of segments: voiced segments, for which a parametric representation of harmonic spectral magnitudes of LPC residual signals is used; and unvoiced segments, for which the CELP coding algorithm is used. This combination provides near toll-quality speech at 4.0 kbit/s, and communication-quality speech at 2.0 kbit/s, thus outperforming FS1016 4.8-kbit/s CELP. This paper discusses the encoder and decoder algorithms for HVXC, including fast harmonic synthesis, time scale modification, and pitch-change decoding. Due to its high coding efficiency and new functionality, HVXC has been adopted as the ISO/IEC International Standard for MPEG-4 audio.

4 citations

Proceedings ArticleDOI
19 Apr 1994
TL;DR: The design of a speech and channel codec for the North American TDMA digital cellular half rate channel which meets the eligibility requirements of the Telecommunications Industry Association (TIA) contest is described.
Abstract: The design of a speech and channel codec for the North American TDMA digital cellular half rate channel which meets the eligibility requirements of the Telecommunications Industry Association (TIA) contest is described. Its design objectives are largely shaped by the selection criteria. The codec has been implemented in real time on two Tiger C40 boards. Informal listening tests using this real-time hardware seem to indicate that this candidate is in close proximity to the full rate standard. >

4 citations

Proceedings ArticleDOI
14 Aug 2001
TL;DR: A Reed-Solomon (RS) codec processor that can have programmable error-correction number of 1 to 10, and codeword length of 8 to 255, and a modified Fermat algorithm to reduce the complexity of the division is proposed.
Abstract: We propose a Reed-Solomon (RS) codec processor that can have programmable error-correction number of 1 to 10, and codeword length of 8 to 255. The proposed RS codec processor includes an encoder and a decoder. Especially in the decoder, we use a modified Fermat algorithm to reduce the complexity of the division. By using the cell library of the TSMC 0.35 /spl mu/m CMOS technology, the proposed RS codec processor was implemented with a die size of 5.1/spl times/5.0 mm/sup 2/. It can operate at 50 MHz to yield the throughput rate of 50 Msamples per second where each sample is 8 bits.

4 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202310
202214
20201
20193
20183
201721