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Amorphous silicon

About: Amorphous silicon is a research topic. Over the lifetime, 26777 publications have been published within this topic receiving 423234 citations.


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Patent
26 Jan 2006
TL;DR: In this paper, a method for passivating and contacting a surface of a germanium substrate is described, where a passivation layer of amorphous silicon material is formed on the surface of the substrate.
Abstract: A method is disclosed for passivating and contacting a surface of a germanium substrate. A passivation layer of amorphous silicon material is formed on the germanium surface. A contact layer of metal is then formed on the passivation. The structure is heated so that the germanium surface makes contact with the contact layer. Thus, a passivated germanium surface is disclosed, as well as a solar cell comprising such a structure.

76 citations

Journal ArticleDOI
TL;DR: In this paper, the mixed-phase p-type nanocrystalline silicon oxide (p-SiOx) films were used as window layer in high open-circuit voltage (Voc) and high blue spectral response in the top amorphous silicon (a-Si:H) cell.

76 citations

Journal ArticleDOI
TL;DR: In this article, a-Si : H solar modules and thin films were exposed to the same AM 1.0 spectrum while keeping them at temperatures corresponding to extreme summer and winter operating cell temperatures.

76 citations

Journal ArticleDOI
A. V. Gelatos1, Jerzy Kanicki1
TL;DR: In this article, the effects of positive and negative bias stress on hydrogenated amorphous silicon nitride (aSiNx:H/a•Si:H) structures are investigated as a function of stress time, and stress temperature.
Abstract: The effects of positive and negative bias stress on hydrogenated amorphous silicon nitride/hydrogenated amorphous silicon (a‐SiNx:H/a‐Si:H) structures are investigated as a function of stress time, and stress temperature. It is shown that bias stress induces a parallel shift of the capacitance voltage (C‐V) characteristics. The direction of the C‐V shift depends on the sign of the applied stress voltage, while the magnitude of the C‐V shift depends on stress time and temperature in a manner which is identical to that observed in a‐Si:H thin‐film transistors. In addition, it is shown that positive bias stress increases the number of localized states in the a‐Si:H mobility gap, but negative bias stress does not. However, the observed increase cannot account for the corresponding C‐V shift. These results lead us to conclude that the C‐V shift is not induced by dangling bond defects in a‐Si:H but rather by carrier trapping in the insulator.

76 citations

Patent
29 Jan 1980
TL;DR: In this article, a photovoltaic device comprises a light transmissive insulating substrate, on which a plurality of isolated transparent electrodes are formed, and the transparent electrodes and the aluminum electrodes are electrically connected to the adjacent opponent electrodes to withdraw in a series fashion, generated at the respective photoelectric conversion regions.
Abstract: A photovoltaic device comprises a light transmissive insulating substrate, on which a plurality of isolated transparent electrodes are formed. An amorphous silicon layer of a PIN structure, for example, is formed on the substrate continuously and in common to the respective transparent electrodes. Aluminum electrodes are formed on the surface of the amorphous silicon layer so as to correspond to the respective transparent electrodes. The transparent electrodes and the aluminum electrodes are electrically connected to the adjacent opponent electrodes to withdraw in a series fashion photovoltaic power generated at the respective photoelectric conversion regions.

76 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023118
2022214
2021245
2020422
2019526
2018571