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Showing papers on "Amplifier published in 2001"


Journal ArticleDOI
TL;DR: In this paper, memory effects in the power amplifier limit the performance of digital predistortion for wideband signals, and novel algorithms that take into account such effects are proposed to solve the problem.
Abstract: Memory effects in the power amplifier limit the performance of digital predistortion for wideband signals. Novel algorithms that take into account such effects are proposed. Measured results are presented for single and multicarrier UMTS signals to demonstrate the effectiveness of the new approach.

934 citations


Journal ArticleDOI
TL;DR: A new method for determining component values and transistor dimensions for CMOS operational amplifiers (op-amps) is described, showing in detail how the method can be used to size robust designs, i.e., designs guaranteed to meet the specifications for a variety of process conditions and parameters.
Abstract: We describe a new method for determining component values and transistor dimensions for CMOS operational amplifiers (op-amps). We observe that a wide variety of design objectives and constraints have a special form, i.e., they are posynomial functions of the design variables. As a result, the amplifier design problem can be expressed as a special form of optimization problem called geometric programming, for which very efficient global optimization methods have been developed. As a consequence we can efficiently determine globally optimal amplifier designs or globally optimal tradeoffs among competing performance measures such as power, open-loop gain, and bandwidth. Our method, therefore, yields completely automated sizing of (globally) optimal CMOS amplifiers, directly from specifications. In this paper, we apply this method to a specific widely used operational amplifier architecture, showing in detail how to formulate the design problem as a geometric program. We compute globally optimal tradeoff curves relating performance measures such as power dissipation, unity-gain bandwidth, and open-loop gain. We show how the method can he used to size robust designs, i.e., designs guaranteed to meet the specifications for a variety of process conditions and parameters.

540 citations


Journal ArticleDOI
05 Feb 2001
TL;DR: In this paper, a highly integrated 175 GHz 035/spl µ/m CMOS transmitter is described, which facilitates integration through the use of a unique mixer, termed a harmonic-rejection mixer, and a wide loop bandwidth phase-locked loop (PLL) for the RF synthesizer.
Abstract: A highly integrated 175-GHz 035-/spl mu/m CMOS transmitter is described The I/Q modulator-based transmitter facilitates integration through the use of a unique mixer, termed a harmonic-rejection mixer, and a wide loop bandwidth phase-locked loop (PLL) for the RF synthesizer The harmonic-rejection mixers are used to eliminate the need for a discrete IF filter and the use of a wide loop bandwidth PLL allowed for the complete integration of the synthesizers using low-Q components while achieving low phase noise The entire transmit signal path from the digital-to-analog converters to the power amplifier, including two fully integrated frequency synthesizers, is integrated into a single-chip solution The transmitter was tested with a testing buffer before the power amplifier (PA) and achieved less than 13/spl deg/ rms phase error when modulating a DCS-1800 GMSK signal The prototype consumed 151 mA from a 3-V supply A class-C PA, capable of driving 25 dBm off-chip, was included and the output was compared to the testing buffer with little change in the transmitter performance

433 citations


Journal ArticleDOI
TL;DR: In this paper, a three-tone test setup is constructed to measure the phase of third-order intermodulation distortion products, and the measured results for a bipolar junction transistor and a MESFET amplifier are presented.
Abstract: Memory effects are defined as changes in the amplitude and phase of distortion components caused by changes in modulation frequency. These are particularly important in cancelling linearizer systems, e.g., when distortion is reduced by similar distortion in the opposite phase. This paper begins by describing electrical and electrothermal causes for memory effects. A three-tone test setup is then constructed to measure the phase of third-order intermodulation distortion products. This paper also presents the measured results for a bipolar junction transistor and a MESFET amplifier.

400 citations


Journal ArticleDOI
TL;DR: The APV25 as mentioned in this paper is a 128-channel analogue pipeline chip for the readout of silicon microstrip detectors in the CMS tracker at the LHC, each channel comprises a low noise amplifier, a 192-cell analogue pipeline and a deconvolution readout circuit.
Abstract: The APV25 is a 128-channel analogue pipeline chip for the readout of silicon microstrip detectors in the CMS tracker at the LHC. Each channel comprises a low noise amplifier, a 192-cell analogue pipeline and a deconvolution readout circuit. Output data are transmitted on a single differential current output via an analogue multiplexer. The chip is fabricated in a standard 0.25 μm CMOS process to take advantage of the radiation tolerance, lower noise and power, and high circuit density. Experimental characterisation of this circuit shows full functionality and good performance both in pre- and post-irradiation (20 Mrad) conditions. The measured noise is significantly reduced compared to earlier APV versions. A description of the design and results from measurements prior to irradiation are presented.

362 citations


Journal ArticleDOI
TL;DR: In this paper, the authors developed a technique for analysis of class-E power amplifiers that are based upon a finite number of harmonics, which is applicable to classes E, C, and F as well as PAs with harmonic reactances not corresponding to those of established classes.
Abstract: Class-E operation at UHF and microwave frequencies is achieved by using transmission-line networks to provide the drain harmonic impedances of an ideal class-E power amplifier (PA). This paper develops a technique for analysis of such amplifiers that are based upon a finite number of harmonics. The technique is generally applicable to classes E, C, and F as well as PAs with harmonic reactances not corresponding to those of established classes. The analysis shows that the maximum achievable efficiency depends not upon the class of operation, but upon the number of harmonics employed. For any set of harmonic reactances, the same maximum efficiency can be achieved by proper adjustment of the waveforms and the fundamental-frequency load reactance. The power-output capability depends upon the harmonic reactances and is maximum for class F.

342 citations


Reference BookDOI
31 May 2001
TL;DR: In this article, the essential principles, operating characteristics, and current technology of the main fiber laser and amplifier devices based on rare earth-doped silica and fluorozirconate fibers are discussed.
Abstract: Rare-Earth-Doped Fiber Lasers and Amplifiers, Second Edition discusses the essential principles, operating characteristics, and current technology of the main fiber laser and amplifier devices based on rare-earth-doped silica and fluorozirconate fibers. Covering all aspects of this revolutionary technology, the book reviews fiber fabrication methods and the basic spectroscopic properties of rare-earth ions in glasses, concentrates on the most important fiber laser sources, examines several advances in fiber amplifiers, and analyzes new findings and improvements in single-frequency operation, frequency tenability, broadband fiber sources, and blue-green and far-infrared fiber lasers.

320 citations


Journal ArticleDOI
TL;DR: The rotary traveling-wave oscillators (RTWOs) as mentioned in this paper represent a new transmission-line approach to gigahertz-rate clock generation, which operates by creating a rotating traveling wave within a closed-loop differential transmission line.
Abstract: Rotary traveling-wave oscillators (RTWOs) represent a new transmission-line approach to gigahertz-rate clock generation. Using the inherently stable LC characteristics of on-chip VLSI interconnect, the clock distribution network becomes a low-impedance distributed oscillator. The RTWO operates by creating a rotating traveling wave within a closed-loop differential transmission line. Distributed CMOS inverters serve as both transmission-line amplifiers and latches to power the oscillation and ensure rotational lock. Load capacitance is absorbed into the transmission-line constants whereby energy is recirculated giving an adiabatic quality. Unusually for an LC oscillator, multiphase (360/spl deg/) square waves are produced directly. RTWO structures are compact and can be wired together to form rotary oscillator arrays (ROAs) to distribute a phase-locked clock over a large chip. The principle is scalable to very high clock frequencies. Issues related to interconnect and field coupling dominate the design process for RTWOs. Taking precautions to avoid unwanted signal couplings, the rise and fall times of 20 ps, suggested by simulation, may be realized at low power consumption. Experimental results of the 0.25-/spl mu/m CMOS test chip with 950-MHz and 3.4-GHz rings are presented, indicating 5,5-ps jitter and 34-dB power supply rejection ratio (PSRR). Design errors in the test chip precluded meaningful rise and fall time measurements.

319 citations


Journal ArticleDOI
TL;DR: Frequency-compensation techniques of single-, two- and three-stage amplifiers based on Miller pole splitting and pole-zero cancellation are re-analyzed and several proposed methods to improve the published topologies are given.
Abstract: Frequency-compensation techniques of single-, two- and three-stage amplifiers based on Miller pole splitting and pole-zero cancellation are re-analyzed. The assumptions made, transfer functions, stability criteria, bandwidths, and important design issues of most of the reported topologies are included. Several proposed methods to improve the published topologies are given. In addition, simulations and experimental results are provided to verify the analysis and to prove the effectiveness of the proposed methods.

315 citations


Journal ArticleDOI
TL;DR: In this article, an extension of the Doherty amplifier, which maintains high efficiency over a wide range of output power (>6 dB), is demonstrated experimentally with InGaP/GaAs heterojunction bipolar transistors at 950 MHz.
Abstract: An extension of the Doherty amplifier, which maintains high efficiency over a wide range of output power (>6 dB), is presented in this paper. This extended Doherty amplifier is demonstrated experimentally with InGaP/GaAs heterojunction bipolar transistors at 950 MHz. Power-added efficiency (PAE) of 46% is measured at P/sub 1dB/ of 27.5 dBm and 45% is measured at 9 dB backed off from P/sub 1dB/. Additionally, PAE of at least 39% is maintained for over an output power range of 12 dB backed off from P/sub 1dB/. This is an improvement over the classical Doherty amplifier, where high efficiency is typically obtained up to 5-6 dB backed off from P/sub 1dB/. Compared to a single transistor class-B amplifier with similar gain and P/sub 1dB/, the extended Doherty amplifier has PAE 2.6 /spl times/ higher at 10 dB back off and 3 /spl times/ higher at 20 dB back off from P/sub 1dB/. Under different bias and output matching conditions, the amplifier was also evaluated with CDMA signals. At the highest measured power of 25 dBm, the extended Doherty amplifier achieves a PAE of 45% with an adjacent channel power ratio of -42 dBc. Generalized design equations are also derived and the consequences of finite device output impedance on amplifier gain and linearity are explored.

306 citations


Book ChapterDOI
01 Jan 2001
TL;DR: In this paper, the theory of the feedback principle and its application in a carrier-in-cable system were described and explained. And the results of this trial were highly satisfactory and demonstrated conclusively the correctness of the theory and the practicability of its commercial application.
Abstract: This paper describes and explains the theory of the feedback principle and then demonstrates how stability of amplification and reduction of modulation products, as well as certain other advantages, follow when stabilized feedback is applied to an amplifier. The underlying principle of design by means of which singing ia avoided is next set forth. The paper concludes with some examples of results obtained on amplifiers which have been built employing this new principle. The carrier-in-cable system dealt with in a companion paper1 involves many amplifiers in tandem with many telephone channels passing through each amplifier and constitutes, therefore, an ideal field for application of this feedback principle. A field trial of this system was made at Morristown, New Jersey, in which seventy of these amplifiers were operated in tandem. The results of this trial were highly satisfactory and demonstrated conclusively the correctness of the theory and the practicability of its commercial application.

Journal ArticleDOI
TL;DR: In this article, the Fourier coefficients for the maximum power and efficiency of a class-F power amplifier with a given set of controlled harmonics were derived for maximally flat waveforms.
Abstract: A class-F power amplifier (PA) improves efficiency and power-output capability (over that of class A) by using selected harmonics to shape its drain-voltage and drain-current waveforms. Typically, one waveform (e.g., voltage) approximates a square wave, while the other (e.g., current) approximates a half sine wave. The output power and efficiency of an ideal class-F PA can be related to the Fourier coefficients of the waveforms, and Fourier coefficients for maximally flat waveforms have been determined. This paper extends that theory by determining the coefficients for the maximum power and efficiency possible in a class-F PA with a given set of controlled harmonics.

Journal ArticleDOI
TL;DR: In this paper, different methods of linearization for power amplifiers are compared and compared, including the linearization of SSPAs, T2TAs, and klystron power amplifier.
Abstract: This article discusses techniques for the cancellation of distortion (linearization) in power amplifiers. Different methods of linearization are introduced and compared. The linearization of solid-state power amplifiers (SSPAs), traveling-wave tube amplifiers (TWTAs) and klystron power amplifiers (KPAs) are considered. Although the focus of this article is on power amplifiers, many of the techniques are applicable to other components such as mixers, low-noise amplifiers, and even photonic components, such as lasers and optical modulators.

Journal ArticleDOI
TL;DR: A broadband continuous-wave (CW) pumped fiber-based parametric amplifier with 39 dB of internal gain and wavelength conversion efficiency, corresponding to a black box gain/efficiency of 38 dB, is demonstrated in this article.
Abstract: A broad-band continuous-wave (CW) pumped fiber-based parametric amplifier with 39 dB of internal gain and wavelength conversion efficiency, corresponding to a black box gain/efficiency of 38 dB, is demonstrated. Bit-error-rate (BER) measurements indicate performance comparable to erbium-doped fiber amplifiers (EDFAs). These amplifiers may thus find new applications in future lightwave systems.

Journal ArticleDOI
TL;DR: In this paper, the quantum-dot (QD) excited state carriers were found to act as a reservoir for the optically active ground state carriers resulting in an ultrafast gain recovery as long as the excited state is well populated.
Abstract: Measurements of ultrafast gain recovery in self-assembled InAs quantum-dot (QD) amplifiers are explained by a comprehensive numerical model. The QD excited state carriers are found to act as a reservoir for the optically active ground state carriers resulting in an ultrafast gain recovery as long as the excited state is well populated. However, when pulses are injected into the device at high-repetition frequencies, the response of a QD amplifier is found to be limited by the wetting-layer dynamics.

Patent
05 Jul 2001
TL;DR: In this article, a wideband predistortion system consisting of a data structure in which each element stores a set of compensation parameters (preferably including FIR filter coefficients) for predistorting the wideband input transmission signal is proposed.
Abstract: A wideband predistortion system compensates for a nonlinear amplifier's frequency and time dependent AM-AM and AM-PM distortion characteristics. The system comprises a data structure in which each element stores a set of compensation parameters (preferably including FIR filter coefficients) for predistorting the wideband input transmission signal. The parameter sets are preferably indexed within the data structure according to multiple signal characteristics, such as instantaneous amplitude and integrated signal envelope, each of which corresponds to a respective dimension of the data structure. To predistort the input transmission signal, an addressing circuit digitally generates a set of data structure indices from the input transmission signal, and the indexed set of compensation parameters is loaded into a compensation circuit which digitally predistorts the input transmission signal. This process of loading new compensation parameters into the compensation circuit is preferably repeated every sample instant, so that the predistortion function varies from sample-to-sample. The sets of compensation parameters are generated periodically and written to the data structure by an adaptive processing component that performs a non-real-time analysis of amplifier input and output signals. The adaptive processing component also implements various system identification processes for measuring the characteristics of the power amplifier and generating initial sets of filter coefficients. In an antenna array embodiment, a single adaptive processing component generates the compensation parameters sets for each of multiple amplification chains on a time-shared basis. In an embodiment in which the amplification chain includes multiple nonlinear amplifiers that can be individually controlled (e.g., turned ON and OFF) to conserve power, the data structure separately stores compensation parameter sets for each operating state of the amplification chain.

Journal ArticleDOI
05 Feb 2001
TL;DR: A fully integrated CMOS transceiver tuned to 2.1 GHz consumes 46 mA in receive-mode and 47mA in transmit-mode from a 2.7 V supply and delivers a GFSK modulated spectrum at an output power of 5 dBm.
Abstract: A fully integrated CMOS transceiver tuned to 2.4 GHz consumes 46 mA in receive mode and 47 mA in transmit mode from a 2.7-V supply. It includes all the receive and transmit building blocks, such as frequency synthesizer, voltage-controlled oscillator (VCO), power amplifier, and demodulator. The receiver uses a low-IF architecture for higher level of integration and lower power consumption. It achieves a sensitivity of -82 dBm at 0.1% BER, and a third-order input intercept point (IIP3) of -7 dBm. The direct-conversion transmitter delivers a GFSK modulated spectrum at a nominal output power of 4 dBm. The on-chip voltage controlled oscillator has a close-in phase-noise of -120 dBc/Hz at 3-MHz offset.

Book
01 Jan 2001
TL;DR: In this paper, the authors present a two-stage OTA with active load and a Cascode with Cascodes Load, and discuss the design of the two stage OTA.
Abstract: Preface. 1: The MOS Transistor. 1.1. Electrical Conduction in Solids. 1.2. Fermi-Dirac Statistic. 1.3. Properties of Materials. 1.4. CMOS Technology. 1.5. MOS Threshold Voltage. 1.6. I-V Characteristics. 1.7. Equivalent Circuits. 1.8. More Sophisticated Models. 1.9. Noise. 1.10. Layout of Transistors. 1.11. Design Rules. 1.12. References. 1.13. Problems. 2: Resistors, Capacitors, Switches. 2.1. Integrated Resistors. 2.2. Integrated Capacitors. 2.3. Analog Switches. 2.4. Layout of Switches. 2.5. References. 2.6. Problems. 3: Basic Building Blocks. 3.1. Inverter with Active Load. 3.2. Cascode. 3.3. Cascode with Cascode Load. 3.4. Source Follower. 3.5. Threshold Independent Level-Shift. 3.6. Improved Output Stages. 3.7. References. 3.8. Problems. 4: Current and Voltage Sources. 4.1. Current Mirrors. 4.2. Current References. 4.3. Voltage Biasing. 4.4. Voltage References. 4.5. References. 4.6. Problems. 5: CMOS Operational Amplifiers. 5.1. General Issues. 5.2. Performance Characteristics. 5.3. Basic Architecture. 5.4. Two Stages Amplifier. 5.5. Frequency Response and Compensation. 5.6. Slew Rate. 5.7. Design of a Two Stage OTA: Guidelines. 5.8. Single Stage Schemes. 5.9. Class AB Amplifiers. 5.10. Fully Differential Op-Amps. 5.11. Micro-Power OTA's. 5.12. Noise Analysis. 5.13. Layout. 5.14. References. 5.15. Problems. 6: CMOS Comparators. 6.1. Introduction. 6.2. Performance Characteristics. 6.3. General Design Issues. 6.4. Offset Compensation. 6.5. Latches. 6.6. References. 6.7. Problems. Appendix A. Appendix B. Appendix C. Index.

Journal Article
TL;DR: In this article, a Doherty amplifier with full load matching circuits of the carrier and peaking amplifiers at both low and high power levels is demonstrated for the first time, and the circuit elements and bias points are designed and optimized using a large-signal harmonic balance simulation to offer simultaneous improvements in linearity and efficiency.
Abstract: A Doherty amplifier with full load matching circuits of the carrier and peaking amplifiers at both low and high power levels is demonstrated for the first time. In the circuit design, sections of transmission lines are inserted in the load matching network for power-level-dependent load impedances. The circuit elements and bias points are designed and optimized using a large-signal harmonic balance simulation to offer simultaneous improvements in linearity and efficiency. Two 1.4 GHz Doherty amplifiers have been implemented using silicon LDMOS FETs. The RF performances of the Doherty amplifier-I (a combination of a class B carrier amplifier and a bias-tuned class C peaking amplifier) have been compared with those of a class B amplifier alone. The Doherty amplifier-II (a combination of a class AB carrier amplifier and a bias-tuned class C peaking amplifier) has been compared with a class AB amplifier alone. The new Doherty amplifiers show an improved linearity as well as higher efficiency.

Journal ArticleDOI
Changsik Yoo1, Qiuting Huang1
TL;DR: By employing these design techniques, the power amplifier can deliver 0.9-W output power to 50-/spl Omega/ load at 900 MHz with 41% power-added efficiency (PAE) from a 1.8-V supply without stressing the active devices.
Abstract: A power amplifier for wireless applications has been implemented in a standard 0.25-/spl mu/m CMOS technology. The power amplifier employs class-E topology to exploit its soft-switching property for high efficiency. The finite dc-feed inductance in the class-E load network allows the load resistance to be larger for the same output power and supply voltage than that for an RF choke. The common-gate switching scheme increases the maximum allowable supply voltage by almost twice from the value for a simple switching scheme. By employing these design techniques, the power amplifier can deliver 0.9-W output power to 50-/spl Omega/ load at 900 MHz with 41% power-added efficiency (PAE) from a 1.8-V supply without stressing the active devices.

Journal ArticleDOI
TL;DR: In this article, current-mode class-D (CMCD) power amplifiers with zero voltage switching have been proposed to eliminate the output capacitance discharge loss and achieve high efficiency at RF frequencies.
Abstract: We show that current-mode class-D (CMCD) power amplifiers can achieve high efficiency at RF frequencies. In contrast with conventional voltage-mode class-D amplifiers, the CMCD features "zero voltage switching," which eliminates the output capacitance discharge loss. Experimental CMCD amplifiers with 76.3% power-added efficiency (PAE) at 290-mW output and 71.3% PAE at 870-mW output are demonstrated using GaAs FETs at 900 MHz.

Patent
31 Jan 2001
TL;DR: An ultrasonic driving apparatus consists mainly of a digital oscillatory circuit, an amplifier, a detection circuit, a phase difference detector, a register, a data transfer circuit, and a switching circuit.
Abstract: An ultrasonic driving apparatus consists mainly of a digital oscillatory circuit, an amplifier, a detection circuit, a phase difference detection circuit, a register, a data transfer circuit, and a switching circuit. The digital oscillatory circuit is used to drive an ultrasonic transducer at the resonance frequency of the ultrasonic transducer. The amplifier amplifies a driving signal output from the digital oscillatory circuit. The detection circuit detects the phase θv of an applied voltage and the phase θi of an induced current from the driving signal applied to the ultrasonic transducer via the amplifier. The phase difference detection circuit detects a difference between the phases θv and θi. The register holds digital frequency data with which a frequency at which the digital oscillatory circuit is oscillated is determined, and changes the digital frequency data. The data transfer circuit transfers the digital frequency data to the register. The switching circuit is interposed between the phase difference detection circuit and register.

Journal ArticleDOI
TL;DR: In this paper, the authors studied the combined effects of OPA and Raman gain theoretically and experimentally, and showed that the influence of the Raman effect is relatively small, as predicted by the theory.
Abstract: Theory shows that the gain bandwidth of a one-pump fiber optical parametric amplifier (OPA) using highly nonlinear fiber (HNLF) could be more than 200 nm. Under these circumstances, the OPA gain would overlap the pump-induced Raman gain. We have studied the combined effects of OPA and Raman gain theoretically and experimentally. The experimental results demonstrate a 200-nm bandwidth from a single fiber-optical amplifier and also verify that the influence of the Raman effect is relatively small, as predicted by the theory.

Book
01 Jan 2001
TL;DR: In this article, the authors present a wireless system for wireless communication, which is based on Transistor Oscillators and Frequency Synthesizers (FOS) and Amplifiers.
Abstract: Introduction to Wireless Systems. Transmission Lines and Microwave Networks. Noise and Distortion in Microwave Systems. Antennas and Propagation for Wireless Systems. Filters. Amplifiers. Mixers. Transistor Oscillators and Frequency Synthesizers. Modulation Techniques. Receiver Design. Appendices. Index.

Patent
02 Feb 2001
TL;DR: In this article, the power amplifier was incorporated as a fundamental component of a modulator, using polar modulation techniques, which achieved high energy efficiency in the conversion of applied DC power to output RF signal power.
Abstract: The present invention, generally speaking, incorporates the power amplifier as a fundamental constituent of a modulator, using polar modulation techniques. Thus, it is possible to achieve the combination of precision signal generation (including envelope variations) along with high energy efficiency in combinations not possible heretofore. In accordance with one embodiment of the invention, a modulated radio (passband) signal generator produces high quality signals of general type, which specifically includes signals with varying envelopes. Signals are generated with high energy efficiency in the conversion of applied DC power to output RF signal power. The result is longer battery life for products such as mobile phone handsets. Dramatically improved efficiency also allows for a dramatic reduction (10 to 1 or greater) in the size of any required heatsink for the radio transmitter, which significantly lowers both cost and size. Furthermore, continuous operation of these radio transmitters is made possible with small temperature rises using small heatsinks, or even without any heatsink components. This provides for high operating reliability, as well as for greater throughput due to the longer operating time allowed. Another aspect of the invention allows the generation of high quality signals with wide bandwidth, without the need for continuous feedback during operation. This further reduces costs by greatly simplifying the design, manufacturing, and complexity of the transmitter circuitry.

Patent
23 Jul 2001
Abstract: Systems and methods for amplifying an RF input signal include employing a moderately power efficient wide bandwidth device, such as an AB-type amplifier, to amplify the power residing in the high frequency components of the input signal, and a highly power efficient narrow bandwidth device, such as a synchronous buck DC/DC converter, to amplify the power residing in the low frequency components of the input signal. The amplified low frequency components and high frequency components are then combined to produce an amplified replica of the RF input signal. A positive feedback loop is provided between the output of the AB-type amplifier and the input of the DC/DC converter to provide stability to the amplified RF signal. A negative feedback loop is provided between the output of the DC/DC converter and the input of the AB-type amplifier to minimize interference introduced by the DC/DC converter.

Journal ArticleDOI
TL;DR: In this article, the authors present an initial investigation of a fiber optical system which may be used both for intra-cavity and for ring-down measurements of absorption losses.
Abstract: We present the design and initial investigation of a fibre optical system which may be used both for intra-cavity and for ring-down measurements of absorption losses. The system consists of a fibre loop containing a length of erbium-doped fibre pumped at 980 nm, with gain adjustment below or above threshold for the two types of operation. The fibre loop is constructed from standard fibre optical components and includes a micro-optical gas cell. The intended application is for measurement of levels of trace gases which possess near-IR absorption lines within the gain bandwidth of the erbium fibre amplifier. We discuss the key issues involved in operation of the system and the level of sensitivity required. Our initial experimental investigations have demonstrated that ring-down times of several microseconds can be obtained, which can be altered through adjustment of the attenuation or gain factor of the loop. Gain control is one of the most important issues and we explain how this may be achieved.

Patent
David R. Pehlke1
19 Dec 2001
TL;DR: In this paper, a Doherty amplifier circuit is provided comprising a digital signal processor for producing separated amplitude and phase modulated waveforms, and a plurality of class E amplifiers in communication with the signal processor.
Abstract: A Doherty amplifier circuit is provided comprising a digital signal processor for producing separated amplitude and phase modulated waveforms, and a plurality of class E amplifiers in communication with the digital signal processor. Each of the amplifiers has an input for receiving signals corresponding to the waveforms, and outputs linked to a shared load network. In this way, a scheme for efficient amplification of amplitude modulated waveforms is achieved across a wide dynamic range and for a large peak-to-average ratio using only input modulated techniques.

Patent
23 Mar 2001
TL;DR: In this paper, an active filter for reducing the common mode current in a pulse width modulated drive circuit driving a load was proposed. But the active filter was not used to measure the output current of the drive circuit.
Abstract: An active filter for reducing the common mode current in a pulse width modulated drive circuit driving a load, said drive circuit comprising an a-c source, a rectifier connected to said a-c source and producing a rectified output voltage connected to a positive d-c bus and a negative d-c bus, a PWM inverter having input terminals coupled to said positive d-c bus and negative d-c bus and having a controlled a-c output, a load driven by said a-c output of said PWM inverter, a ground wire extending from said load, and a current sensor for measuring the common mode current in said drive circuit, said current sensor producing an output current related to said common mode current; said active filter comprising a first and second transistor, each having first and second main electrodes and a control electrode, and an amplifier circuit driving said transistors; said first electrode of said first and second transistor coupled to a common node, said second electrodes of said first and second transistors being coupled to said positive d-c bus and said negative d-c respectively; said amplifier circuit having an input coupled to said output of said current sensor and having an output connected to said control electrodes; and a d-c isolating capacitor connecting said common node of said first electrode of said first and second transistors to said ground wire; and wherein said current sensor is a current transformer having a primary winding connected in series with said ground wire and a secondary winding connected as the signal input to the amplifier circuit.

Book
Mihai Albulet1
01 Jan 2001
TL;DR: In this thorough overview, Mihai Albulet presents a full account of RF amplifiers and shows that understanding large-signal RF signals is simply a matter of understanding basic principles and their applications.
Abstract: In this thorough overview, Mihai Albulet presents a full account of RF amplifiers and shows that understanding large-signal RF signals is simply a matter of understanding basic principles and their applications. In addition to discussing the basic concepts used in the analysis and design of RF power amplifiers, detailed mathematical derivations indicate the assumptions and limitations of the presented results, allowing the reader to calculate their usefulness in practical designs. Covered are amplification classes, circuit topologies, bias circuits, and matching networks.