AND gate

About: AND gate is a research topic. Over the lifetime, 11860 publications have been published within this topic receiving 109726 citations.

Suspended gate field effect semiconductor pressure transducer device

Abstract: A capacitive pressure transducer comprising: field effect solid state electronic device having a semiconductor gate area, an insulating layer and a gate element; the gate element being made of conducting material and being constructed to move in response to pressure differentials on the two sides thereof so as to function as a diaphragm; the gate element being hermetically sealed along its perimeter with the said insulating layer; the gate element also being a conductor so as to change the capacitance between the said gate element and the semiconductor of said field effect solid state device and cause any change in the output of said solid state electronic device to be a measure of the change of the pressure; and a method of making the suspended diaphragm and gate element.

MUQUT: Multi-Constraint Quantum Circuit Mapping on NISQ Computers: Invited Paper

Abstract: Rapid advancement in the domain of quantum technologies have opened up researchers to the real possibility of experimenting with quantum circuits, and simulating small-scale quantum programs. Nevertheless, the quality of currently available qubits and environmental noise pose a challenge in smooth execution of the quantum circuits. Therefore, efficient design automation flows for mapping a given algorithm to the Noisy Intermediate Scale Quantum (NISQ) computer becomes of utmost importance. State-of-the-art quantum design automation tools are primarily focused on reducing logical depth, gate count and qubit counts with recent emphasis on topology-aware (nearest-neighbour compliance) mapping. In this work, we extend the technology mapping flows to simultaneously consider the topology and gate fidelity constraints while keeping logical depth and gate count as optimization objectives. We provide a comprehensive problem formulation and multi-tier approach towards solving it. The proposed automation flow is compatible with commercial quantum computers, such as IBM QX and Rigetti. Our simulation results over 10 quantum circuit benchmarks, show that the fidelity of the circuit can be improved up to 3.37 × with an average improvement of 1.87 ×.

Switching theory

Abstract: Switching theory is the abstract mathematical formalization used in the logic design of digital networks. It is so called because, when it was first developed by Claude Shannon (q.v.) in 1938, most logic networks were implemented using switches and electromechanical devices such as relays. Modern logic networks are usually constructed using electronic integrated circuits comprising networks of logical elements such as inverters, AND gates, and OR gates. These elements operate on binary signals; they are constrained to take on only two different voltage values (such as 0 or 5 volts). Switching theory used a two-valued Boolean algebra (sometimes called Switching algebra) as a notation to represent the operation of such logic networks. The two algebraic values are most often represented as "0" and "1," although "T" and "F" are sometimes used to emphasize the relation to propositional logic. The correspondence between the algebraic symbol used to represent a signal and the voltage present is arbitrary, although the positive logic convention in which the algebraic 1 represents the more positive voltage signal is now most common. Each input or output signal of a logic network is represented by a Boolean variable. Boolean algebra has three basic operations: inversion, logical addition, and logical multiplication; these operations are implemented directly by logic gates called inverters, OR gates, and AND gates. The symbols most often used to represent these gates are shown in Fig. 1. The output of an inverter always takes on the value opposite to the value of its input., The output of an OR gate is always equal to 1 unless all of its inputs are equal to 0, in which case the output is 0. The output of an AND gate is always equal to 0 unless all of its inputs are equal to 1, in which case the output is 1.

Ultrafast soliton-trapping AND gate

Abstract: An ultrafast, all-optical, soliton-trapping AND gate that consists of a birefringent optical fiber followed by a frequency filter is demonstrated. The gate is sensitive to the timing of the input pulses and provides an output with a large energy contrast. The performance of the gate is characterized by varying the total input energy, the ratio between the energies of the two input pulses, and the arrival-time difference between the input pulses. It is shown that the gate efficiency (characterized by its ON-OFF contrast ratio) increases with increasing pulse energy up to the limit where Raman effects become dominant in the fiber, and the optimal performance of the gate is obtained with two input solitons having equal energies. The gate efficiency degrades with increasing difference of arrival time of the two input pulses, but a contrast ratio of 5:1 can still be obtained for a full pulse width of timing mismatch. The experimental results are in agreement with numerical simulations using the coupled nonlinear Schrodinger equations. >

Non-volatile memory (nvm) and logic integration

Abstract: A method of forming an NVM cell and a logic transistor uses a semiconductor substrate. In an NVM region, a polysilicon select gate of the NVM cell is formed over a first thermally-grown oxygen-containing layer, and in a logic region, a work-function-setting material is formed over a high-k dielectric and a polysilicon dummy gate is formed over the work-function-setting material. Source/drains, a sidewall spacer, and silicided regions of the logic transistor are formed after the first thermally-grown oxygen-containing layer is formed. The polysilicon dummy gate is replaced by a metal gate. The logic transistor is protected while the NVM cell is then formed including forming a charge storage region.