AND gate

About: AND gate is a research topic. Over the lifetime, 11860 publications have been published within this topic receiving 109726 citations.

Influence of Different Gate Biases and Gate Lengths on Parasitic Source Access Resistance in AlGaN/GaN Heterostructure FETs

Abstract: The AlGaN/GaN heterostructure FETs with different gate lengths were fabricated. Under different gate biases or for the devices with different gate lengths, the measured parasitic source access resistance values were different. By the analysis of different scattering mechanisms and polarization charge distribution, it is found that the gate bias and gate length can change the polarization Coulomb field scattering, and then affect the parasitic source access resistance. At last, the systematic scattering theories were adopted and the influence of different gate biases and gate lengths on parasitic source access resistance was further confirmed in theory.

Multiple control circuit

Abstract: An improved multiple control circuit is for use with an anti-lock brake control assembly. It includes a plurality of control logic circuits and an output decision circuit. The control circuits simultaneously receive redundant sensor signals representative of wheel speeds and carry out logical operations based upon the input signals to simultaneously transmit redundant command signals to control the brake pressure of the wheels. Such output signals are not directly sent to actuators, such as brake pressure control valves, but are instead sent through the output decision circuit. If the command signals of the control circuits should be different for some reason, the output decision circuit selects and transmits to the actuators the command signals to control the automobile in the safest manner based upon AND logic and OR logic. Each control circuit is connected to a comparator which compares the output signals of the control circuit with those of the output decision circuit. If there is a discrepancy between the signals and if such a discrepancy persists for a predetermined period of time, a failsafe signal is produced to disable the anti-lock brake control system.

Process for the production of a pair of complementary field effect transistors

Abstract: A process for the production of a pair of complementary field effect transistors which have very short channel lengths. A lightly doped semiconductor layer is deposited on an electrically insulating substrate. A gate insulator layer is applied onto which first and second gate electrodes are formed for the two transistors. A masking oxide layer is applied to the exposed surface regions of the gate insulating layer and the gate electrodes. An opening is etched into the masking layer and gate insulator layer lying adjacent each gate electrode. Charge carriers of first and second types are diffused through the respective openings into the region of the semiconductor layer lying below to dope the same. This doping extends partially into the semiconductor region lying beneath a portion of the respective gate electrodes. All parts of the gate insulator layer except those parts lying beneath the gate electrodes are removed. Charge carriers of the second and first type are diffused into the semiconductor layer on opposite sides of the first and second gate electrodes, respectively, while leaving a portion of the first and second doped regions unchanged beneath the first and second gate electrodes. The doped regions of the semiconductor layer on opposite sides of the first and second gate electrodes provide the source and drain regions of the first and second field effect transistors, respectively.

AlN/GaN HEMTs with high‐κ ALD HfO2 or Ta2O5 gate insulation

Abstract: AlN/GaN Metal-Insulator-Semiconductor High Electron Mobility Transistors (HEMTs) have been grown and fabricated which utilize a 6 nm thick atomic layer deposited film of either Ta2O5 or HfO2 for gate insulation. Drain, transfer, and gate current characteristics are compared between both structures, showing a measurable difference in threshold voltage and transconductance. The cause is highlighted by the results of capacitance-voltage analysis which showed 10 MHz dielectric constants of 8.7 and 11.7 for the HfO2 and Ta2O5 films, respectively. Furthermore, interface trap state density was extracted by Terman's method and compared between films. HEMT small signal frequency performance was representative of the different sub-micron gate lengths. Consideration of the compared electrical results suggests that at this stage in ALD development, Ta2O5 appears better suited for gate insulation of AlN/GaN HEMTs. (© 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

A shifting register unit and a driving method thereof, a gate driving circuit, and a display device

Abstract: The invention provides a shifting register unit and a driving method thereof, a gate driving circuit, and a display device. The shifting register unit is provided with: a pull-down holding module, configured to pull down potential of a pull-up node and gate signal output end; a resetting module, configured to reset, during a touch phase of a frame of time, potential of a signal output by the gate signal output end to potential of a fourth signal; and a first signal output controlling module, configured to control, during a display phase of a frame of time, a first signal output end to output a first common electrode signal, and control, during the touch phase of a frame of time, the first signal output end to output a first signal that is input to a first signal input end, wherein, the first signal is a signal that is input, during the touch phase, to a common electrode connected to the shifting register unit. Thus the signal received by the common electrode can be output by the shifting register unit, thereby simplifying the structure of the display device, and reducing the cost of the display device.