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AND gate

About: AND gate is a research topic. Over the lifetime, 11860 publications have been published within this topic receiving 109726 citations.


Papers
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Patent
07 Feb 1998
TL;DR: In this paper, the authors proposed a method for encrypting and decrypting using permutation, concatenation and decatenation together with rotation and arithmetic and logic combining with elements or digits or characters from random, pseudo-random, or arbitrary sources wherein the plaintext may be partitioned, block-by-block.
Abstract: Apparatus and method for encrypting and decrypting using permutation, concatenation and decatenation together with rotation and arithmetic and logic combining with elements or digits or characters from random, pseudo-random, or arbitrary sources wherein the plaintext may be partitioned, block-by-block, the block size being a user selectable power of 2 in size. The data bytes in the input block are selected M bytes at a time, where M≧2, with permuted addressing to form a single concatenated data byte, CDB. The CDB is modified by rotating (or barrel shifting) a random bit distance. The CDB may also be modified before or after rotation by simple arithmetic/logic operations. After modification, the CDB is broken up into M bytes and each of the M bytes is placed into the output block with permuted addressing. The output block, or ciphertext, may again be used as an input block and the process repeated with a new output block. This scheme may be used as an encryption method by itself or in conjunction other block encryption methods. The latter may be accomplished by using this scheme between successive stages of other encryption methods on blocked data, or between an internal stage of these other methods. The sources of random numbers used to determine the distance for the random rotation operation can be from: a pseudo-random number generator, sampled music CD-ROMs, entries in tables, arrays, buffers, or any other digital source.

27 citations

Patent
23 Jul 2001
TL;DR: A hinge coupling and a lock for connecting a stationary handrail to a gate arm for a gate is described in this article, where a fixed connector and a mobile connector are connected to a middle link by pins, enabling the gate arm to pivot through a 180° angle.
Abstract: A hinge coupling and a lock for connecting a stationary handrail to a gate arm for a gate. The gate in closed position retains the structural integrity and peripheral profile of the handrail. The hinge coupling consist of a fixed connector and a mobile connector, both pivotally connected to a middle link by pins. The components of the hinge coupling pivot about the pins, enabling the gate arm to pivot through a 180° angle. One hinge connector is inserted and secured into an open end of the stationary handrail. The other connector is inserted and secured into an open end of the gate arm. The lock consists of two mating active and passive components that are fastened to respective terminal ends of the handrail and gate arm. The lock components are provided with a manually releasable latch. All components in the closed position of the gate compactly fit together and are shaped to provide peripheral continuity.

27 citations

Journal ArticleDOI
TL;DR: In this article, a comparison between single-gate (SG) and double-gate transistors performance is performed for a wide range of temperatures (10 K-300 K) and gate lengths (10-20 nm) while channel thickness is fixed at 6 nm.
Abstract: This paper presents an experimental comparison between single-gate (SG) and double-gate (DG) transistors performance. Using a novel process flow, we managed to cointegrate these two devices on the same wafer with a TiN metal gate. Short-channel effect control, static performance, and mobility are quantified for each architecture. An in-depth mobility study is performed for a wide range of temperatures (10 K-300 K) and gate lengths (10-20 nm) while channel thickness is fixed at 6 nm. This study experimentally highlights the advantages of DG devices over SG transistors. Good mobility values are obtained for both architectures and we show the advantages of ultrathin body devices over bulk transistors. Finally, we demonstrate that Coulomb scattering is the primary cause of the mobility degradation in short-channel devices

27 citations

Journal ArticleDOI
TL;DR: It is demonstrated how device subthreshold leakage current and subth threshold slope values can be favorably affected by proper back gate biasing, back gate asymmetry and gate work function engineering in combination with gate underlap engineering.

27 citations

Proceedings ArticleDOI
28 Jun 1976
TL;DR: Digital simulators are becoming a standard and necessary CAD tool in the circuit design process, capable of simulating very large circuits with a high degree of precision.
Abstract: Digital simulators are becoming a standard and necessary CAD tool in the circuit design process. The acceptance of this design aid is a result of a number of factors, the predominant one being the over-whelming size and complexity of present day logic circuits and the requirement that a complete test plan be developed for these circuits. Another factor is that recent generation logic simulators have proven to be very flexible tools, capable of simulating very large circuits with a high degree of precision.

27 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202310
202219
2021209
2020308
2019356
2018372