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AND gate

About: AND gate is a research topic. Over the lifetime, 11860 publications have been published within this topic receiving 109726 citations.


Papers
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Journal ArticleDOI
Xiao-Yu Xu1, Bing Yan1
TL;DR: The first example of a fluorescence system based on Eu(III) functionalized UiO(bpdc) (UMOFs) has been constructed for effective combination of ions recognition and logic computing.
Abstract: By taking advantage of facile preparation and sensitive recognition capacity, the first example of a fluorescence system based on Eu(III) functionalized UiO(bpdc) (UMOFs) has been constructed for effective combination of ions recognition and logic computing. All the ions, including Hg2+, Ag+, and S2− in the system are water harmful, which can be recognized through affecting energy transfer or framework structure. By the self-assembling, competing and connecting with each other, Eu(III)@UMOFs and the ions have achieved the implementation of Boolean logic network system connecting the elementary logic operations (NOR, INH, and IMP) and integrative logic operation (OR + INH), also obtaining computing keypad-lock security system by sequential logic operation. To deal with uncertain information in the analog region of nonlinear response (fluorescence and concentration), soft computation through the formulation of fuzzy logic operation has been constructed. On the basis of Boolean logic and fuzzy logic, one intelligent molecular searcher can be realized by taking chemical events (Hg2+, Ag+, and S2−) as programmable words and chemical interactions as syntax. Considering the particularity of all the input ions, the approach is helpful in developing the advanced logic program based on Eu(III)@UMOFs for application in environmental monitoring.

105 citations

Journal ArticleDOI
TL;DR: In this paper, the authors developed an approach aimed at optimizing the parameters of a network of biochemical logic gates for reduction of the "analog" noise buildup. But their work was limited to three coupled enzymatic AND gates.
Abstract: We develop an approach aimed at optimizing the parameters of a network of biochemical logic gates for reduction of the "analog" noise buildup. Experiments for three coupled enzymatic AND gates are reported, illustrating our procedure. Specifically, starch, one of the controlled network inputs, is converted to maltose by beta-amylase. With the use of phosphate (another controlled input), maltose phosphorylase then produces glucose. Finally, nicotinamide adenine dinucleotide (NAD(+)), the third controlled input, is reduced under the action of glucose dehydrogenase to yield the optically detected signal. Network functioning is analyzed by varying selective inputs and fitting standardized few-parameters "response-surface" functions assumed for each gate. This allows a certain probe of the individual gate quality, but primarily yields information on the relative contribution of the gates to noise amplification. The derived information is then used to modify our experimental system to put it in a regime of a less noisy operation.

104 citations

Patent
03 Sep 1999
TL;DR: In this article, an envelope tracking and gate biasing circuit is used to adjust the gate bias inversely with the changes in the drain voltage, which increases the voltage conveyed to the power amplifiers.
Abstract: A radio frequency signal (FIG. 2, 205) is sampled and the sample is conveyed to a video detector (220). The detected envelope amplitude is sent to an envelope tracking circuit (280), a comparator (230), and an envelope tracking and gate biasing circuit (240). Based on the instantaneous value of the envelope amplitude, the comparator (230) selects one of the available supply voltages (340) via switch drivers (270). The selected one of the available supply voltages (340) is adjusted by the envelope tracking circuit (280) and the resulting voltage output (282) is supplied to the drains of the power amplifiers (390), thus enabling operation near saturation. As the instantaneous value of the envelope amplitude increases, the comparator (230) selects higher supply voltages (340) which increases the voltage conveyed to the power amplifiers (390), thereby increasing their power output. In order to maintain constant gain performance, the envelope tracking and gate biasing circuit (240) modifies the gate bias inversely with the changes the drain voltage.

104 citations

Patent
15 Mar 2001
TL;DR: In this paper, the thickness and/or dielectric constant of the gate dielectrics is varied along the length of the channel to present a vertical electric field which varies in a manner that tends to reduce the short-channel effects and gate capacitances.
Abstract: A field effect transistor (FET) structure, and method for making the same, which further suppresses short-channel effects based on variations within the gate dielectric itself. The FET structure utilizes non-uniform gate dielectrics to alter the vertical electric field presented along the channel. The thickness and/or dielectric constant of the gate dielectric is varied along the length of the channel to present a vertical electric field which varies in a manner that tends to reduce the short-channel effects and gate capacitances.

103 citations

Journal ArticleDOI
TL;DR: This work offers an active, low-power-consuming, and universal approach to modulate semiconductor devices and logic circuits based on 2D materials with TENG, which can be used in microelectromechanical systems, human-machine interfacing, data processing and transmission.
Abstract: With the Moore's law hitting the bottleneck of scaling-down in size (below 10 nm), personalized and multifunctional electronics with an integration of 2D materials and self-powering technology emerge as a new direction of scientific research. Here, a tunable tribotronic dual-gate logic device based on a MoS2 field-effect transistor (FET), a black phosphorus FET and a sliding mode triboelectric nanogenerator (TENG) is reported. The triboelectric potential produced from the TENG can efficiently drive the transistors and logic devices without applying gate voltages. High performance tribotronic transistors are achieved with on/off ratio exceeding 106 and cutoff current below 1 pA μm-1 . Tunable electrical behaviors of the logic device are also realized, including tunable gains (improved to ≈13.8) and power consumptions (≈1 nW). This work offers an active, low-power-consuming, and universal approach to modulate semiconductor devices and logic circuits based on 2D materials with TENG, which can be used in microelectromechanical systems, human-machine interfacing, data processing and transmission.

103 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202310
202219
2021209
2020308
2019356
2018372