AND gate

About: AND gate is a research topic. Over the lifetime, 11860 publications have been published within this topic receiving 109726 citations.

Gate drive for synchronous rectifiers in resonant converters

Abstract: A resonant converter, including a transformer for separating a high-voltage (primary) side from a relatively low-voltage (secondary) side, has at least one synchronous rectifier and an auxiliary sense winding coupled to the gate thereof. The input capacitances of the synchronous rectifiers are reflected to the primary side and the secondary side by the square of the ratio of the number of auxiliary sense winding turns to the number of primary and secondary winding turns, respectively, thereby reducing the required size of the discrete resonant capacitor. In one embodiment, a gate bias voltage approximately equal to the device threshold voltage is applied to the gate of the synchronous rectifiers. The auxiliary sense windings are etched into a conductive film pattern of the secondary windings. The auxiliary sense windings provide nearly identical secondary and gate drive voltages so that the synchronous rectifiers are gated substantially at the zero-voltage crossings of the secondary winding voltages. The result is a substantially lossless gate drive for synchronous rectifiers in high power density resonant converters.

Apparatus and method for opening and closing a gate

Abstract: A gate opening and closing apparatus for moving a gate between a gate closed position which covers an access opening and a gate opened position. The apparatus comprises an electric motor for driving the gate between the open position and the closed position. A connecting arrangement connects the electric motor to the gate in order to enable powered movement of the gate between the gate opened and gate closed positions. A control unit in the form of a microprocessor control unit is operatively connected to the electric motor for control of the same and hence control of the movement of the gate. The gate normally remains unlocked at the closed position and is only locked when a force is applied to the gate tending to move same to the open position. In one embodiment, a positive locking mechanism, such as a solenoid lock may be provided and which is automatically locked when an opening force is applied to the gate. In another embodiment, the gate is not positively locked and the electric motor applies a closing force to the gate to overcome any effort of an opening movement. The gate opening and closing mechanism is uniquely constructed in that there is no gear box which would otherwise preclude a manual opening of the gate in the event of emergency.

Method of forming self-registering source, drain, and gate contacts for FET transistor structures

Abstract: The present invention provides a silicon gate FET and associated integrated circuit structure in which a second level of polysilicon is selectively oxidized to provide insulating regions where desired. Regions of the polysilicon which were not oxidized are suitably doped to function as electrical interconnects to the source and drain regions in the substrate and to the gate. In the preferred embodiment, a metallic interconnection is made between the gate and drain or source region with the second level of polysilicon.

Terahertz wave detection performance of photoconductive antennas: Role of antenna structure and gate pulse intensity

Abstract: We studied the receiver performance of two photoconductive antennas (bow tie and dipole antennas) fabricated on the same low-temperature-grown GaAs substrate to clarify the effect of the antenna structure and gate pulse intensity on terahertz wave detection. We observed the gate pulse intensity dependence of the temporal profiles of the terahertz waves or terahertz spectra. For both antennas, the sensitivity in the low-frequency regime (<0.5THz) was enhanced compared to that in the high-frequency regime for large gate pulse intensities. This is because the carrier trap time increased due to the saturation of the GaAs defect levels. We also observed that the peak-to-peak amplitude of the terahertz wave detected by one antenna was not always larger than that detected by the other antenna, and the peak-to-peak amplitude of the bow tie antenna was larger (smaller) than that of the dipole antenna when the gate pulse intensity was high (low). This was explained by the gate pulse intensity dependence of the freq...

Semiconductor integrated circuit

Abstract: PROBLEM TO BE SOLVED: To provide an IC incorporating a voltage comparator circuit which is operated at a low voltage, has a small pattern area and improved detecting precision. SOLUTION: This semiconductor integrated circuit incorporates a voltage comparator circuit 10 which is provided with a PMOS transistor P1 whose source is connected to a VDD1 node, and whose drain and gate are interconnected, an NMOS transistor N1 whose drain is connected to the drain of the PMOS transistor, and whose source is connected to a GND node, and whose gate is applied with bias potential, a PMOS transistor P2 whose source is connected to a VDD2 node, and an NMOS transistor N2 whose drain is connected to the drain of the PMOS transistor, and whose source is connected to the GND node, and whose gate is applied with the same bias potential as that of the NMOS transistor N1. Then, signals in different logical levels are outputted from the drain of the PMOSFET according toe the compared result of the scales of the VDD1 and VDD2.