scispace - formally typeset


About: AND-OR-Invert is a(n) research topic. Over the lifetime, 1932 publication(s) have been published within this topic receiving 37267 citation(s). more


Journal ArticleDOI: 10.1109/4.597298
R. Zimmermann1, Wolfgang Fichtner1Institutions (1)
Abstract: Recently reported logic style comparisons based on full-adder circuits claimed complementary pass-transistor logic (CPL) to be much more power-efficient than complementary CMOS. However, new comparisons performed on more efficient CMOS circuit realizations and a wider range of different logic cells, as well as the use of realistic circuit arrangements demonstrate CMOS to be superior to CPL in most cases with respect to speed, area, power dissipation, and power-delay products. An implemented 32-b adder using complementary CMOS has a power-delay product of less than half that of the CPL version. Robustness with respect to voltage scaling and transistor sizing, as well as generality and ease-of-use, are additional advantages of CMOS logic gates, especially when cell-based design and logic synthesis are targeted. This paper shows that complementary CMOS is the logic style of choice for the implementation of arbitrary combinational circuits if low voltage, low power, and small power-delay products are of concern. more

Topics: Pass transistor logic (74%), Logic family (71%), Logic gate (68%) more

844 Citations

Open accessBook
01 Jan 1995-
Abstract: Partial table of contents: Properties and Definitions of Digital ICS. Diodes. Bipolar Junction Transistors. Diode-Transistor Logic (DTL). Schottky Transistor-Transistor (STTL). Other TTL Gates. Basic Emitter-Coupled Logic (ECL). MECL III and ECL 10K. Other ECL Gates. Introduction to MOS Digital Circuits. Resistor Loaded NMOS Inverter. Enhancement-Depletion Loaded NMOS Inverter. NMOS Gates. CMOS Inverter. CMOS Tri-State Gates. CMOS Drivers. Dynamic CMOS. BiCMOS. Latches and Flip-Flops. Semiconductor Read-Only Memories. Direct Coupled NMESFET Logic (DCFL) Inverter. Schottky Diode NMESFET Logic (SDFL) Inverter. Other Gallium Arsenide Logic Family Inverters. Gallium Arsenide NMESFET Gates. Appendices. Supplementary Reading. Selected Answers. Index. more

Topics: NMOS logic (73%), AND-OR-Invert (67%), Depletion-load NMOS logic (67%) more

640 Citations

Journal ArticleDOI: 10.1002/J.1538-7305.1978.TB02106.X
Abstract: This paper addresses the simulation and detection of logic faults in CMOS integrated circuits. CMOS logic gates are intrinsically tri-state devices: output low, output high, or output open. This third, high-impedance condition introduces a new, nonclassical logic fault: the “stuck-open.” The paper describes the modeling of this fault and its complement, the stuck-on, by means of gate-level networks. In addition, this paper provides a methodology for creating simulator models for tri-state and other dynamic circuit elements. The models are gate-level in structure, provide for both classical and stuck-open/stuck-on faults, and can be adopted for use on essentially any general purpose logic simulator. more

Topics: Pass transistor logic (70%), Logic family (70%), Logic gate (67%) more

615 Citations

Journal ArticleDOI: 10.1021/NL901874J
Qiangfei Xia1, Warren Robinett1, Cumbie Michael W1, Neel Banerjee1  +9 moreInstitutions (1)
01 Sep 2009-Nano Letters
Abstract: Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS Titanium dioxide thin-film memristors served as the configuration bits and switches in a data routing network and were connected to gate-level CMOS components that acted as logic elements, in a manner similar to a field programmable gate array We analyzed the chips using a purpose-built testing system, and demonstrated the ability to configure individual devices, use them to wire up various logic gates and a flip-flop, and then reconfigure devices more

Topics: Pass transistor logic (66%), Logic gate (65%), Programmable logic device (64%) more

574 Citations

Journal ArticleDOI: 10.1126/SCIENCE.284.5412.289
Islamshah Amlani1, Alexei O. Orlov1, Géza Tóth1, Géza Tóth2  +3 moreInstitutions (2)
09 Apr 1999-Science
Abstract: A functioning logic gate based on quantum-dot cellular automata is presented, where digital data are encoded in the positions of only two electrons. The logic gate consists of a cell, composed of four dots connected in a ring by tunnel junctions, and two single-dot electrometers. The device is operated by applying inputs to the gates of the cell. The logic AND and OR operations are verified using the electrometer outputs. Theoretical simulations of the logic gate output characteristics are in excellent agreement with experiment. more

Topics: Logic gate (68%), NAND gate (68%), AND-OR-Invert (67%) more

564 Citations

No. of papers in the topic in previous years

Top Attributes

Show by:

Topic's top 5 most impactful authors

Maria J. Avedillo

7 papers, 74 citations

José M. Quintana

7 papers, 74 citations

Viktor Sverdlov

6 papers, 113 citations

Gerhard W. Dueck

6 papers, 445 citations

C.A.T. Salama

5 papers, 71 citations

Network Information
Related Topics (5)
Pass transistor logic

9.2K papers, 149.7K citations

91% related
Low-power electronics

8.1K papers, 192.6K citations

91% related

81.3K papers, 1.1M citations

90% related
Logic gate

35.7K papers, 488.3K citations

90% related
Sequential logic

10.1K papers, 182.5K citations

90% related