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Showing papers on "Anodic bonding published in 1992"


Proceedings ArticleDOI
04 Feb 1992
TL;DR: In this article, the authors considered an electrostatic actuator consisting of a silicon membrane bonded to a glass plate by anodic bonding, and they demonstrated a stroke length of 18 mu m working against a pressure of 2200 Pa using a voltage of 41 V.
Abstract: The electrostatic actuator considered consists of a silicon membrane bonded to a glass plate by anodic bonding. On the glass plate a circular gold electrode is made and a thin oxide layer is grown on the silicon membrane before bonding. A pressure is applied to the cavity between the membrane and the glass plate causing the membrane to deflect away from the electrode. When a voltage is applied between the gold electrode and the membrane, high electrostatic forces acting along the membrane periphery will pull the membrane into contact with the glass plate. Experimental results are presented demonstrating a stroke length of 18 mu m working against a pressure of 2200 Pa using a voltage of 41 V. The actuator performance has in addition been investigated by means of mathematical analysis and numerical simulations, and a model relating the principal design parameters is presented. >

100 citations


Patent
Eiichi Ando1, Yasuo Hayashi1, Koichi Osada1, Akira Hirano1, Junichi Ebisawa1 
11 Feb 1992
TL;DR: In this article, a laminated glass structure is provided containing at least one glass sheet, a plastic layer provided at the bonding surface of the glass sheet and a functioning layer having single-or multi-layered films between the bonding surfaces of the sheet and the plastic layer.
Abstract: A laminated glass structure is provided containing at least one glass sheet, a plastic layer provided at the bonding surface of the glass sheet, and a functioning layer having single-or multi-layered films between the bonding surfaces of the glass sheet and the plastic layer, with the functioning layer having a controlling layer in contact with the plastic layer, which contains as the major component an oxide including Cr and at least one of Ti, Zn, Sn, Ni, Zr, Al, Si, Mg and Fe, and wherein the controlling layer has an atomic ratio of Cr to atoms other than oxygen of 60% or lower, and the film thickness of the controlling layer is 10 Å to 500 Å.

91 citations



Proceedings ArticleDOI
04 Feb 1992
TL;DR: Anodic bonding of silicon to Pyrex glass was studied from the viewpoint of its application to integrated capacitive sensors in this paper, where equipment that allowed substrate bonding in atmosphere and in vacuum is described.
Abstract: Anodic bonding of silicon to Pyrex glass was studied from the viewpoint of its application to integrated capacitive sensors. Equipment that was developed to allow substrate bonding in atmosphere and in vacuum is described. Vertical and lateral electrical feedthrough structures, which have excellent electrical properties and airtight performance, were developed. The vertical feedthrough structures were applied to capacitive sensors. Other bonding-related problems that were studied, such as wafer distortion, circuit damage, and metallization are noted. >

63 citations


Journal ArticleDOI
Sung Tae Kim1, Chong Hee Kim1
TL;DR: In this paper, the eutectic bonding of copper to alumina has been studied at 1075°C in nitrogen gas, and the bonding time was prolonged up to 24 hours at the Cu/Al2O3 interface.
Abstract: Cu-Cu2O eutectic bonding of copper to alumina has been studied at 1075°C in nitrogen gas. In order to elucidate the reaction at the Cu/Al2O3 interface, the bonding time was prolonged up to 24 h at 1075°C in nitrogen gas. CuAlO2 was found at the Cu/Al2O3 interface, and it seems that CuAlO2 was formed even with a short bonding time. CuAlO2 enhanced the bonding strength. There seem to be two kinds of bonding mechanism working at the Cu/Al2O3 interface.

59 citations


Patent
28 Sep 1992
TL;DR: In this article, a flip-chip-based method was proposed to flipchip an integrated circuit die to a substrate and a gold-tin eutectic bond was formed between the die and the conductive bonding areas of the substrate.
Abstract: A method for flip-chip bonding an integrated circuit die to a substrate. A substrate (21) having conductive bonding areas (22) coated with tin (23) is secured to a bottom end effector of a flip-chip bonding apparatus. An integrated circuit die (26) having gold bumps (28) is secured to a die tool of the flip-chip bonding apparatus. A gold-tin eutectic bond is formed between the integrated circuit die (26) and the conductive bonding areas (22) of the substrate (21).

56 citations


Journal ArticleDOI
TL;DR: In this article, the rate processes which occur during anodic bonding are modeled using data from various studies, and the observed activation energies are consistent with dc conduction in the glass.
Abstract: The rate processes which occur during anodic bonding are modeled using data from various studies. For a given materials system, the process occurs at constant total charge transfer. The observed activation energies are consistent with dc conduction in the glass. The charge transfer required for bonding to aluminum anodes decreases with increasing alkali content of the glass, which is probably due to increasing solubility and mobility of aluminum in depletion layers with higher vacancy contents. The voltage required for bonding at constant time and varying temperature is also consistent with constant charge transfer. The kinetic data are consistent with an electrochemical oxidation model where the rate of bonding is limited by the rate of establishment of the depletion layer.

54 citations


Journal ArticleDOI
TL;DR: In this paper, a process for silicon-to-thin film anodic bonding with polysilicon, silicon oxide, silicon nitride or aluminium as the thin film materials has been developed.
Abstract: A process for silicon-to-thin film anodic bonding with polysilicon, silicon oxide, silicon nitride or aluminium as the thin film materials has been developed. Silicon wafers covered with these thin films have been sealed together by anodic bonding using thin sputter-deposited glass layers as sealing material. The bond strengths of the samples have been tested by pull tests. Some samples were exposed to water for 300 h to test the media compatibility. IR microscopy has been shown to be a good method to uncover bonding voids. Bond strength tests of three-inch silicon-to-silicon anodic bonded wafers are shown to be in excellent agreement with the bonding yield expected from IR-microscope inspection.

50 citations


Patent
08 May 1992
TL;DR: Disclosed is a process for producing a solid, surface bonding between two wafer plates, of which at least one is composed of a semiconducting material, such as e.g. silicon.
Abstract: Disclosed is a process for producing a solid, surface bonding between two wafer plates, of which at least one is composed of a semiconducting material, such as e.g. silicon. The process has the following steps: on the cleaned surface of at least one wafer plate a film having a residual moisture from solvents containing silicates or phosphates is applied, the two wafer surfaces on at least one of which a film is applied are joined, the two wafers are tempered in the joined state at temperatures lower than approx. 420° C.

42 citations


Journal ArticleDOI
TL;DR: In this article, a modified process for silicon direct bonding is described, where thin intermediate sodium silicate layers are used to decrease the process temperatures and the attraction force of the hydrophilic surfaces results in very close contact and the two wafers are fixed together.
Abstract: This paper is focused on a modified process for silicon direct bonding. Thin intermediate sodium silicate layers are used to decrease the process temperatures. Oxidized silicon wafers are used for the characterization of the process. After a hydrophilic pretreatment, a diluted solution of sodium silicate in water is spun onto one of the two surfaces and the two wafers are brought into contact. The attraction force of the hydrophilic surfaces results in very close contact and the two wafers are fixed together. After a final temperature treatment in the range 200–300 °C, a surface energy of about 3 J/m2 can be measured. In comparison, this value is obtained in conventional silicon direct bonding at temperatures above 1000 °C. The influence of chemical and temperature treatments on the surface energies is described in detail.

41 citations


Patent
15 Sep 1992
TL;DR: In this paper, the sensor has a hollow space between a transparent plate and a silicon body, with two opposing mirrors on either side of this space, one of these mirrors is attached to a silicon membrane and the other mirror attached to the transparent plate.
Abstract: The sensor has a hollow space (6) defined between a transparent plate (1) and a silicon body (2), with 2 opposing mirrors (9, 12) on either side of this space (6). One of these mirrors (9) is attached to a silicon membrane (3) deflected in dependance on the measured parameter, the other mirror (12) attached to the transparent plate (1). At least one of the mirrors (9, 12) is made of platinum or a refractory metal, to prevent anodic bonding between the measuring membrane (3) and the plate (1) upon the mirrors (9, 12) being pressed together. A silicon oxide or silicon nitride stop layer (8) is provided between the measuring membrane (3) and the first mirror (9), both mirrors (9, 12) pref. having an anti-corrosion silicon nitride coating (13, 14). ADVANTAGE - Allows low-cost mass prodn.

Journal ArticleDOI
TL;DR: In this article, the authors report a technique which needs only 260 °C to produce nearly eutectic AuSn bonding, which eliminates the requirement of preforms, inhibits tin oxidation and provides good control of bonding layer thickness.

Journal ArticleDOI
TL;DR: In this article, the suitability of various glass types for different applications, and in particular for absolute capacitive pressure sensors, is discussed and solutions suggested for improving the properties of these properties.
Abstract: The author discusses the suitability of various glass types for different applications, and in particular for absolute capacitive pressure sensors. Some process induced effects which can affect the yield and performance of such devices are investigated and solutions suggested for improving these properties. Effects considered include electrolysis and process induced compositional changes. These can manifest themselves as bowed or warped assemblies, degraded bonds and metallized layers, and poor sensitivity and temperature stability of the resulting devices. Some solutions to these problems are discussed.

01 Jan 1992
TL;DR: In this article, the authors present research on LTTLP bonding of silver, gold, and copper solders with melting temperatures between 30° (85°F and 15TC (315T) for die attach.
Abstract: A process called Low Temperature Transient Liquid Phase (LTTLP) bonding can allow components to be solder attached in the 60-1WC (140-320T) temperature range but not remelt until a much higher temperature. Stress is minimized by bonding at a low temperature and the component could be operated at or above the bonding temperature. This paper presents research on LTTLP bonding of silver, gold, and copper. Sixteen solders with melting temperatures between 30° (85°F and 15TC (315T) were studied. Bond formation for each alloy on the three metals was studied by measuring the bond remelting temperature and its development time. Some mechanical shear strength data was also collected. The use of LTTLP bonding for die attach could be particularly advantageous for fragile or temperature sensitive components which require a good electrically and thermally conductive bond.

Patent
05 Oct 1992
TL;DR: In this article, the authors propose a method to produce a metal plate from a base metal such as carbon steel with a metal, for example titanium, with which it is incompatible for roll-bonding.
Abstract: Clad metal plate comprising a layer of cladding metal bonded to a first substrate metal layer is produced by a method comprising initially metallurgically bonding a thin layer of substrate to a thick layer of cladding metal and bonding further layers of substrate metal to the first substrate layer in at least two roll bonding steps wherein the cladding layer is reduced to the desired thickness. The initial metallurgical bonding step may advantageously be a bonding method such as explosive bonding which is free from metal compatibility restrictions encountered in roll-bonding. The method enables a base metal such as carbon steel to be clad economically with a metal, for example titanium, with which it is incompatible for roll-bonding.

Patent
Otsuka Yasuhiro1, Hideki Kaneko1
27 Mar 1992
TL;DR: In this article, a TAB tape was used to force the inner lead of the TAB tool to be pressed down into the inner-lead of the inner part of the tape, such that the bonding tool end and inner lead come in close contact with each other.
Abstract: A bonding tool (11a) having a round pointed end (16) smaller than the bonding pad (12) for the semiconductor element (15) is urged with a bonding force F₁ and pressed down into the inner lead (13) of a TAB tape such that the bonding tool end and inner lead come in close contact with each other. Then, the bonding force F₁ applied to the tool is reduced to F₂, while at the same time ultrasonic vibration (17) is applied to the tool, thus effecting bonding of the inner lead to the bonding pad with applied heat and pressure. Unlike the prior art, no bump has to be formed on the bonding pad for the semiconductor element or on an end of the inner lead. It is thus possible to simplify the bonding process and also to reduce the cost of bonding. Further, a highly reliable bond can be realized without causing crack or other damage to the pad structure.

Patent
06 Nov 1992
TL;DR: In this paper, a method for bonding leads of a film carrier to electrodes of electronic devices includes a step for positioning leads and the electrodes with a predetermined clearance aligned to define corresponding pairs of the leads and electrodes, and another step for placing a bonding tool having a conductive bonding material served such that the conductive binding material is located between the lead and electrode of one of the corresponding pairs.
Abstract: A method for bonding leads of a film carrier to electrodes of electronic devices includes a step for positioning the leads and the electrodes with a predetermined clearance aligned to define corresponding pairs of the leads and electrodes, and a step for placing a bonding tool having a conductive bonding material served such that the conductive bonding material is located between the lead and electrode of one of the corresponding pairs. The method further includes a step for pressing the lead of one corresponding pair such that the conductive bonding material is pressed between the lead and the electrode, thereby bonding the lead and electrode. After bonding, the conductive bonding material is pulled to cut and leave the bonded conductive bonding material. Then, while the bonding tool is released from the bonded pair, the conductive bonding material is served to the bonding tool for the next bonding operation.

Patent
15 May 1992
TL;DR: In this paper, a single point bonding tool for use in ultrasonically bonding a fine or ultrafine wire to another electrical conductor, has a thin film resistor integrally formed thereon.
Abstract: A single point bonding tool for use in ultrasonically bonding a fine or ultrafine wire to another electrical conductor, has a thin film resistor integrally formed thereon. The thin film resistor is integrally formed on the bonding tip by standard photolithographic techniques applied to the bonding tool. The tool combines ultrasonic energy and thermal energy provided by the resistor to provide required bonding energy that may be localized both in space and in time. The result offers optimized energy transfer to the selected workpieces and minimizes risk of damage to adjacent, heat sensitive devices.

Patent
09 Nov 1992
TL;DR: In this article, a method for producing multilayer structures comprised of materials with incompatible processing parameters is disclosed, where a bonding layer of arbitrary dielectric constant is applied to each of two substructures, each substructure is composed of a substrate and at least one epitaxial crystalline layer.
Abstract: A method for producing multilayer structures comprised of materials with incompatible processing parameters is disclosed. A bonding layer of arbitrary dielectric constant is applied to each of two substructures. Each substructure is composed of a substrate and at least one epitaxial crystalline layer. Examples of particular bonding materials used are polyimide, fluorocarbon polymers, other organic materials, and glass. The bonding material may be applied like photoresist, or sputtered, or applied in any appropriate manner consistent with the processing constraints of the crystalline materials. Structures formable in this way include superconductor-amorphous dielectric-superconductor and ferroelectric-insulator-semiconductor trilayers, as well as microwave resonators and multichip modules.

Journal ArticleDOI
TL;DR: In this article, the authors presented two technologies for the anodic bonding of Pyrex-type glass and silicon with more than two substrates, and demonstrated a three-substrate micromachined passive valve.
Abstract: The construction of micromechanic devices is developing from the second to the third dimension. Therefore, a technique is needed that enables bonding between more than two substrates. The author presents two technologies for the anodic bonding of Pyrex-type glass and silicon with more than two substrates. A three-substrate micromachined passive valve, which was assembled by anodic bonding is presented. Theoretical models are shown and technological problems discussed.

Journal ArticleDOI
TL;DR: In this paper, a high performance acceleration sensor concept is presented, which combines multiple wafer bonding and differential capacitance measurement into a point-symmetrical design, and the accelerometer is a four-layer glass/Si/Si-glass structure realized with a combination of Si/Si fusion bonding and Si/glass anodic bonding.
Abstract: A high performance acceleration sensor concept is presented, which combines multiple wafer bonding and differential capacitance measurement into a point-symmetrical design. The accelerometer is a four-layer glass/Si/Si/glass structure realized with a combination of Si/Si fusion bonding and Si/glass anodic bonding. Fusion bonding with wafer-to-wafer alignment is performed on preprocessed silicon. Glass covers are bonded onto both wafer sides in a single anodic bonding sequence with polarity reversal. The main device characteristics are an exclusive response to a translational acceleration component in a single axis and maximized sensitivity for a given chip area. Modifiable damping characteristics and hence adjustable bandwidth is an additional device feature. This is obtained by controlling the gas pressure and composition during anodic bonding of the glass covers.

PatentDOI
TL;DR: In this article, a capacitive acceleration sensor is composed of a silicon plate, a glass plate and a substrate, and a movable portion is supported by the fixed portion through spring beams.
Abstract: A capacitive acceleration sensor is composed of a silicon plate, a glass plate and a substrate The silicon plate has a fixed portion and a movable portion supported by the fixed portion through spring beams The movable portion is moved in response to the change in the acceleration and is provided with a moving electrode thereon The glass plate is provided with a fixed electrode and anodically bonded to the silicon plate so that the fixed electrode faces the moving electrode with a predetermined gap On the glass plate, a first dummy electrode is formed at a location corresponding to the spring beams of the silicon plate The dummy electrode has a terminal portion at one end so as to be electrically connected with the silicon plate during anodic bonding of the plates On the substrate, a second dummy electrode is formed at a location corresponding to the movable portion of the silicon plate The dummy electrode, similarly, has a terminal portion at one end so as to be electrically connected with the silicon plate during anodic bonding of the silicon plate and the substrate

Patent
Nobuhisa Ishida1, Akihiro Shimokata1
21 Dec 1992
TL;DR: In this paper, an ink-jet print head is constructed by joining a head base to a vibrating plate without use of any adhesive and has a sufficient joining strength even if the joining layers are formed to be as thin as possible.
Abstract: A method of producing an ink-jet print head comprises the step of joining a head base to a vibrating plate without use of any adhesive and has a sufficient joining strength even if the joining layers are formed to be as thin as possible. The joining process comprises the steps of providing a head base of glass including an array of individual ink passages formed therein, forming an electrically conductive film on the joint surface of the head base through sputtering, superposing a vibrating plate of glass on the joint surface of the head base through the electrically conductive film, and applying a voltage between the head base and vibrating plate with the electrically conductive film and vibrating plate being respectively anode and cathode while being subjected to pressure and heat, thereby carry out anodic bonding the head base and vibrating plate to each other.

Patent
29 May 1992
TL;DR: A planarized multi-layer metal bonding pad is proposed in this paper, where the first layer is covered by a dielectric layer, and the second layer is made contact with the first sheet through a multitude of vias.
Abstract: A planarized multi-layer metal bonding pad A first metal bonding pad layer (13) that defines a metal bonding pad is provided A first dielectric layer (14) is provided with a multitude of vias (17) that covers the first metal bonding pad layer (13), thereby exposing portions of the first metal bonding pad layer (13) through the multitude of vias (17) in the first dielectric (14) A second metal bonding pad layer (18) that further defines the metal bonding pad is deposited on the first dielectric layer (14) making electrical contact to the first metal bonding pad layer through the multitude of vias (17) Planarization of the second metal bonding pad layer (18) is achieved by having the second metal bonding pad layer (18) cover the first dielectric layer (14) and making contact through the vias (17)

Patent
14 Feb 1992
TL;DR: A process for using explosion bonding to produce a metal composite is described in this article, where explosion bonding produces a substantially diffusionless metallurgical bond between the layers in one aspect, the ductility of at least one of the layers being bonded is increased by heating prior to bonding in another aspect, a layer comprises explosion bonding a plurality of cladding layer to a backer plate such that the seam between the strips is sealed
Abstract: A process for using explosion bonding to produce a metal composite The explosion bonding produces a substantially diffusionless metallurgical bond between the layers In one aspect, the ductility of at least one of the layers being bonded is increased by heating prior to bonding In another aspect, a layer comprises explosion bonding a plurality of cladding layer to a backer plate such that the seam between the strips is sealed

Patent
12 Aug 1992
TL;DR: In this article, a stress isolating signal path with one end of fixed to a bonding pad of an integrated circuit chip and another end which forms a flexible bonding surface is provided.
Abstract: A stress isolating signal path having one end of fixed to a bonding pad of an integrated circuit chip and another end which forms a flexible bonding surface is provided. The flexible bonding surface may be bonded to external package components or external circuitry using conventional wire bond, epoxy bond, tape automated bonding, flip chip bonding, or the like. The signal path is formed using conventional semiconductor thin film deposition, patterning, and etching techniques. The signal path comprises a conductive material compatible with batch semiconductor manufacturing technology.

Proceedings ArticleDOI
04 Feb 1992
TL;DR: In this article, a new class of modified silicon direct bonding processes is presented, which involves the use of thin, intermediate layers to decrease the required process temperatures, and the bonding process is characterized using oxidized silicon wafers.
Abstract: A new class of modified silicon direct bonding processes is presented. The new process step within the bonding procedure involves the use of thin, intermediate layers to decrease the required process temperatures. The bonding process was characterized using oxidized silicon wafers. It was found that very strong bonds at temperatures around 200 degrees C or 350 degrees C can be achieved. Using ammonia-silica solutions, the surface energies achieve values of about 1.6 J/m/sup 2/. The lower bonding strength is compensated by offering a full IC-compatible bonding process. The influence of chemical and temperature treatment on the surface energies is described in detail. >

Proceedings ArticleDOI
18 May 1992
TL;DR: In this article, the authors report a technique which needs only 240 degrees C to produce nearly eutectic Au-Sn bonding, which eliminates the preforms, reduces tin oxidation, and provides good control of bonding layer thickness.
Abstract: The authors report a technique which needs only 240 degrees C to produce nearly eutectic Au-Sn bonding. After bonding, the device can take a postprocessing temperature of 250 degrees C without bonding degradation. The bonding medium consists of Au-Sn multilayer composite deposited directly on the object to be bonded. This technology also eliminates the preforms, reduces tin oxidation, and provides good control of bonding layer thickness. Results of bonding 2 mm*3 mm GaAs dice show that high-quality bondings are obtained, as evaluated by a scanning acoustic microscope. The specimens underwent 40 cycles of thermal shock test between -196 degrees C and 160 degrees C without bonding degradation and die cracking. Scanning electron microscopy and energy-dispersive X-ray studies reveal interesting characteristics of the bonding process. Melting point tests confirm that the bonding layer indeed has a melting temperature of 280 degrees C, higher than the 240 degrees C process temperature. >

Journal ArticleDOI
TL;DR: In this paper, a method was developed to detect the presence of bubbles or unbonded areas with a gap of less than 0.27 µm, which is the detection limit of an IR camera.
Abstract: KOH anisotropic etching is used to study the interfaces of bonded silicon wafers. This method has been developed to detect the presence of bubbles or unbonded areas with a gap of less than 0.27 µm, which is the detection limit of an IR camera. Because of the anisotropic etching properties of KOH and the presence of interfacial oxide layers, the etching surface morphology is dependent on the crystallographic orientation of the cross section. Correlation of etching results to the bonding strength of silicon wafers with and without a thermally oxidized silicon layer is also discussed.

Journal ArticleDOI
TL;DR: In this paper, a continuous SiC fiber reinforced Ti-6Al-4V composite was diffusion bonded to itself, and the bonding between the interlayer and the composite matrix was completed after a bonding time of 10·8 ks.
Abstract: A continuous SiC fibre reinforced Ti–6Al–4V composite was diffusion bonded to itself. Incorporation of a Ti–6Al–4V interlayer and use of an etching treatment to smooth the faying surface improved the diffusion bondability of the composite. The bond strength increased with bonding time up to 10·8 ks under 10 MN m−2 pressure at 1173 K, at which time, after reaching the maximum value of approximately 700 MN m−2, the strength was saturated. Corresponding to this behaviour, the bonding between the interlayer and the composite matrix was completed after a bonding time of 10·8 ks. Bonding between the fibre and the interlayer was considered not to contribute to the joint strength on the basis of observation of the fracture surfaces. The bond strength therefore seems to be controlled by the bonding of the interlayer and the composite matrix.MST/1568