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Showing papers on "Anodic bonding published in 2004"


Journal ArticleDOI
TL;DR: In this paper, the fabrication of chip-sized alkali atom vapor cells using silicon micromachining and anodic bonding technology is described, which may find use in highly miniaturized atomic frequency references or magnetometers.
Abstract: We describe the fabrication of chip-sized alkali atom vapor cells using silicon micromachining and anodic bonding technology. Such cells may find use in highly miniaturized atomic frequency references or magnetometers. The cells consist of cavities etched in silicon, with internal volumes as small as 1 mm3. Two techniques for introducing cesium and a buffer gas into the cells are described: one based on chemical reaction between cesium chloride and barium azide, and the other based on direct injection of elemental cesium within a controlled anaerobic environment. Cesium optical absorption and coherent population trapping resonances were measured in the cells.

352 citations


Journal ArticleDOI
TL;DR: In this article, the SU-8 polymer epoxy photoresist is used as a structural material for the fabrication of 3D interconnected microchannels, which is based on a full wafer polymer bonding process.
Abstract: This paper describes a novel fabrication method for the manufacture of three-dimensional (3D) interconnected microchannels. The fabrication is based on a full wafer polymer bonding process, using SU-8 polymer epoxy photoresist as a structural material. The technology development includes an improvement of the SU-8 photolithography process in order to produce high uniformity films with good adhesive properties. Hence, 3D embedded microchannels are fabricated by a low temperature adhesive bonding of the SU-8 photopatterned thick films. The bonding occurs at temperatures (100–120 °C) lower than those usually applied in bonding technology. The bonding process parameters have been chosen in order to achieve a strong and void-free bond. High bond strengths, up to 8 MPa, have been obtained. Several examples using this new technology are shown, including bonding between different combinations of silicon and Pyrex wafers. This method also allows us to bond wafers with previously surface micromachined structures. Interconnected microchannels with vertical smooth walls and aspect ratios up to five have been obtained. Channels from 40 to 60 µm depth and from 10 to 250 µm width have been achieved. Liquid has been introduced at different levels into the microchannels, verifying good sealing of the 3D interconnected microchannels. The fabrication procedure described in this paper is fast, reproducible, CMOS compatible and easily implementable using standard photolithography and bonding equipment.

188 citations


PatentDOI
TL;DR: In this paper, a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pad on the second substrate, and a contact-bonded interface between the first and second set of metamodel interfaces formed by contact bonding of the first nonmetallic regions to the second nonmetal regions.
Abstract: A bonded device structure including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads formed by contact bonding of the first non-metallic region to the second non-metallic region. At least one of the first and second substrates may be elastically deformed.

183 citations


Journal ArticleDOI
TL;DR: An adhesive bonding technique for wafer-level sealing of SU-8 based lab-on-a-chip microsystems with integrated optical components is presented in this article, where the optical propagation loss of multi-mode 10 µm × 30 µm (width) waveguides is measured.
Abstract: An adhesive bonding technique for wafer-level sealing of SU-8 based lab-on-a-chip microsystems with integrated optical components is presented. Microfluidic channels and optical components, e.g. waveguides, are fabricated in cross-linked SU-8 and sealed with a Pyrex glass substrate by means of an intermediate layer of 950k molecular weight poly-methylmethacrylate (PMMA). Due to a lower refractive index of PMMA (n = 1.49 at λ = 600–900 nm) this bonding technique preserves waveguiding in the cross-linked SU-8 structures (n = 1.59 at λ = 633 nm) in combination with good sealing of the microfluidic channels. The bonding strength dependence on bonding temperature and bonding force is investigated. A maximum bonding strength of 16 MPa is achieved at bonding temperatures between 110 °C and 120 °C, at a bonding force of 2000 N on a 4 inch wafer. The optical propagation loss of multi-mode 10 µm (thickness) × 30 µm (width) SU-8 waveguides is measured. The propagation loss in PMMA bonded waveguide structures is more than 5 dB cm−1 lower, at wavelengths between 600 nm and 900 nm, than in similar structures bonded by an intermediate layer of SU-8. Furthermore 950k PMMA shows no tendency to flow into the bonded structures during bonding because of its high viscosity.

175 citations


Journal ArticleDOI
TL;DR: A simple, room-temperature bonding process was developed for the fabrication of glass microfluidic chips that achieved high-quality bonding with high yields without the requirement of clean room facilities, programmed high-tem temperature furnaces, pressurized water sources, adhesives, or pressurizing weights.
Abstract: A simple, room-temperature bonding process was developed for the fabrication of glass microfluidic chips. High-quality bonding with high yields (>95%) was achieved without the requirement of clean room facilities, programmed high-temperature furnaces, pressurized water sources, adhesives, or pressurizing weights. The plates to be bonded were sequentially prewashed with acetone, detergent, high-flow-rate (10−20 m/s) tap water, and absolute ethyl alcohol and were soaked in concentrated sulfuric acid for 8−12 h. The plates were again washed in high-flow-rate tap water for 5 min and, finally, with demineralized water. The plates were bonded by bringing the cleaned surfaces into close contact under a continuous flow of demineralized water and air-dried at room temperature for more than 3 h. This bonding process features simple operation, good smoothness of the plate surface, and high bonding yield. The procedures can be readily applied in any routine laboratory. The bonding strength of glass chips thus produce...

163 citations


01 Jan 2004
TL;DR: In this paper, the authors describe the principle and the process flow of glass-frit bonding and demonstrate the potential of glass frit bonding for surface materials commonly used in MEMS technology.
Abstract: This paper reports on glass frit wafer bonding, which is a universally usable technology for wafer level encapsulation and packaging. After explaining the principle and the process flow of glass frit bonding, experimental results are shown. Glass frit bonding technology enables bonding of surface materials commonly used in MEMS technology. It allows hermetic sealing and a high process yield. Metal lead throughs at the bond interface are possible, because of the planarizing glass interlayer. Examples of surface micromachined sensors demonstrate the potential of glass-frit bonding.

156 citations


Journal ArticleDOI
TL;DR: In this paper, a novel wafer bonding technique using microwave heating of parylene intermediate layers is described, which can be used for structured wafers also for MEMS devices.
Abstract: This paper describes a novel wafer bonding technique using microwave heating of parylene intermediate layers. The bonding is achieved by parylene deposition and thermal lamination using microwave heating. Variable frequency microwave heating provides uniform, selective and rapid heating for parylene intermediate layers. The advantages of this bonding technique include short bonding time, low bonding temperature, relatively high bonding strength, less void generation and low thermal stress. In addition, the intermediate layer material, parylene, is chemically stable and biocompatible. This bonding technique can be used for structured wafers also because parylene provides a conformal coating. Therefore, this is a very attractive bonding tool for many MEMS devices. The bonding strength and uniformity were evaluated using diverse tools. Fracture mechanisms and the effects of bonding parameters and an adhesion promoter were also investigated. The bonding with a structured wafer was also successfully demonstrated.

155 citations


Patent
19 May 2004
TL;DR: In this article, the surface of the bonding layer is terminated with a desired species, preferably an NH2 species, which is achieved by exposing the layer to an NH4OH solution.
Abstract: A method of bonding includes using a bonding layer having a fluorinated oxide. Fluorine may be introduced into the bonding layer by exposure to a fluorine-containing solution, vapor or gas or by implantation. The bonding layer may also be formed using a method where fluorine is introduced into the layer during its formation. The surface of the bonding layer is terminated with a desired species, preferably an NH2 species. This may be accomplished by exposing the bonding layer to an NH4OH solution. High bonding strength is obtained at room temperature. The method may also include bonding two bonding layers together and creating a fluorine distribution having a peak in the vicinity of the interface between the bonding layers. One of the bonding layers may include two oxide layers formed on each other. The fluorine concentration may also have a second peak at the interface between the two oxide layers.

133 citations


Patent
08 Mar 2004
TL;DR: In this article, a method of dividing a semiconductor wafer comprising: a bonding film adhering step, a protective adhesive tape affixing step and removing the semiconductor chips having the broken bonding film from the adhesive tape is presented.
Abstract: A method of dividing a semiconductor wafer comprising: a bonding film adhering step of adhering a bonding film for die bonding to the back surface of the semiconductor wafer; a protective adhesive tape affixing step of affixing an extensible protective adhesive tape to the bonding film side of the semiconductor wafer having the bonding film on the back surface; a dividing step of dividing the semiconductor wafer affixed to the protective adhesive tape into individual semiconductor chips by applying a laser beam along the streets; a bonding film breaking step of breaking the bonding film for every semiconductor chip by extending the protective adhesive tape so as to give tensile force to the bonding film; and a semiconductor chip removing step of removing the semiconductor chips having the broken bonding film from the protective adhesive tape.

102 citations


Journal ArticleDOI
TL;DR: In this paper, the effects of temperature and pressure on the bond toughness were investigated using the four-point bend technique and finite element analysis, and the authors found that the mask layout contributed to the pressure nonuniformity applied across the wafer.
Abstract: Thermocompression bonding joins substrates via a bonding layer. In this paper, silicon substrates were bonded using gold thin films. Experimental data on the effects of bonding pressure (30 to 120 MPa), temperature (260 and 300/spl deg/C), and time (2 to 90 min) on the bond toughness, measured using the four-point bend technique, are presented. In general, higher temperature and pressure lead to higher toughness bonds. Considerable variation in toughness was observed across specimens. Possible causes of the nonuniform bond quality were explored using finite element analysis. Simulation results showed that the mask layout contributed to the pressure nonuniformity applied across the wafer. Finally, some process guidelines for successful wafer-level bonding using gold thin films are presented.

100 citations


Journal ArticleDOI
TL;DR: In this paper, a systematic variation of process parameters for wafer-level thermocompression bonding with gold is presented for the first time, which was optimized for high bond strength and high bond yield.
Abstract: A systematic variation of process parameters for wafer-level thermocompression bonding with gold is presented for the first time. The process was optimized for high bond strength and high bond yield. In addition, the impact of the process temperature was investigated. A bond strength of 10.7 ± 4.5 MPa and a bond yield of 89% was achieved when bonding a wafer pair at 298 °C applying 4 MPa pressure for 45 min. A total of ten wafer pairs were bonded in a custom-built bonding tool and tested to establish the optimal process parameters. The bonded interface was found to be strong and dense enough for MEMS applications. The bonds were characterized using pull tests, transmission electron microscopy (TEM) and energy dispersive x-ray spectroscopy (EDS). The TEM inspections indicated that it is possible to form hermetic seals by using the presented bonding method.

Journal ArticleDOI
TL;DR: In this paper, an active MEMS microvalve driven by integrated bulk single crystal piezoelectric actuators is reported, with a nine-layer structure composed of glass, silicon, and silicon on insulator (SOI) layers assembled by wafer-level fusion bonding and anodic bonding, as well as die-level anodic and eutectic bonding.
Abstract: The fabrication of an active MEMS microvalve driven by integrated bulk single crystal piezoelectric actuators is reported. The valve has a nine-layer structure composed of glass, silicon, and silicon on insulator (SOI) layers assembled by wafer-level fusion bonding and anodic bonding, as well as die-level anodic bonding and eutectic bonding. Valve head strokes as large as 20 μm were realized through hydraulic amplification of the small stroke of the piezoelectric actuator. A flow rate of 0.21 ml/s was obtained at 1 kHz. The fabrication, bonding and assembly process, as well as some test results are described.

Journal ArticleDOI
TL;DR: In this paper, a microwave-based bonding of polymer substrates is presented to illustrate a promising technique for achieving precise, localized, low temperature bonding, which can open up possibilities for precise and total encapsulation of polymer-based micro/nanofluid devices.
Abstract: Microwave-based bonding of polymer substrates is presented in this paper to illustrate a promising technique for achieving precise, localized, low temperature bonding. Microwave power can absorbed by a very thin film metal layer deposited on a polymer (PMMA) substrate surface. The intense thin-film volumetric heating promotes localized melting of refractory metals such as gold. One of the advantages of the process is that PMMA is relatively transparent to microwave energy in the 2.4 GHz regime. This makes it an excellent substrate material for microwave bonding. Selective heating and melting of the thin layers of metal also causes localized melting of the PMMA substrates and improves adhesion at the interface. We have shown that ∼1 μm of interfacial layer can be generated that is composed of the melted gold and PMMA, and which can hold two substrates together under applied tension greater than 100 lb/in. 2 (7 kg/cm 2 ). We also used lithographically patterned metal lines on a PMMA substrate to demonstrate that the PMMA remains optically transparent after microwave processing. A numerical simulation was also performed and validated with experimental results to show that globally the PMMA substrates indeed remained below its melting point during the microwave bonding process. The novel bonding process will open up possibilities for precise and total encapsulation of polymer-based micro/nanofluid devices—which are impossible to built using existing polymer bonding techniques.

Journal ArticleDOI
TL;DR: In this article, a glass-to-glass anodic bonding process is used for fabrication of nanochannels created in glass with which bio-analysis can be performed in combination with fluorescence microscopy.
Abstract: In this work, we present a technology for fabrication of nanochannels created in glass with which bio-analysis can be performed in combination with fluorescence microscopy. The technology is based on a glass-to-glass anodic bonding process. In the bonding process, an intermediate layer (thin insulating film) is deposited on one of the two glass wafers. The channel is then defined, with one or two photo-patterning steps, in the intermediate layer. In our approach, a 33 nm thick amorphous silicon layer deposited by low-pressure chemical vapor deposition (LPCVD) was used as an intermediate layer. The depth of the channel is defined during the etching of this layer.

Book
01 Jan 2004
TL;DR: In this article, the authors present a historical patent picture of the worldwide moving front of the state-of-the-art of contact bonding, including direct bonding, fusion bonding, anodic bonding, and Wafer-Bonded interfaces for handling and transfer applications.
Abstract: 1 Direct Bonding, Fusion Bonding, Anodic Bonding, Wafer Bonding: A Historical Patent Picture of the Worldwide Moving Front of the State-of-the-Art of Contact Bonding.- 2 Basics of Silicon-on-Insulator (SOI) Technology.- 3 Silicon-on-Insulator by the Smart CutTM Process.- 4 ELTRAN(R) Technology Based on Wafer Bonding and Porous Silicon.- 5 Wafer Bonding for High-Performance Logic Applications.- 6 Application of Bonded Wafers to the Fabrication of Electronic Devices.- 7 Compound Semiconductor Heterostructures by Smart CutTM: SiC On Insulator, QUASICTM Substrates, InP and GaAs Heterostructures on Silicon.- 8 Three-Dimensional Photonic Bandgap Crystals by Wafer Bonding Approach.- 9 Wafer Direct Bonding for High-Brightness Light-Emitting Diodes and Vertical-Cavity Surface-Emitting Lasers.- 10 High-Density Hybrid Integration of III-V Compound Optoelectronics with Silicon Integrated Circuits.- 11 Layer Transfer by Bonding and Laser Lift-Off.- 12 Single-Crystal Lithium Niobate Films by Crystal Ion Slicing.- 13 Wafer Bonding of Ferroelectric Materials.- 14 Debonding of Wafer-Bonded Interfaces for Handling and Transfer Applications.

Journal ArticleDOI
TL;DR: A wafer level surface activated bonding (SAB) tool has been developed for microelectromechanical systems (MEMS) packaging at low temperature as mentioned in this paper, which accommodates 8 in. diam wafers to a margin of error within ± 1 μm and the X, Y and θ axis alignments with an accuracy of ± 0.5 μm.
Abstract: A wafer level surface activated bonding (SAB) tool has been developed for microelectromechanical systems (MEMS) packaging at low temperature. The tool accommodates 8 in. diam wafers. The principle features of the tool are the automatic parallel adjustment for 8 in. wafers to a margin of error within ± 1 μm and the X, Y, and θ axis alignments with an accuracy of ±0.5 μm. We have approached a new integration technique for the integration of ionic crystals with transparent and nontransparent thin intermediate layers using this tool. Various sizes of patterned and bare silicon, Al silicate glass, and quartz wafers cleaned by a low energy argon ion source in a vacuum have been successfully bonded by this technique at low temperature. Radioisotope fine leak and vacuum seal tests of sealed silicon cavities show leak rates of 1.0 X 10 -9 and 2.6 X 10 -16 Pa/m 3 s, respectively, which are lower than the American military standard encapsulation requirements for MEMS devices in harsh environments. Void-free interfaces with bonding strengths comparable to bulk materials are found. Low adhesion between SAB-processed ionic crystals without adhesive layers is believed to be due to radiation-induced discontinuous polarization.

Journal ArticleDOI
TL;DR: In this article, the authors presented the design, fabrication, and testing of a two-axis 320 pixel micromirror array, which was constructed entirely of single-crystal silicon (SCS) minimizing residual and thermal stresses.
Abstract: This work presents the design, fabrication, and testing of a two-axis 320 pixel micromirror array. The mirror platform is constructed entirely of single-crystal silicon (SCS) minimizing residual and thermal stresses. The 14-/spl mu/m-thick rectangular (750/spl times/800 /spl mu/m/sup 2/) silicon platform is coated with a 0.1-/spl mu/m-thick metallic (Au) reflector. The mirrors are actuated electrostatically with shaped parallel plate electrodes with 86 /spl mu/m gaps. Large area 320-mirror arrays with fabrication yields of 90% per array have been fabricated using a combination of bulk micromachining of SOI wafers, anodic bonding, deep reactive ion etching, and surface micromachining. Several type of micromirror devices have been fabricated with rectangular and triangular electrodes. Triangular electrode devices displayed stable operation within a (/spl plusmn/5/spl deg/, /spl plusmn/5/spl deg/) (mechanical) angular range with voltage drives as low as 60 V.

Journal ArticleDOI
TL;DR: The advantages of microchip APCI makes it a very attractive new microfluidic detector with stable long-term analysis with chip lifetime of weeks, good quantitative repeatability and linearity, and cost-efficient manufacturing.
Abstract: A novel microchip heated nebulizer for atmospheric pressure chemical ionization mass spectrometry is presented. Anisotropic wet etching is used to fabricate the flow channels, inlet, and nozzle on a silicon wafer. An integrated heater of aluminum is sputtered on a glass wafer. The two wafers are jointed by anodic bonding, creating a two-dimensional version of an APCI source with a sample channel in the middle and gas channels symmetrically on both sides. The ionization is initiated with an external corona-discharge needle positioned 2 mm in front of the microchip heated nebulizer. The microchip APCI source provides flow rates down to 50 nL/min, stable long-term analysis with chip lifetime of weeks, good quantitative repeatability (RSD 0.995) with linear dynamic rage of at least 4 orders of magnitude, and cost-efficient manufacturing. The limit of detection (LOD) for acridine measured with microchip APCI at flow rate of 6.2 μL/min was 5 nM, corresponding to a mass flow of 0.52 fm...

Patent
04 Oct 2004
TL;DR: In this paper, the authors describe a system and methods for transient liquid phase bonding using sandwich interlayers to produce stronger, more homogeneous bonds than currently possible, which can be used to join a single crystal material to a polycrystalline material to make a gas turbine engine component.
Abstract: Systems and methods for transient liquid phase bonding are described herein. Embodiments of these systems and methods utilize sandwich interlayers (40) to produce stronger, more homogeneous bonds than currently possible. These sandwich interlayers (40) comprise a middle bonding layer (41) sandwiched between two outer bonding layers (43). The middle bonding layer (41) comprises a different composition, and may even comprise a different form, than the outer bonding layers (43). In embodiments, these sandwich interlayers may be used to join a single crystal material to a polycrystalline material to make a gas turbine engine component, such as an integrally bladed rotor.

Journal ArticleDOI
TL;DR: In this article, an integrated enzyme-based continuous glucose sensor was fabricated on a wafer-level using in-device immobilization, which was used to demonstrate the potential of this novel technique.
Abstract: Wafer-level fabrication of integrated enzyme-based BioMEMS usually requires high temperature wafer-bonding techniques such as anodic bonding. Enzymes denature at comparatively low temperatures. Thus, enzymes need to be immobilized after wafer bonding. A convenient in-device immobilization method is presented allowing wafer-level patterning of enzymes inside micro-scale flow channels after wafer bonding. Enzymes are entrapped in a poly(vinyl alcohol)-styrylpyridinium (PVA-SbQ) membrane crosslinked by UV exposure through a transparent top wafer. The reaction kinetics of immobilized glucose oxidase is investigated in more detail. A low apparent Michaelis constant of 3.0 mM is determined indicating a rapid diffusion of glucose into the PVA-SbQ membrane as well as an oxygen-limited maximum catalytic rate. The entrapped glucose oxidase preserves its native properties since it is not chemically modified. Furthermore, the active PVA-SbQ membrane can be dehydrated in a vacuum and later rehydrated in buffer solution without significant loss of enzyme activity. An integrated enzyme-based glucose sensor fabricated on a wafer-level using in-device immobilization is described to demonstrate the potential of this novel technique. The sensor is part of a disposable microneedle-based continuous glucose monitor. The stability of glucose oxidase entrapped in PVA-SbQ is sufficient to continuously operate the sensor at 25 °C for 24 h.

Journal ArticleDOI
TL;DR: In this paper, the induced stresses during the wire bonding process are studied, where the diameter of the bond is recorded as a function of the applied force. And the influence of different low-K materials and interconnection materials is investigated for different configurations of bond pad, and the comparison with the traditionally used materials is made.
Abstract: Major changes are currently happening at the back-end-of-line of integrated circuit processing. New materials are introduced to achieve better electrical performance. The drawback of these new materials is their different mechanical behavior compared to the traditionally used materials. LowK materials, used to replace silicon oxide as dielectric, are very soft and thus provide a low mechanical stiffness. The transition from gold wire to copper wire for the bonding process requires higher forces during the bonding process to form a bond due to the higher hardness of the copper. This leads to higher stresses in the structure. Finally, copper replaces aluminum as interconnection metal. In this study, the induced stresses during the wire bonding process are studied. In the first part, a contact analysis is performed to model the bond formation. The diameter of the bond is recorded as a function of the applied force. The yield stress of the bond material can be estimated by comparing these simulation results to experimental data. In the second part, the stresses in the bond pad are studied. The influence of different lowK materials and interconnection materials is investigated for different configurations of the bond pad. The comparison with the traditionally used materials is made.

Journal ArticleDOI
TL;DR: A laser-assisted bonding technique is demonstrated for low temperature region selective processing that is especially suitable for encapsulation and vacuum packaging of chips or wafers containing MEMS and other micro devices with low temperature budgets, where managing stress distribution is important.

Patent
02 Dec 2004
TL;DR: In this article, an upper wafer 7 made of glass and a lower wafer 8 made of Si are surface-activated using an energy wave before performing anodic bonding, thereby performing bonding at low temperature and increasing a bonding strength.
Abstract: Conventional heat bonding and anodic bonding require heating at high temperature and for a long time, leading to poor production efficiency and occurrence of a warp due to a difference in thermal expansion, resulting in a defective device. Such a problem is solved. An upper wafer 7 made of glass and a lower wafer 8 made of Si are surface-activated using an energy wave before performing anodic bonding, thereby performing bonding at low temperature and increasing a bonding strength. In addition, preliminary bonding due to surface activation is performed before main bonding due to anodic bonding is performed in a separate step or device, thereby increasing production efficiency, and enabling bonding of a three-layer structure without occurrence of a warp.

Patent
17 Jun 2004
TL;DR: In this paper, a light emitting diode (LED) package structure is described, which includes at least a die or an LED chip disposed on the bottom surface of the trench, while two electrodes of the die are respectively electrically connected to the ends of two leads.
Abstract: The present invention relates to a package structure for a light emitting diode (LED). The LED package structure of this invention includes a package housing having at least a trench and at least two leads. The package structure includes at least a die or an LED chip disposed on the bottom surface of the trench, while two electrodes of the die are respectively electrically connected to the ends of two leads on the bottom surface of the trench. A transparent plate of glass or crystal materials is mounted and connected to the housing by anodic bonding or glue bonding, to seal the trench, while the other ends of leads are exposed on the surface of the housing without being covered by the transparent plate.

Proceedings ArticleDOI
29 Mar 2004
TL;DR: A novel technique to bond polymer substrates using PDMS-interface bonding is presented in this article, which is promising to achieve precise, well-controlled, low temperature bonding of micro fluidic channels.
Abstract: A novel technique to bond polymer substrates using PDMS-interface bonding is presented in this paper This novel bonding technique is promising to achieve precise, well-controlled, low temperature bonding of micro fluidic channels A thin (10-25μm) Poly(dimethylsiloxane) (PDMS) intermediate layer was used to bond two polymer (PMMA) substrates without distorting them Micro channel patterns were compressed on a PMMA substrate by hot embossing technique first Then, PDMS was spin-coated on another PMMA bare substrate and cured in two stages In the first stage, it was pre-cured at room temperature for 20 hours to evaporate the solvents Subsequently, it was bonded to the hot embossed PMMA substrate In the second stage, PDMS was completely cured at 90°C for 3 hours and the bonding was successfully achieved at this relatively low temperature Tensile bonding tests showed that the bonding strength was about 0015MPa Micro fluidic channels with dimensions of 1mmx2cmx1mm were successfully fabricated using this novel bonding method

Journal ArticleDOI
TL;DR: A planar bidirectional valveless peristaltic micropump for controlling biosamples and reagent fluids was designed with a very simple structure and fabricated employing microelectromechanical system technologies, which include deep reactive ion etching in silicon and silicon-glass anodic bonding techniques as mentioned in this paper.

Proceedings ArticleDOI
01 Jun 2004
TL;DR: In this paper, a sequential plasma activation process consisting of oxygen reactive ion etching (RIE) plasma and nitrogen radical activation is proposed for wafer direct bonding at room temperature, where the Si wafer surface is activated by oxygen RIE plasma and subsequently exposed to nitrogen radicals.
Abstract: A sequential plasma activation process consisting of oxygen reactive ion etching (RIE) plasma and nitrogen radical activation is proposed for wafer direct bonding at room temperature. The Si wafer surface is activated by oxygen RIE plasma and subsequently exposed to nitrogen radicals. The activated wafers by the two-step process were brought into contact in air followed by keeping them in air for 24 h. The wafers were bonded throughout the whole area and the bonding strength of the interface is as strong as bulk Si without any post-annealing process and wet chemical cleaning steps. XPS study indicates that the silicon surface has thermodynamically unstable characteristics. IR transmission images reveal a considerable amount of water is absorbed in the wafer surfaces during exposure to air after the plasma activation process. The high bonding strength is thought to be due to a diffusion of absorbed water into the wafer surface and a reaction between silicon oxynitride layers on the opposing wafer. TEM images show that an intermediate amorphous layer with thickness of 15 nm is formed across the interface. The bonding is so intimate that no micro-voids are found at the bonding interface. Furthermore, strong bonding of crystalline quartz and fused quartz at room temperature was also obtained by the sequential activation process.

Journal ArticleDOI
TL;DR: In this article, the anodic bonding of metallic sheets of Invar, Kovar, Alloy 42 and titanium to ion-containing glasses, Pyrex and Foturan, was evaluated in terms of samples preparation, bonding parameters, and bonding characteristics.
Abstract: Anodically bonded Pyrex-/Metal double stack were investigated for applications in the sensor encapsulation field. The use of metals can increase the robustness of the packaging and eliminate the use of glue. Titanium anodically bonded to glass can lead to biocompatible systems The anodic bonding of metallic sheets of Invar, Kovar, Alloy 42 and titanium to ion-containing glasses, Pyrex and Foturan, was evaluated in terms of samples preparation, bonding parameters, and bonding characteristics. At a bonding temperature below 300 °C, the stress induced to Pyrex was smaller when the Invar was used, however, a weak bonding was obtained at the lowest bonding temperatures investigated. In comparison with Invar and Alloy 42 bonded to Pyrex, Kovar induced a smaller stress for bonding temperatures higher than 350 °C. For bonding temperatures in between 300 and 350 °C, a similar value of stress was obtained for Kovar and Alloy 42 bonded to Pyrex as well as a high bonding strength. A post-annealing step at a temperature of and higher than the bonding temperature was shown to decrease the bonding stress and can be used to improve the bonding strength of samples bonded at low temperature. Kovar and Alloy 42 bonded to Pyrex at temperatures of and higher than 250 °C were tight to liquid at a pressure of 1.5 bars. In the case of titanium, Pyrex and Foturan were successfully bonded to titanium thin films and sheets, respectively. A proper selection of metals and bonding parameters led to levels of residual stress, strength and tightness that make anodic bonding of metals to glass a suitable technique for the assembling and packaging of microsystems, for instance piezoresistive silicon sensors and microfluidic devices.

Journal ArticleDOI
TL;DR: An oxide-free, covalently bonded interface of InP/silicon wafer pairs has been realized at low temperature by B2H6 plasma treatment of bonding surfaces in the reactive ion etch mode followed by a HF dip and room temperature bonding in air as discussed by the authors.
Abstract: An oxide-free, covalently bonded interface of InP/silicon wafer pairs has been realized at low temperature by B2H6 plasma treatment of bonding surfaces in the reactive ion etch mode followed by a HF dip and room temperature bonding in air. The bonding energy reaches InP fracture surface energy of 630 mJ/m2 at 200 °C. A total B-doped amorphous layer of about 15 A with peak concentration of ∼2×1020 cm−3 was detected at the bonding interface. The release of hydrogen at low temperature from B–H complexes and subsequent absorption of the atomic hydrogen by the amorphous layer at the bonding interface is most likely responsible for the enhanced bonding energy.

Patent
05 Aug 2004
TL;DR: In this article, a method of fabricating a silicon-on-plastic layer via layer transfer includes depositing a layer of SiGe on a silicon substrate, implanting splitting hydrogen ions into the silicon substrate and bonding a glass substrate to the silicon layer.
Abstract: A method of fabricating a silicon-on-plastic layer via layer transfer includes depositing a layer of SiGe on a silicon substrate; depositing a layer of silicon; implanting splitting hydrogen ions into the silicon substrate; bonding a glass substrate to the silicon layer; splitting the wafer; removing the silicon layer and a portion of the SiGe layer; depositing a dielectric on the silicon side of the silicon-on-glass wafer; applying adhesive and bonding a plastic substrate to the silicon side of the silicon-on-glass wafer; removing the glass from the glass side of the bonded, silicon-on-glass wafer to form a silicon-on-plastic wafer; and completing a desired IC device on the silicon-on-plastic. Multi-level structure may be fabricated according to the method of the invention by repeating the last few steps of the method of the invention.