Showing papers on "Anodic bonding published in 2014"

Adhesion promotion between PDMS and glass by oxygen plasma pre-treatment

Abstract: Polydimethylsiloxane (PDMS) and glass are among the most widely used materials in biomedical and microfluidic applications. In this paper, oxygen plasma exposure was used to improve the adhesion properties of PDMS and glass. The effect of bonding quality parameters such as RF power, time of activation and oxygen flow was investigated. Bonding area and strength, two main indicators of bonding quality, were detected using manual peel and mechanical shear tests, respectively, to optimize the bonding parameters. It was observed that increase in activation time and RF power increased the bonding strength considerably. The oxygen flow had a slight influence in increasing the bonding strength. The application of this bond has also been demonstrated in PDMS–glass micropump, so this technique can be potentially applied for fabrication of PDMS–glass-based microfluidic and biomedical devices.

Internal modification of glass by ultrashort laser pulse and its application to microwelding

Abstract: Internal modification process of glass by ultrashort laser pulse (USLP) and its applications to microwelding of glass are presented. A simulation model is developed, which can determine intensity distribution of absorbed laser energy, nonlinear absorptivity and temperature distribution at different pulse repetition rates and pulse energies in internal modification of bulk glass with fs- and ps-laser pulses from experimental modified structure. The formation process of the dual-structured internal modification is clarified, which consists of a teardrop-shaped inner structure and an elliptical outer structure, corresponding to the laser-absorbing region and heat-affected molten region, respectively. Nonlinear absorptivity at high pulse repetition rates increases due to the increase in the thermally excited free electron density for avalanche ionization. USLP enables crack-free welding of glass because the shrinkage stress is suppressed by producing embedded molten pool by nonlinear absorption process, in contrast to conventional continuous wave laser welding where cracks cannot be avoided due to shrinkage stress produced in cooling process. Microwelding techniques of glass by USLP have been developed to join glass/glass and Si/glass using optically contacted sample pairs. The strength of the weld joint as high as that of base material is obtained without pre- and post-heating in glass/glass welding. In Si/glass welding, excellent joint performances competitive with anodic bonding in terms of joint strength and process throughput have been attained.

Pressureless wafer bonding by turning hillocks into abnormal grain growths in Ag films

Abstract: We demonstrate pressureless wafer bonding using silver abnormal grain growth caused by stress migration at 250 °C, which is very low for a direct solid-state bonding temperature. The bonding achieved a die-shear strength of more than 50 MPa, which exceeds the fracture toughness of Si wafer. Various deposition temperatures for the silver films, i.e., initial residual stress, reveal that the bonding process is driven by thermomechanical stress. Abnormal grain growth is induced at the contact interface instead of hillocks growing on the film surface. Pressureless wafer bonding can be applied to advanced devices such as thin-wafer multi-chip integrations.

A High-Q Resonant Pressure Microsensor with Through-Glass Electrical Interconnections Based on Wafer-Level MEMS Vacuum Packaging

Abstract: This paper presents a high-Q resonant pressure microsensor with through-glass electrical interconnections based on wafer-level MEMS vacuum packaging. An approach to maintaining high-vacuum conditions by integrating the MEMS fabrication process with getter material preparation is presented in this paper. In this device, the pressure under measurement causes a deflection of a pressure-sensitive silicon square diaphragm, which is further translated to stress build up in “H” type doubly-clamped micro resonant beams, leading to a resonance frequency shift. The device geometries were optimized using FEM simulation and a 4-inch SOI wafer was used for device fabrication, which required only three photolithographic steps. In the device fabrication, a non-evaporable metal thin film as the getter material was sputtered on a Pyrex 7740 glass wafer, which was then anodically bonded to the patterned SOI wafer for vacuum packaging. Through-glass via holes predefined in the glass wafer functioned as the electrical interconnections between the patterned SOI wafer and the surrounding electrical components. Experimental results recorded that the Q-factor of the resonant beam was beyond 22,000, with a differential sensitivity of 89.86 Hz/kPa, a device resolution of 10 Pa and a nonlinearity of 0.02% F.S with the pressure varying from 50 kPa to 100 kPa. In addition, the temperature drift coefficient was less than −0.01% F.S/°C in the range of −40 °C to 70 °C, the long-term stability error was quantified as 0.01% F.S over a 5-month period and the accuracy of the microsensor was better than 0.01% F.S.

Batch-Producible Fiber-Optic Fabry–Pérot Sensor for Simultaneous Pressure and Temperature Sensing

Abstract: We demonstrated a simple and batch-producible fiber-optic sensor based on hybrid Fabry-Perot (FP) configuration for simultaneous pressure and temperature sensing. The proposed sensor head chips are batch fabricated by double-sided anodic bonding of a through-holes-array-structured glass wafer and two silicon wafers. The silicon-glass-silicon sandwich bonding structure constructs two serially connected low-finesse FP cavities naturally. The first cavity (FP 1 ) is a silicon cavity and utilizes the refractive indices temperature dependence of silicon to achieve temperature sensing. The second cavity (FP 2 ) is a vacuum cavity and employs a thin silicon diaphragm as a pressure sensing element. The reflection spectra exhibit hybrid interference fringes with different frequencies produced by silicon and vacuum cavity, and the temperature and pressure are simultaneously measured. Experiment results demonstrate that the pressure sensitivity of FP 2 is 12.82 nm/kPa with a high linear pressure response over the range of 10-250 kPa, and the temperature sensitivity of FP 1 is 142.02 nm/°C under the range of -20 °C-70 °C.

Application of Silicon on Nothing Structure for Developing a Novel Capacitive Absolute Pressure Sensor

Abstract: In the field of silicon on nothing (SON) structure , micrometer-thick monocrystalline layers suspended over their parent wafer were produced by high-temperature annealing of specific arrays of trenches. Those trenches reorganize into one single void and leave a thin overlayer on top. Since this method may be an easy way of synchronous fabricating high-quality silicon films and vacuum void, this paper investigates its potential applications for a pressure sensor. A capacitive absolute pressure sensor whose pressure sensitive membrane is formed by the SON structure was fabricated and evaluated. The radius and thickness of the sensitive membrane are 100 and 1.7-μm, respectively. The average sensitivity of the sensor array with 15 diaphragms is 2.88 fF/kPa. This novel fabrication process enables to easily form a high vacuum cavity without hermetical sealing process such as anodic bonding technology, to achieve an excellent long-term stability and reliability, in particular, and to easily integrate detection circuits with the sensor.

Method of manufacturing bonded substrate, bonded substrate, method of manufacturing solid-state imaging apparatus, solid-state imaging apparatus, and camera

Abstract: Disclosed herein is a method of manufacturing a bonded substrate, including the steps of: forming a first bonding layer on a surface on one side of a semiconductor substrate; forming a second bonding layer on a surface on one side of a support substrate; adhering the first bonding layer and the second bonding layer to each other; a heat treatment for bonding the first bonding layer and the second bonding layer to each other; and thinning the semiconductor substrate from a surface on the other side of the semiconductor substrate to form a semiconductor layer.

Anodic bonding using SOI wafer for fabrication of capacitive micromachined ultrasonic transducers

Abstract: In medical ultrasound imaging, mostly piezoelectric crystals are used as ultrasonic transducers. Capacitive micromachined ultrasonic transducers (CMUTs) introduced around 1994 have been shown to be a good alternative to conventional piezoelectric transducers in various aspects, such as sensitivity, transduction efficiency or bandwidth. This paper focuses on a fabrication process for CMUTs using anodic bonding of a silicon on insulator wafer on a glass wafer. The processing steps are described leading to a good control of the mechanical response of the membrane. This technology makes possible the fabrication of large membranes and can extend the frequency range of CMUTs to lower frequencies of operation. Silicon membranes having radii of 50, 70, 100 and 150 µm and a 1.5 µm thickness are fabricated and electromechanically characterized using an auto-balanced bridge impedance analyzer. Resonant frequencies from 0.6 to 2.3 MHz and an electromechanical coupling coefficient around 55% are reported. The effects of residual stress in the membranes and uncontrolled clamping conditions are clearly responsible for the discrepancies between experimental and theoretical values of the first resonance frequency. The residual stress in the membranes is determined to be between 90 and 110 MPa. The actual boundary conditions are between the clamped condition and the simply supported condition and can be modeled with a torsional stiffness of 2.10−7 Nm rad–1 in the numerical model.

Wafer-level Au–Au bonding in the 350–450 ◦C temperature range

Abstract: Metal thermocompression bonding is a hermetic wafer-level packaging technology that facilitates vertical integration and shrinks the area used for device sealing. In this paper, Au–Au bonding at 350, 400 and 450 °C has been investigated, bonding wafers with 1 µm Au on top of 200 nm TiW. Test Si laminates with device sealing frames of 100, 200, and 400 µm in width were realized. Bond strengths measured by pull tests ranged from 8 to 102 MPa and showed that the bond strength increased with higher bonding temperatures and decreased with increasing frame width. Effects of eutectic reactions, grain growth in the Au film and stress relaxation causing buckles in the TiW film were most pronounced at 450 °C and negligible at 350 °C. Bond temperature below the Au–Si eutectic temperature 363 °C is recommended.

Low-temperature Cu-to-Cu bonding using silver nanoparticles stabilised by saturated dodecanoic acid

Abstract: We developed a new method to prepare silver NP paste that can be used as a Cu-to-Cu bonding material under an additional pressure of 10 MPa. This new paste consists of a high concentration of uniform silver NPs with a thin layer of dodecanoate coated on the surface. Shear strengths indicate that the silver NP paste prepared with our method could serve as a bonding material in electronic packaging and interconnections. The microstructure of the interface between the silver and the copper substrate was examined using scanning electron microscopy (SEM) and high-resolution transmission electron microscopy (HRTEM). Based on this analysis, a metallic bond is formed at the interface between the sintered Ag layer and both sides of the joint when bonding Cu pads above 250 °C.

Bonding Structure for Stacked Semiconductor Devices

Abstract: A semiconductor device, and a method of fabrication, is introduced. In an embodiment, one or more passivation layers are formed over a first substrate. Recesses are formed in the passivation layers and a first bonding pad, a second bonding pad, and a first via are formed in the recesses. In some embodiment, the first via may have electrical contact with the first bonding pad and may provide an electrical pathway to a first plurality of metallization layers. The first bonding pad and the second bonding pad in the first substrate are aligned to a third bonding pad and the fourth bonding pad in a second substrate and may be bonded using a direct bonding method. A bond between the first bonding pad and the third bonding pad may provide an electrical pathway between devices on the first substrate and devices on the second substrate.

High throughput thermal compression NCF bonding

Abstract: High through put thermal compression NCF bonding was studied and the new process consisting of dividing pre and main bonding, and the multi die gang main bonding has been developed. The dividing could change the process from serial to parallel and enabled to use the constant heated bonder head, which eliminated the time consuming head cooling process of the conventional serial thermal compression bonding. The die of 7.3 × 7.3 × 0.1 mm size with bumps of 38 × 38 μm 2 square Cu pillar covered by Sn-Ag cap, which had the pitches of 80 μm at peripheral and 300 μm at corer area, and the organic laminated substrate with Cu/OSP trace were used as the test vehicle in this study. Firstly, the dividing of pre and main bo ndi ng process in the case of si ngle die was investigated. The prebonding was the die placement to the NCF on the substrate, which was carried out at 150°C for 0.5 second. The substrate was kept at 80°C during the process. After the pre bonding the test vehicle was removed out from the equipment and cooled down to room temperature. And then it was mounted back to the equipment again and main bonding was carried out at 240°C for 20 seconds. The same substrate temperature as the pre bonding process was kept. Solder joint formation and NCF curing was made at the process. The assembled test vehicle was evaluated. The cross sectional observation results showed that the bump solder wetted the Cu trace on the substrate and no void was detected in the NCF by C-SAM observation. Secondly, the multi die main gang bonding was studied. The equipment was newly designed and built. 15 dies were pre bonded on the substrate with the same condition as that of the single die experiment. After the pre bonding was finished, the substrate was moved to the main gang bonder. During the transportation the substrate was cooled down to room temperature. The 15 dies were bonded at one time at 240°C for 10 seconds. The substrate was heated at 240°C during the process. The evaluation of the assembled dies revealed that the solder wettability of the joints and void detection in the NCF was almost the same as those of the single die pre and main divided bonding. This main bonding process time corresponded to 2700 UPH.

Triple stack glass-to-glass anodic bonding for optogalvanic spectroscopy cells with electrical feedthroughs

Abstract: We demonstrate the use of an anodic bonding technique for building a vacuum tight vapor cell for the use of Rydberg spectroscopy of alkali atoms with thin film electrodes on the inside of the cell. The cell is fabricated by simultaneous triple stack glass-to-glass anodic bonding at 300 °C. This glue-free, low temperature sealing technique provides the opportunity to include thin film electric feedthroughs. The pressure broadening is only limited by the vapor pressure of rubidium and the lifetime is at least four months with operating temperatures up to 230 °C.

PMMA to Polystyrene bonding for polymer based microfluidic systems

Abstract: A thermal bonding technique for Poly (methylmethacrylate) (PMMA) to Polystyrene (PS) is presented in this paper. The PMMA to PS bonding was achieved using a thermocompression method, and the bonding strength was carefully characterized. The bonding temperature ranged from 110 to 125 °C with a varying compression force, from 700 to 1,000 N (0.36–0.51 MPa). After the bonding process, two kinds of adhesion quantification methods were used to measure the bonding strength: the double cantilever beam method and the tensile stress method. The results show that the bonding strength increases with a rising bonding temperature and bonding force. The results also indicate that the bonding strength is independent of bonding time. A deep-UV surface treatment method was also provided in this paper to lower the bonding temperature and compression force. Finally, a PMMA to PS bonded microfluidic device was fabricated successfully.

Reactive Metal Bonding of Carbon Nanotube Arrays for Thermal Interface Applications

Abstract: Vertically aligned carbon nanotube (CNT) arrays can offer an attractive combination of high thermal conductance and mechanical compliance for thermal interface applications. These arrays require a reliable, thermally conductive bonding technique to enable integration into devices. This paper examines the use of a reactive metal bonding layer to attach and transfer CNT arrays to metal-coated substrates, and the thermal performance is compared with CNT arrays bonded with indium solder. Infrared microscopy is used to simultaneously measure the intrinsic thermal conductivity of the CNT array and the thermal boundary resistance of both the bonded and growth CNT interfaces over a range of applied compressive stresses. A coarse-grained molecular simulation is used to model the effects of compressive pressure on the CNT array thermal conductivity. Reactive metal bonding reduces the thermal boundary resistance to as low as 27 mm 2 · K · W -1 , which is more than an order of magnitude less than the nonbonded contact.

Wafer-scale titanium anodic bonding for microfluidic applications

Abstract: We report the development of an anodic bonding process that allows, for the first time, high-strength joining of bulk titanium and glass substrates at the wafer-scale, without need for interlayers or adhesives. We demonstrate that uniform, full-wafer bonding can be achieved at temperatures as low as 250 °C and that failure during burst pressure testing occurs via crack propagation through the glass, rather than the titanium/glass interface, thus demonstrating the robustness of the bonding. Moreover, using optimized bonding conditions, we demonstrate the fabrication of rudimentary titanium/glass-based microfluidic devices at the wafer-scale, and their leak-free operation under pressure-driven flow. Finally, we also demonstrate the monolithic integration of nanoporous titanium dioxide within such devices, thus illustrating the promise embodied in titanium anodic bonding for future realization of robust microfluidic devices for photocatalysis applications.

Nickel-Tin Solid-Liquid Inter-Diffusion Bonding

Abstract: This paper presents a solid liquid inter-diffusion (SLID) bonding process using nickel-tin. By using two metals with different melting points, Ni3Sn4, an intermetallic compound (IMC) at 523K was formed. Unlike pure metal, the IMC can be used in high temperature applications of up to 800K without failure. The formation energy of Ni3Sn4 IMC was calculated to be 23.15 kJ/mol from the experimental result. Compared to the traditional soldering technique, a higher temperature resistance bonding joint can be achieved using the nickel-tin SLID bonding technique.

Pressureless Bonding Using Sputtered Ag Thin Films

Abstract: To improve the performance and reliability of power electronic devices, particularly those built around next-generation wide-bandgap semiconductors such as SiC and GaN, the bonding method used for packaging must change from soldering to solderless technology. Because traditional solders are problematic in the harsh operating conditions expected for emerging high-temperature power devices, we propose a new bonding method in this paper, namely a pressureless, low-temperature bonding process in air, using abnormal grain growth on sputtered Ag thin films to realize extremely high temperature resistance. To investigate the mechanisms of this bonding process, we characterized the microstructural changes in the Ag films over various bonding temperatures and times. We measured the bonding properties of the specimens by a die-shear strength test, as well as by x-ray diffraction measurements of the residual stress in the Ag films to show how the microstructural developments were essential to the bonding technology. Sound bonds with high die strength can be achieved only with abnormal grain growth at optimum bonding temperature and time. Pressureless bonding allows for production of reliable high-temperature power devices for a wide variety of industrial, energy, and environmental applications.

A reliable Cu–Sn stack bonding technology for 3D-TSV packaging

Abstract: In this paper, Cu–Sn stack bonding technology for 3D-TSV packaging was described; some key technologies such as TSV (through silicon via) formation, silicon wafer thinning, TSV electroplating and Cu–Sn multilayer stack bonding were introduced. First of all, some sample chips with TSV and Cu–Sn bonding pads were fabricated for stacking. Then, two kinds of stack bonding experiments with or without TSV were carried out, respectively. 3-die, 7-die, and 10-die stacks were bonded and assembled. Finally, the bonding strengths of 3D-TSV stacking were characterized by shear test and tensile test, and also the electrical properties, thermal properties and corrosion resistance of stacked module. All the test results suggested that the reliable stack bonding technology can be used for 3D integration applications.

Wafer scale fabrication of highly integrated rubidium vapor cells

Abstract: This paper reports on wafer scale fabrication of MEMS rubidium (Rb) vapor cells used for spectroscopic measurements in miniaturized atomic clocks. The cell filling process is based on pipetting minute amounts of dissolved rubidium azide (RbN3) into cavities etched in a silicon wafer, hermetic sealing of the cavities by anodic bonding of glass caps, and in situ UV decomposition of the RbN3 into Rb and N2. All relevant elements required for operation such as resistive heaters, temperature sensors, and coils are integrated onto the vapor cell using planar technology. Experiments showed short term frequency stability below 10-10 at 1 second integration time.

Flip-chip on glass (FCOG) package for low warpage

Abstract: As microelectronic industry moves toward stacking of dies to achieve greater performance in smaller footprint, there are several reliability concerns when assembling the stacked dies on current organic substrates. These concerns include excessive warpage, interconnect cracking, die cracking, and others. Silicon interposers are being developed to assemble the stacked dies, and then to assemble the silicon interposers onto organic substrates. Although such an approach could address stacked-die to interposer reliability concerns, there are still reliability concerns between the silicon interposer and the organic substrate. The ongoing work at the Packaging Research Center is exploring the use of glass substrates as a superior alternative to organics in I/Os and to silicon in electrical performance. In addition, glass provides intermediate and tunable coefficient of thermal expansion between silicon and organic, good mechanical rigidity, large-area panel processing for low cost, planarity, and better electrical properties. However, glass is brittle and low in thermal conductivity, and there is very little work in existing literature to examine glass as a potential substrate material. In this paper, we examine large glass panels as substrates for microelectronic packages through experiments and simulation. Starting with a 150 × 150 mm glass panel with a thickness in the range of 100 to 300 um μm, we have built alternating layers of dielectric and copper on both sides of the panel. The panels go through typical cleanroom processes such as lithography, electroplating, etc. Upon fabrication, the panels are diced into individual substrates of 25 × 25 mm, and a 10 mm × 10 mm Si die with a peripheral staggered bump pitch of 80/40 um μm is then assembled on the glass substrate by thermocompression bonding with a pre-applied no-flow underfill. The warpage of the flip-chip assembly is measured. In parallel to the experiments, numerical models have been developed. These models account for temperature-dependent properties of the dielectric as well as viscoplastic behavior of the solder. The models also mimic material addition and etching through element “birth-and-death” approach. The warpage from the models has been compared against experimental measurements for glass substrates with flip-chip assembly. It is seen that the glass substrates provide significantly lower warpage compared to organic substrates, and thus could be a potential candidate for future 3D and 2.5D systems.

MEMS piezoresistive pressure sensor and manufacturing method thereof

Abstract: The invention discloses an MEMS piezoresistive pressure sensor and a manufacturing method thereof. The sensor is based on anodic bonding packaging and has a sandwich structure composed of first bonding glass, a silicon substrate and second bonding glass. A diaphragm with thin boron diffusion piezoresistance is manufactured through the silicon substrate in the surface micro-machining technology and the bulk micro-machining technology to serve as the piezoresistive pressure sensor structure, wafer packaging is carried out by means of a secondary anodic bonding technique, anodic bonding is carried out through silicon and glass for the first time, and anodic bonding carried out for the second time overcomes the defects that in a traditional silicon and glass anodic bonding process, PN junctions on the surface of silicon are prone to breaking down and ion pollution tends to occur because packaging is carried out in an amorphous silicon and glass anodic bonding technique. The MEMS piezoresistive pressure sensor is novel in structure, low in weight, small in size, good in stability, high in anti-pollution capacity and good in reliability and has certain application prospects in the fields of aerospace, military, automobiles, environment monitoring and the like.

Development of a high density glass interposer based on wafer level packaging technologies

Abstract: Currently glass is mainly used as unstructured wafers or panels with the highest market share in glass capping applications. Higher functionality in glass is driven by the applications in RF and Photonics. Since the technologies of via interconnects in Si and glass are completely different, it is challenging to perform a direct and fair comparison. Mainly laser technology and electrical discharge are used for forming the vias into the glass. Slightly modified thin film technologies already in mass production in WLP can be used to fill the vias with a copper metallization. Conformal metallization and full via plating are options. High yield and excellent reliability have been achieved. Generally, due to the lossy nature of silicon and complex polarization mechanism that occurs at the Si-SiO2, TSVs may suffer from severe signal integrity and EMI problems such as huge insertion loss, delay and cross-talk, depending on the Si-resistivity considered. Therefore, regarding the dielectric material, TGVs have significant advantages over TSV, especially when either LRS or MRS is used. In summary TGVs show excellent RF characteristics over TSVs. This has been proven for a test design up to 40 GHz.

Wafer bonding using Cu–Sn intermetallic bonding layers

Abstract: Wafer-level Cu-Sn intermetallic bonding is an interesting process for advanced applications in the area of MEMS and 3D interconnects The existence of two intermetallic phases for Cu-Sn system makes the wafer bonding process challenging The impact of process parameters on final bonding layer quality have been investigated for transient liquid phase wafer-level bonding based on the Cu-Sn system Subjects of this investigation were bonding temperature profile, bonding time and contact pressure as well as the choice of metal deposition method and the ratio of deposited metal layer thicknesses Typical failure modes in intermetallic compound growth for the mentioned process and design parameters have been identified and were subjected to qualitative and quantitative analysis The possibilities to avoid abovementioned failures are indicated based on experimental results © 2013 Springer-Verlag Berlin Heidelberg

Fabrication of anodically bonded capacitive micromachined ultrasonic transducers with vacuum-sealed cavities

Abstract: Capacitive micromachined ultrasonic transducers (CMUTs) have demonstrated great promise for next-generation ultrasound technology. Wafer-bonding technology particularly simplifies the fabrication of CMUTs by eliminating the requirement for a sacrificial layer and increases control over device parameters. Anodic bonding has many advantages over other bonding methods such as low temperature compatibility, high bond strength, high tolerance to particle contamination and surface roughness, and cost savings. Furthermore, the glass substrates lower the parasitic capacitance and improve reliability. The major drawback is the trapped gas inside the cavities, which occurs during bonding. Earlier CMUT fabrication efforts using anodic bonding failed to demonstrate a vacuum-sealed cavity. In this study, we developed a fabrication scheme to overcome this issue and demonstrated vacuum-backed CMUTs using anodic bonding. This new approach also simplifies the overall fabrication process for CMUTs. We demonstrated a CMUT fabrication process with three lithography steps. A vibrating plate is formed by bonding the device layer of a silicon-on-insulator (SOI) wafer on top of submicron cavities defined on a borosilicate glass wafer. The cavities and the bottom electrodes are created on the borosilicate glass wafer with a single lithography step. The recessed bottom metal layer over the glass surface allows bonding the plate directly on glass posts and therefore helps reduce the parasitic capacitance and improve the breakdown reliability. A surface roughness of 0.8 nm is achieved in the cavity using wet chemical etching. A 200-nm PECVD silicon nitride layer deposited on the 2 µm device layer of the SOI wafer prior to bonding serves as the insulation layer to prevent shorting after pull-in. The trapped gas inside the cavities is evacuated after anodic bonding by reactive ion etching. The 120-nm cavities are then sealed with PECVD silicon nitride. We measured the atmospheric deflection of the plates after fabrication, which proves the vacuum inside the cavities. Impedance and hydrophone measurements were performed both in conventional (2.8 MHz) and collapse (7.2 MHz) modes. Bonding on posts with widths as small as 2 µm was successfully demonstrated using anodic bonding which is difficult to achieve with other wafer bonding methods.