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Showing papers on "Application software published in 2003"


Patent
09 Jan 2003
TL;DR: In this paper, a power management architecture for an electrical power distribution system, or portion thereof, is disclosed, which includes multiple intelligent electronic devices (IEDs) distributed throughout the power distribution systems to manage the flow and consumption of power from the system using real time communications.
Abstract: A power management architecture for an electrical power distribution system, or portion thereof, is disclosed. The architecture includes multiple intelligent electronic devices (“IED's”) distributed throughout the power distribution system to manage the flow and consumption of power from the system using real time communications. Power management application software and/or hardware components operate on the IED's and the back-end servers and inter-operate via the network to implement a power management application. The architecture provides a scalable and cost effective framework of hardware and software upon which such power management applications can operate to manage the distribution and consumption of electrical power by one or more utilities/suppliers and/or customers which provide and utilize the power distribution system. Autonomous communication on the network between IED's, back-end servers and other entities coupled with secure networks, themselves interconnected, via firewalls, by one or more unsecure networks, is facilitated by the use of a back-channel protocol. The back-channel protocol allows a device coupled with a secure network to solicit communications from a device on the unsecure network, thereby opening a back-channel through the firewall through which the unsecure network device may send unsolicited messages to the secure network device. Communications between multiple secure networks is accomplished using a unsecure device on an intermediary unsecure network to relay communications between the secure network devices using the protocol described above.

707 citations


Journal ArticleDOI
TL;DR: The AppLeS (Application Level Scheduling) project provides a methodology, application software, and software environments for adaptively scheduling and deploying applications in heterogeneous, multiuser grid environments and outlines the findings.
Abstract: Ensembles of distributed, heterogeneous resources, also known as computational grids, have emerged as critical platforms for high-performance and resource-intensive applications. Such platforms provide the potential for applications to aggregate enormous bandwidth, computational power, memory, secondary storage, and other resources during a single execution. However, achieving this performance potential in dynamic, heterogeneous environments is challenging. Recent experience with distributed applications indicates that adaptivity is fundamental to achieving application performance in dynamic grid environments. The AppLeS (Application Level Scheduling) project provides a methodology, application software, and software environments for adaptively scheduling and deploying applications in heterogeneous, multiuser grid environments. We discuss the AppLeS project and outline our findings.

490 citations


Proceedings ArticleDOI
21 Oct 2003
TL;DR: This paper describes the first stand-alone Augmented Reality system with self-tracking running on an unmodified personal digital assistant (PDA) with a commercial camera and introduces an optional client/server architecture that is based on wireless networking and is able to dynamically and transparently offload the tracking task in order toprovide better performance in select areas.
Abstract: In this paper we describe the first stand-alone AugmentedReality (AR) system with self-tracking running on anunmodified personal digital assistant (PDA) with acommercial camera. The project exploits the readyavailability of consumer devices with a minimal need forinfrastructure. The application provides the user with athree-dimensional augmented view of the environment.Our system achieves good overlay registration accuracyby using a popular marker-based tracking toolkit(ARToolKit), which runs directly on the PDA. Weintroduce an optional client/server architecture that isbased on wireless networking and is able to dynamicallyand transparently offload the tracking task in order toprovide better performance in select areas. Thehardware/software framework is modular and can beeasily combined with many elements of an existing ARframework. As a demonstration of the effectiveness, wepresent a 3D navigation application that guides a userthrough an unknown building to a chosen location.

385 citations


Journal ArticleDOI
01 Jan 2003
TL;DR: The time-triggered nature of Giotto achieves timing predictability, which makes Giotto particularly suitable for safety-critical applications.
Abstract: Giotto provides an abstract programmer's model for the implementation of embedded control systems with hard real-time constraints. A typical control application consists of periodic software tasks together with a mode-switching logic for enabling and disabling tasks. Giotto specifies time-triggered sensor readings, task invocations, actuator updates, and mode switches independent of any implementation platform. Giotto can be annotated with platform constraints such as task-to-host mappings, and task and communication schedules. The annotations are directives for the Giotto compiler, but they do not alter the functionality and timing of a Giotto program. By separating the platform-independent from the platform-dependent concerns, Giotto enables a great deal of flexibility in choosing control platforms as well as a great deal of automation in the validation and synthesis of control software. The time-triggered nature of Giotto achieves timing predictability, which makes Giotto particularly suitable for safety-critical applications.

372 citations


Proceedings Article
09 Jun 2003
TL;DR: It is found that a few simple extensions to a host operating system can make it a much faster platform for running a VMM, and reduces virtualization overhead for a Type II VMM to 14-35% overhead, even for workloads that exercise the virtual machine intensively.
Abstract: A virtual-machine monitor (VMM) is a useful technique for adding functionality below existing operating system and application software. One class of VMMs (called Type II VMMs) builds on the abstractions provided by a host operating system. Type II VMMs are elegant and convenient, but their performance is currently an order of magnitude slower than that achieved when running outside a virtual machine (a standalone system). In this paper, we examine the reasons for this large overhead for Type II VMMs. We find that a few simple extensions to a host operating system can make it a much faster platform for running a VMM. Taking advantage of these extensions reduces virtualization overhead for a Type II VMM to 14-35% overhead, even for workloads that exercise the virtual machine intensively.

332 citations


Patent
25 Apr 2003
TL;DR: In this paper, a workload transfer mechanism transfers the executing application software to a second computer hardware processor core in a search for reduced operating power, and a transfer delay mechanism is connected to delay a subsequent transfer of the executed application software if the system operating power may be conserved by such delay.
Abstract: A computer system for conserving operating power includes a number of computer hardware processor cores that differ amongst themselves in at least in their respective operating power requirements and processing capabilities. A monitor gathers performance metric information from each of the computer hardware processor cores that is specific to a particular run of application software then executing. A workload transfer mechanism transfers the executing application software to a second computer hardware processor core in a search for reduced operating power. A transfer delay mechanism is connected to delay a subsequent transfer of the executing application software if the system operating power may be conserved by such delay.

317 citations


Journal ArticleDOI
TL;DR: Microsoft's next-generation secure computing base extends personal computers to offer mechanisms that let high-assurance software protect itself from the operating systems, device drivers, BIOS, and other software running on the same machine.
Abstract: Microsoft's next-generation secure computing base extends personal computers to offer mechanisms that let high-assurance software protect itself from the operating systems, device drivers, BIOS, and other software running on the same machine.

216 citations


Proceedings ArticleDOI
03 May 2003
TL;DR: The notion that user session data gathered as users operate web applications can be successfully employed in the testing of those applications, particularly as those applications evolve and experience different usage profiles is explored.
Abstract: Web applications have become critical components of the global information infrastructure, and it is important that they be validated to ensure their reliability. Therefore, many techniques and tools for validating web applications have been created. Only a few of these techniques, however, have addressed problems of testing the functionality of web applications, and those that do have not fully considered the unique attributes of web applications. In this paper we explore the notion that user session data gathered as users operate web applications can be successfully employed in the testing of those applications, particularly as those applications evolve and experience different usage profiles. We report results of an experiment comparing new and existing test generation techniques for web applications, assessing both the adequacy of the generated tests and their ability to detect faults on a point-of-sale web application. Our results show that user session data can produce test suites as effective overall as those produced by existing white-box techniques, but at less expense. Moreover, the classes of faults detected differ somewhat across approaches, suggesting that the techniques may be complimentary.

212 citations


Patent
Jaakko Lehikoinen1, Jussi Impio1, Hannu Korhonen1, Mika Roykkee1, Pekka Ollikainen1 
06 Oct 2003
TL;DR: In this paper, the authors present a method to operate a mobile terminal having a memory storing application software and data that is descriptive of the use of the mobile terminal, and that further has a display and a controller coupled to the memory.
Abstract: A mobile terminal includes a memory storing application software and data that is descriptive of the use of the mobile terminal, a display and a controller that is coupled to the memory. The controller is responsive to the application software and to at least a sub-set of the stored data for visualizing on the display, in a graphical form, the use of the mobile station over a period of time. The controller preferably constructs a temporally-based visualization of the use of the mobile station, such as a timeline visualization of the use of the mobile station. The controller may further be responsive to the application software and to at least the sub-set of the stored data for automatically deriving a content of a user's web log (blog). A method is also disclosed to operate a mobile terminal having a memory storing application software and data that is descriptive of the use of the mobile terminal, and that further has a display and a controller coupled to the memory. The method includes selecting at least a portion of the data and constructing a blog that is indicative of the use of the mobile station over a period of time, as indicated by the selected portion of the data. The blog may include an animation that is indicative of the use of the mobile station over the period of time, and may also include textual data that is automatically generated in accordance with the use of the mobile station over the period of time.

183 citations


Proceedings ArticleDOI
02 Jun 2003
TL;DR: This work describes the system architecture and initial on-chip tools, including profiler, decompiler, synthesis, and placement and routing tools for a simplified configurable logic fabric, able to perform dynamic partitioning of real benchmarks, and shows speedups averaging 2.6 for five benchmarks taken from Powerstone, Netbench and the own benchmarks.
Abstract: Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy consumption in embedded systems. Meanwhile, dynamic software optimization methods have shown the usefulness and feasibility of runtime program optimization, but those optimizations do not achieve as much as partitioning. We introduce a first approach to dynamic hardware/software partitioning. We describe our system architecture and initial on-chip tools, including profiler, decompiler, synthesis, and placement and routing tools for a simplified configurable logic fabric, able to perform dynamic partitioning of real benchmarks. We show speedups averaging 2.6 for five benchmarks taken from Powerstone, NetBench, and our own benchmarks.

177 citations


Patent
29 Dec 2003
TL;DR: In this paper, a system and method for providing data files, such as ringtones, screensavers, games, and other types of application software, to a mobile telephone such as a cellular telephone, is disclosed.
Abstract: A system and method for providing data files, such as ringtones, screensavers, games, and other types of application software, to a mobile telephone, such as a cellular telephone, is disclosed. An illustrative system is internet-based and provides subscribers with access via a general purpose computer to a large number of data files that are selectable by subscribers for storing in respective user-specific data lockers that are established by the system. Users may access their user-specific data lockers via a URL link that is sent to their mobile phones by the system as a text message.

Proceedings ArticleDOI
03 Mar 2003
TL;DR: The general scope of the research is presented, and the communication scheme, the design environment and the hardware/software context switching issues are details, which proved its feasibility by allowing us to design a relocatable video decoder.
Abstract: The ability to (re)schedule a task either in hardware or software will be an important asset in a reconfigurable systems-on-chip. To support this feature we have developed an infrastructure that, combined with a suitable design environment permits the implementation and management of hardware/software relocatable tasks. This paper presents the general scope of our research, and details the communication scheme, the design environment and the hardware/software context switching issues. The infrastructure proved its feasibility by allowing us to design a relocatable video decoder. When implemented on an embedded platform, the decoder performs at 23 frames/s (320/spl times/240 pixels, 16 bits per pixel) in reconfigurable hardware and 6 frames/s in software.

Proceedings ArticleDOI
08 Feb 2003
TL;DR: This paper demonstrates the application of a rigorous statistical technique to the setup and analysis phases of the simulation process by applying a Plackett and Burman design to identify key processor parameters and classify benchmarks based on how they affect the processor.
Abstract: Due to cost, time, and flexibility constraints, simulators are often used to explore the design space when developing new processor architectures, as well as when evaluating the performance of new processor enhancements. However, despite this dependence on simulators, statistically rigorous simulation methodologies are not typically used in computer architecture research. A formal methodology can provide a sound basis for drawing conclusions gathered from simulation results by adding statistical rigor, and consequently, can increase confidence in the simulation results. This paper demonstrates the application of a rigorous statistical technique to the setup and analysis phases of the simulation process. Specifically, we apply a Plackett and Burman design to: (1) identify key processor parameters; (2) classify benchmarks based on how they affect the processor; and (3) analyze the effect of processor performance enhancements. Our technique expands on previous work by applying a statistical method to improve the simulation methodology instead of applying a statistical model to estimate the performance of the processor.

Proceedings ArticleDOI
16 Mar 2003
TL;DR: The future application of the wireless sensor networks for the laboratory mice is provided and detailed information about networking and applications of the Wireless Sensor Networks is outlined.
Abstract: Wireless Sensor Networks represent a new generation of real-time embedded systems with significantly different communication constraints from the traditional networked systems. This paper first discusses about the hardware platforms and secondly about the software platform. Then detailed information about networking and applications of the Wireless Sensor Networks is outlined. Lastly, this paper provides the future application of the wireless sensor networks for the laboratory mice.

Patent
24 Jul 2003
TL;DR: In this article, a power management architecture for an electrical power distribution system, or portion thereof, is disclosed, which includes multiple intelligent electronic devices (IEDs) distributed throughout the power distribution systems to manage the flow and consumption of power from the system.
Abstract: A power management architecture for an electrical power distribution system, or portion thereof, is disclosed. The architecture includes multiple intelligent electronic devices (“IED's”) distributed throughout the power distribution system to manage the flow and consumption of power from the system. The IED's are linked via a network to back-end servers. Power management application software and/or hardware components operate on the IED's and the back-end servers and inter-operate via the network to implement a power management application. The architecture provides a scalable and cost effective framework of hardware and software upon which such power management applications can operate to manage the distribution and consumption of electrical power by one or more utilities/suppliers and/or customers which provide and utilize the power distribution system. In particular, each IED is capable of incrementally generated or consuming communicated XML documents containing power management data without having to buffer the complete XML document is memory before, during or after processing.

Journal ArticleDOI
TL;DR: The authors have developed a simulation methodology that uses multiple simulations, pays careful attention to the effects of scaling on workload behavior, and extends Virtutech AB's Simics full system functional simulator with detailed timing models.
Abstract: As dependence on database management systems and Web servers increases, so does the need for them to run reliably and efficiently-goals that rigorous simulations can help achieve. Execution-driven simulation models system hardware. These simulations capture actual program behavior and detailed system interactions. The authors have developed a simulation methodology that uses multiple simulations, pays careful attention to the effects of scaling on workload behavior, and extends Virtutech AB's Simics full system functional simulator with detailed timing models. The Wisconsin Commercial Workload Suite contains scaled and tuned benchmarks for multiprocessor servers, enabling full-system simulations to run on the PCs that are routinely available to researchers.

Patent
18 Sep 2003
TL;DR: In this article, the authors present methods and a computer-readable program for providing autonomic, event-driven upgrade maintenance of one or more software modules residing on a computer system.
Abstract: The present invention provides methods and a computer-readable program for providing autonomic, event driven upgrade maintenance of one or more software modules residing on a computer system. In a preferred embodiment, a method begins by detecting a predefined triggering event on the computer system indicative of a potential maintenance issue. Next the computer system connects to an upgrade management server, where the upgrade maintenance server creates a list of recommended upgrade modules to download to the computer system, the list based upon the triggering event and a set of selection policies. The method then downloads the list of recommended upgrade modules from the upgrade management server to the computer system, and selectively installs upgrade modules chosen from the list of recommended upgrade modules on the computer system. The user is then notified of the status of the upgrade maintenance operation.

Proceedings ArticleDOI
03 May 2003
TL;DR: This paper modified and applied the COBRA/spl trade/ method (Cost Estimation, Benchmarking, and Risk Assessment) to the web applications of a small Australian company, specializing in web development.
Abstract: In this paper, we investigate the application of the COBRA/spl trade/ method (Cost Estimation, Benchmarking, and Risk Assessment) in a new application domain, the area of web development. COBRA combines expert knowledge with data on a small number of projects to develop cost estimation models, which can also be used for risk analysis and benchmarking purposes. We modified and applied the method to the web applications of a small Australian company, specializing in web development. In this paper we present the modifications made to the COBRA method and results of applying the method In our study, using data on twelve web applications, the estimates derived from our Web-COBRA model showed a Mean Magnitude of Relative Error (MMRE) of 0.17. This result significantly outperformed expert estimates from Allette Systems (MMRE 0.37). A result comparable to Web-COBRA was obtained when applying ordinary least squares regression with size in terms of Web Objects as an independent variable (MMRE 0.23).

Patent
13 Feb 2003
TL;DR: In this article, a middleware services layer for a platform system for a mobile terminal for a wireless telecommunications system is proposed, which includes at least one application programming interface (API) for providing access to the mobile terminal platform assembly for loading, installing and running application software.
Abstract: A middleware services layer for a platform system for a mobile terminal for a wireless telecommunications system, the platform system including a mobile terminal platform assembly having a software services component, and application software loaded, installed and run in said mobile terminal platform assembly. The middleware services layer comprises at least one application programming interface (API) for providing access to the mobile terminal platform assembly for loading, installing and running application software in said mobile terminal platform assembly; and, at the same time, isolates the platform assembly from the applications via the at least one API.

Patent
02 Apr 2003
TL;DR: In this article, the authors present tools and techniques for facilitating the management of storage, software, and other resources of a computer at a distinct management computer using a disassociated image of a managed computer's storage.
Abstract: The present invention provides tools and techniques for facilitating (314) management of storage (122), software (118), and other resources of a computer (102) at a distinct management computer (110) using a disassociated ample image (104) of a managed computer's storage. Ample images may be searched (310) to identify (414) infected files or illegal files, to extract (410) disk usage information, or for other reasons. Ample images may be modified (312) and then deployed (316) back to the original imaged computer and/or to other computers outside the management node. Modifications may change (502, 504, 506) application software, change (508, 510, 512) hardware drivers to match hardware changes on the target computer(s), manipulate (520) partitions, and/or perform other steps to optimize storage, software, or other resources.

Proceedings ArticleDOI
George Candea1, Emre Kiciman1, S. Zhang1, P. Keyani1, Armando Fox1 
25 Jun 2003
TL;DR: This paper demonstrates that the dependability of generic, evolving J2EE applications can be enhanced through a combination of a few recovery-oriented techniques, resulting in JAGR-JBoss with application-generic recovery - a self-recovering execution platform.
Abstract: This paper demonstrates that the dependability of generic, evolving J2EE applications can be enhanced through a combination of a few recovery-oriented techniques. Our goal is to reduce downtime by automatically and efficiently recovering from a broad class of transient software failures without having to modify applications. We describe here the integration of three new techniques into JBoss, an open-source J2EE application server. The resulting system is JAGR-JBoss with application-generic recovery - a self-recovering execution platform. JAGR combines application-generic failure-path inference (AFPI), path-based failure detection, and micro-reboots. AFPI uses controlled fault injection and observation to infer paths that faults follow through a J2EE application. Path-based failure detection uses tagging of client requests and statistical analysis to identify anomalous component behavior. Micro-reboots are fast reboots we perform at the sub-application level to recover components from transient failures; by selectively rebooting only those components that are necessary to repair the failure, we reduce recovery time. These techniques are designed to be autonomous and application-generic, making them well suited to the rapidly changing software of Internet services.

Journal ArticleDOI
TL;DR: Web services computing poses significant challenges as developers determine how to leverage emerging technologies to automate individual applications based on cross-organizational, heterogeneous software components.
Abstract: Web services computing poses significant challenges as developers determine how to leverage emerging technologies to automate individual applications based on cross-organizational, heterogeneous software components.

Proceedings ArticleDOI
05 Apr 2003
TL;DR: This paper reflects on case studies of two infrastructure systems for interactive applications, and looks at how traditional user-centered techniques, while appropriate for application design and evaluation, fail to properly support infrastructure design and Evaluation.
Abstract: Infrastructure software comprises code libraries or runtime processes that support the development or operation of application software. A particular infrastructure system may support certain styles of application, and may even determine the features of applications built using it. This poses a challenge: although we have good techniques for designing and evaluating interactive applications, our techniques for designing and evaluating infrastructure intended to support these applications are much less well formed. In this paper, we reflect on case studies of two infrastructure systems for interactive applications. We look at how traditional user-centered techniques, while appropriate for application design and evaluation, fail to properly support infrastructure design and evaluation. We present a set of lessons from our experience, and conclude with suggestions for better user-centered design and evaluation of infrastructure software.

Journal ArticleDOI
TL;DR: The book does not offer a fluent narrative, as many traditional histories do, and readers may still feel the text to be disruptive as the scene jumps abruptly among Wall Street, Menlo Park, the U.S. patent court, Scientific American, product catalogues, and New York City government.
Abstract: IEEE Technology and Society Magazine, Spring 2003 financiers when the progress of his technical developments did not meet expectation. When he tried to install the first electric light system in New York, he had to deal with the city government that had its own discourse, rhetoric, and political languages. The Languages of Edison’s Light is filled with these kinds of examples, examples showing how speech acts proceed interactively in the real world. The distinct perspective Bazerman adopts in doing the history of Edison’s perhaps most important invention has great strength. But it has a shortcoming, too. The book does not offer a fluent narrative, as many traditional histories do. Although we can understand why the author juxtaposed apparently unrelated stories, readers may still feel the text to be disruptive as the scene jumps abruptly among Wall Street, Menlo Park, the U.S. patent court, Scientific American, product catalogues, New York City government, the Chicago Exhibition, and General Electric. The different stories are united under a common abstract theme. They do not have obvious causal connections, or at least these connections were not obvious to this reader. Readers should realize that what they are going to encounter is not a comprehensive and integrated account of Edison’s entire career, a period of his career, or an invention of his. What they will read is a collection of chapters that look at the history of Edison’s incandescent light from the viewpoint of communication studies.

Proceedings ArticleDOI
03 Mar 2003
TL;DR: The operation state machine (OSM) computation model is proposed to serve as the foundation of a retargetable modeling framework capable of accurately capturing complex processor behaviors and generating efficient simulators.
Abstract: Given the growth in application-specific processors, there is a strong need for a retargetable modeling framework that is capable of accurately capturing complex processor behaviors and generating efficient simulators. We propose the operation state machine (OSM) computation model to serve as the foundation of such a modeling framework. The OSM model separates the processor into two interacting layers: the operation layer where operation semantics and timing are modeled, and the hardware layer where disciplined hardware units interact. This declarative model allows for direct synthesis of micro-architecture simulators as it encapsulates precise concurrency semantics of microprocessors. We illustrate the practical benefits of this model through two case studies - the StrongARM core and the PowerPC-750 superscalar processor. The experimental results demonstrate that the OSM model has excellent modeling productivity and model efficiency. Additional applications of this modeling framework include derivation of information required by compilers and formal analysis for processor validation.

Patent
07 Nov 2003
TL;DR: In this article, a common consolidation management application provides an interface to the multiple different system management software applications and at least one user input console and an adapter in each of the system management applications supports communication with the consolidation application.
Abstract: A common consolidation management application provides an interface to the multiple different system management software applications and at least one user input console. An adapter in each of the system management software applications supports communication with the consolidation application. A system administrator issues requests to different system management software applications using a common interface provided by the consolidation application. The consolidation application can be installed over an existing complex of computer systems managed by different management applications, without modifying the managed systems or replacing the management applications.

Proceedings ArticleDOI
01 May 2003
TL;DR: This work shows DISE implementations of two ACFs---memory fault isolation and dynamic code decompression---and their composition, and shows that DISE ACFs have better performance than their software counterparts, and more flexibility than hardware implementations.
Abstract: Dynamic Instruction Stream Editing (DISE) is a cooperative software-hardware scheme for efficiently adding customization functionality---e.g, safety/security checking, profiling, dynamic code decompression, and dynamic optimization---to an application. In DISE, application customization functions (ACFs) are formulated as rules for macro-expanding certain instructions into parameterized instruction sequences. The processor executes the rules on the fetched instructions, feeding the execution engine an instruction stream that contains ACF code. Dynamic instruction macro-expansion is widely used in many of today's processors to convert a complex ISA to an easier-to-execute, finer-grained internal form. DISE co-opts this technology and adds a programming interface to it.DISE unifies the implementation of a large class of ACFs that would otherwise require either special-purpose hardware widgets or static binary rewriting. We show DISE implementations of two ACFs---memory fault isolation and dynamic code decompression---and their composition. Simulation shows that DISE ACFs have better performance than their software counterparts, and more flexibility (which sometimes translates into performance) than hardware implementations.

Proceedings ArticleDOI
03 May 2003
TL;DR: The model presents a novel unified framework to investigate and predict effort, schedule, and defects of a software project and investigates its theoretical properties and application to several projects in Avaya to predict and plan development resource allocation.
Abstract: We set out to answer a question we were asked by software project management: how much effort remains to be spent on a specific software project and how will that effort be distributed over time? To answer this question we propose a model based on the concept that each modification to software may cause repairs at some later time and investigate its theoretical properties and application to several projects in Avaya to predict and plan development resource allocation. Our model presents a novel unified framework to investigate and predict effort, schedule, and defects of a software project. The results of applying the model confirm a fundamental relationship between the new feature and defect repair changes and demonstrate its predictive properties.

Patent
16 Jul 2003
TL;DR: In this paper, a workload assignment mechanism assigns jobs to processor cores in order to maximize overall system throughput and the throughput of individual jobs, based on performance metric information from each of the computer hardware processor cores that are specific to a particular run of application software.
Abstract: A computer system for maximizing system and individual job throughput includes a number of computer hardware processor cores that differ amongst themselves in at least in their respective resource requirements and processing capabilities. A monitor gathers performance metric information from each of the computer hardware processor cores that are specific to a particular run of application software then executing. Based on these metrics, a workload assignment mechanism assigns jobs to processor cores in order to maximize overall system throughput and the throughput of individual jobs.

Proceedings ArticleDOI
15 Nov 2003
TL;DR: A novel co-scheduling scheme for improving performance of fine-grain collective activities such as barriers and reductions is presented, an implementation consisting of operating system kernel modifications and run-time system is described, and a set of empirical results comparing the technique with traditional operating system scheduling are presented.
Abstract: A parallel application benefits from scheduling policies that include a global perspective of the application's process working set. As the interactions among cooperating processes increase, mechanisms to ameliorate waiting within one or more of the processes become more important. In particular, collective operations such as barriers and reductions are extremely sensitive to even usually harmless events such as context switches among members of the process working set. For the last 18 months, we have been researching the impact of random short-lived interruptions such as timer-decrement processing and periodic daemon activity, and developing strategies to minimize their impact on large processor-count SPMD bulk-synchronous programming styles. We present a novel co-scheduling scheme for improving performance of fine-grain collective activities such as barriers and reductions, describe an implementation consisting of operating system kernel modifications and run-time system, and present a set of empirical results comparing the technique with traditional operating system scheduling. Our results indicate a speedup of over 300% on synchronizing collectives.