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Showing papers on "Atomic layer deposition published in 1998"


Patent
15 Dec 1998
TL;DR: In this paper, a method for forming a metal layer using an atomic layer deposition process was proposed, in which a sacrificial metal atomic layer is formed on a semiconductor substrate by reacting a precursor containing a metal with a reducing gas, and a metal atom is formed of metal atoms separated from a metal halide gas.
Abstract: A method for forming a metal layer using an atomic layer deposition process. A sacrificial metal atomic layer is formed on a semiconductor substrate by reacting a precursor containing a metal with a reducing gas, and a metal atomic layer is formed of metal atoms separated from a metal halide gas on a semiconductor substrate by reacting the sacrificial metal atomic layer with a metal halide gas. Also, a silicon atomic layer may be additionally formed on the metal atomic layer using a silicon source gas, to thereby alternately stack metal atomic layers and silicon layers. Thus, a metal layer or a metal silicide layer having excellent step coverage can be formed on the semiconductor substrate.

454 citations


Patent
In-seon Park1, Yeong-kwan Kim1, Sang-In Lee1, Byung-hee Kim1, Sang-min Lee1, Chang-Soo Park1 
31 Jul 1998
TL;DR: In this article, the first dielectric layer, an electrically insulating layer, and an aluminum oxide buffer layer formed by atomic layer deposition (ALD) and stabilized by heat treatment at a temperature of less than about 600°C, are provided.
Abstract: Integrated circuit devices include a first dielectric layer, an electrically insulating layer on the first dielectric layer and an an aluminum oxide buffer layer formed by atomic layer deposition (ALD) and stabilized by heat treatment at a temperature of less than about 600° C., between the first dielectric layer and the electrically insulating layer. The first dielectric layer may comprise a high dielectric material such as a ferroelectric or paraelectric material. The electrically insulating layer may also comprise a material selected from the group consisting of silicon dioxide, borophosphosilicate glass (BPSG) and phosphosilicate glass (PSG). To provide a preferred integrated circuit capacitor, a substrate may be provided and an interlayer dielectric layer may be provided on the substrate. Here, a metal layer may also be provided between the interlayer dielectric layer and the first dielectric layer. The metal layer may comprise a material selected from the group consisting of Pt, Ru, Ir, and Pd.

259 citations


Patent
Hyeun-seog Leem1
27 Aug 1998
TL;DR: In this article, a method for forming an Al layer using an atomic layer deposition method is disclosed, in which a semiconductor substrate is loaded into a deposition chamber and an Al source gas is supplied into the deposition chamber.
Abstract: A method for forming an Al layer using an atomic layer deposition method is disclosed. First, a semiconductor substrate is loaded into a deposition chamber. Then, an Al source gas is supplied into the deposition chamber and the Al source gas is chemisorbed into the semiconductor substrate to form the Al layer. Next, a purge gas is supplied onto the deposition chamber without supplying the Al source gas so that the unreacted Al source gas is removed, thereby completing the Al layer. To form an Al layer to a required thickness, the step of supplying the Al source gas and the step of supplying the purge gas are repeatedly performed, thereby forming an Al atomic multilayer. Therefore, the uniformity and step coverage of the Al layer can be greatly improved.

239 citations


Patent
Kang Sang Beom1, Sang-In Lee1
30 Sep 1998
TL;DR: In this article, a metal interconnection is fabricated in a contact hole of a semiconductor device to reduce the contact resistance and improve the step coverage of the interconnection, and an ALD (atomic layer deposition)-metal barrier layer is formed on the protective layer.
Abstract: A method and an apparatus of fabricating a metal interconnection in a contact hole of a semiconductor device reduces contact resistance and improves step coverage. A contact hole is opened in an interlayer insulating film formed on a semiconductor substrate. A conductive layer used as an ohmic contact layer is formed on the interlayer insulating film including the contact hole. An upper surface of the conductive layer is nitrided to form a protective layer. An ALD (atomic layer deposition)-metal barrier layer is formed on the protective layer. The resulting metal barrier layer has good step coverage and no impurities, and the protective layer prevents defects in the conductive layer caused by precursor impurities used during the formation of the metal barrier layer.

226 citations


Journal ArticleDOI
TL;DR: In this article, an ideal linear relationship between number of cycles and film thickness is confirmed, and the results suggest that film thickness per cycle could exceed 1 ML/cycle in ALD, and are explained by the rechemisorption mechanism of the reactant sources.
Abstract: Atomic layer deposition (ALD) of amorphous TiN films on SiO2 between 170°C and 210°C has been investigated by alternate supply of reactant sources, Ti[N(C2H5CH3)2]4 [tetrakis(ethylmethylamino)titanium:TEMAT] and NH3. Reactant sources were injected into the reactor in the following order:TEMAT vapor pulse, Ar gas pulse, NH3 gas pulse and Ar gas pulse. Film thickness per cycle was saturated at around 1.6 monolayers (ML) per cycle with sufficient pulse times of reactant sources at 200°C. The results suggest that film thickness per cycle could exceed 1 ML/cycle in ALD, and are explained by the rechemisorption mechanism of the reactant sources. An ideal linear relationship between number of cycles and film thickness is confirmed. As a result of surface limited reactions of ALD, step coverage was excellent. Particles caused by the gas phase reactions between TEMAT and NH3 were almost absent because TEMAT was segregated from NH3 by the Ar pulse. In spite of relatively low substrate temperature, carbon impurity was incorporated below 4 at.%.

148 citations


Journal ArticleDOI
TL;DR: In this article, an ALD of amorphous TiN films on SiO2 between 170°C and 210°C was investigated by alternate supply of reactant sources, Ti[N(C2H5CH3)2]4 [tetrakis(ethylmethylamino)titanium: TEMAT] and NH3.
Abstract: Atomic layer deposition(ALD) of amorphous TiN films on SiO2 between 170°C and 210°C has been investigated by alternate supply of reactant sources, Ti[N(C2H5CH3)2]4 [tetrakis(ethylmethylamino)titanium: TEMAT] and NH3. Reactant sources were injected into the reactor in the order of TEMAT vapor pulse, Ar gas pulse, NH3 gas pulse and Ar gas pulse. Film thickness per cycle was saturated at around 0.5 nrm/cycle with sufficient pulse time of TEMAT at 200°C. The ideal linear relationship between number of cycles and film thickness is confirmed. As a result of surface limited reactions of ALD, step coverage was excellent. Particles caused by the gas phase reactions between TEMAT and NH3 were almost free because TEMAT was separated from NH3 by the Ar pulse. In spite of relatively low substrate temperature, carbon impurity was incorporated below 4at%.

119 citations


Journal ArticleDOI
TL;DR: In this paper, a two-step deposition process is introduced to grow textured and low-resistivity ZnO films by combining the ALD and conventional photo-induced metal-orgainc chemical vapor deposition (photo-MOCVD) techniques.
Abstract: B-doped ZnO films are prepared on Corning 7059 glass by atomic layer deposition (ALD) using diethylzinc (DEZn), H2O as reactant gases, and diborane (B2H6) as a dopant gas. A two-step deposition process is introduced to grow textured and low-resistivity ZnO films by combining the ALD and conventional photo-induced metalorgainc chemical vapor deposition (photo-MOCVD) techniques. The electrical and optical properties of ZnO films are effectively improved by depositing lower-resistivity ALD-ZnO films on the textured photo-MOCVD-ZnO films while the textured surface morphologies are well maintained. Furthermore, the resistivity of the ALD-ZnO film was further improved by the two-step process and a low resistivity of 2.0×10-4 Ωcm was achieved for the film which was only about 400 nm thick.

100 citations


Journal ArticleDOI
TL;DR: In this article, the growth behavior of TiO 2 thin films from TiCl 4 and H 2 O at 150°C was found to result in nonhomogeneous film growth as a function of time.

87 citations


Journal ArticleDOI
TL;DR: In this paper, a broad band and two sharp peaks were observed in the photoluminescence spectra measured under continuous-wave Ar + laser excitation at temperatures 5-165 K.

72 citations


Journal ArticleDOI
TL;DR: In this paper, the authors investigated the mechanism of the selective deposition of silicon nitride films on the hydrogen-terminated Si surface using Fourier transform infrared attenuated total reflection (FT-IR-ATR) spectroscopy.

66 citations


Patent
09 Jan 1998
TL;DR: In this paper, a semiconductor fabrication method for forming a film in a reactor is described, where process conditions (temperature and pressure) are initially stabilized prior to a film deposition cycle.
Abstract: An exemplary implementation of the present invention discloses a semiconductor fabrication method for forming a film in a reactor. Process conditions (temperature and pressure) are initially stabilized prior to a film deposition cycle. Once process conditions are stable, chemical elements of are nucleated onto a substrate surface to form a nucleation surface of the film. The bulk portion of the film is then deposited onto the nucleation surface. Finally, after the bulk of the film is deposited the surface of the film is conditioned. To tailor a film the process conditions are varied during the film deposition cycle wherein at least one of the pressures and temperatures is varied by at least 10%. In a specific implementation, a capacitor dielectric of silicon nitride is tailored by varying the pressure for the bulk film deposition and by varying both the temperature and pressure for the film surface formation phase.

Journal ArticleDOI
TL;DR: In this article, the stability of the electrical properties of the obtained B-doped ZnO films was investigated and it was found that these properties were very stable, indicating that the ALD technique is attractive for the deposition of high-quality transparent conducting ZnOs.
Abstract: B-doped ZnO films were prepared on Corning 7059 glass by atomic layer deposition (ALD) using diethylzinc (DEZn) and H2O as reactant gases, and diborane (B2H6) as the dopant gas. The stability of the electrical properties of the obtained ZnO films was investigated. Variations in the electrical properties of the ZnO films with air exposure and heat treatment were observed. The stability of the electrical properties of the ZnO films grown by metalorganic vapor deposition (MOCVD) and photo-MOCVD was also investigated. It was found that the electrical properties of ZnO films grown by ALD were very stable, indicating that the ALD technique is attractive for the deposition of high-quality transparent conducting ZnO films.

Patent
19 Feb 1998
TL;DR: In this article, a transparent barrier is formed from a vapor deposited film provided with an aluminum oxide vapor deposited thin film by an electron beam type physical vapor growth method at least on one side surface of a transparent polymer film.
Abstract: PROBLEM TO BE SOLVED: To provide a transparent barrier film excellent in transparency, gaseous oxygen barrier property, steam barrier property or the like, which is produced at a low cost and useful as a packing material suitable for the filling and packing of various articles such as food and drink, pharmaceuticals, electronic parts, cosmetics, detergents or others. SOLUTION: The transparent barrier film is formed from a vapor deposited film provided with an aluminum oxide vapor deposited thin film by an electron beam type physical vapor growth method at least on one side surface of a transparent polymer film. Further the aluminum oxide vapor deposited thin film is formed so that the content ratio of aluminum element and oxygen element, which constitute the vapor deposited film, increases toward the surface in the film thickness direction. COPYRIGHT: (C)1999,JPO

Journal ArticleDOI
TL;DR: In this paper, the results of a response surface characterization of SiGe deposition are presented, and the obtained results in terms of atomistic models of deposition are explained, using these strategies, SiGe TFT's fabricated using solid phase crystallization and a 550/spl deg/C process are demonstrated.
Abstract: Polycrystalline thin-film transistors (TFT's) are promising for use as high-performance pixel and integrated driver transistors for active matrix liquid crystal displays (AMLCD's). Silicon-germanium is a promising candidate for use as the channel material due to its low thermal budget requirements. The binary nature of the silicon-germanium system complicates the optimization of the channel deposition conditions. To date, little work has been done to perform this optimization, resulting in poor performance for SiGe TFT's. We report on optimization studies done on the low-pressure chemical vapor deposition of SiGe and its effect on TFT performance. We detail the results of a response surface characterization of SiGe deposition, and explain the obtained results in terms of atomistic models of deposition. Optimization strategies to enable the fabrication of high-performance SiGe TFT's are explained, Using these strategies, SiGe TFT's fabricated using solid phase crystallization and a 550/spl deg/C process are demonstrated, with mobility greater than 40 cm/sup 2//V-s. Analysis is also performed on the effect of Ge-catalysis on the maximum optimization range. Results suggest that SiGe may offer enhanced optimization ranges over Si, as a result of this catalysis.

Patent
20 Nov 1998
TL;DR: The manufacturing process of thin film by atomic layer deposition comprises: (1) chemically absorbing a first reactant on a substrate by injecting into loaded chamber; (2) purging or pumping chamber to remove first reaction; (3) densely chemically absorbing the second reactant in the chamber; and (4) removing the first reaction from the substrate; (5) repeating process with second reaction; and, (6) forming solid thin film using chemical exchange by densely absorbing the substrate by again injecting second reaction into the chamber as mentioned in this paper.
Abstract: Manufacture of thin film by atomic layer deposition comprises: (1) chemically absorbing a first reactant on a substrate by injecting into loaded chamber; (2) purging or pumping chamber to remove first reactant; (3) densely chemically absorbing the first reactant on the substrate by injecting into the chamber; (4) purging or pumping chamber to remove first reactant; (5) repeating process with second reactant; (6) forming solid thin film using chemical exchange by densely absorbing the second reactant on the substrate by again injecting second reactant into chamber

Patent
29 Jan 1998
TL;DR: In this article, a method of forming a thin film for a semiconductor device which applies Disilane (Si 2 H 6 ) to chemical vapor deposition is capable of improving deposition rate and step coverage of the thin film although the thin material is deposited at lower temperatures, thereby improving productivity and reliability of the semiconductordevice.
Abstract: A method of forming a thin film for a semiconductor device which applies disilane (Si 2 H 6 ) to chemical vapor deposition is capable of improving deposition rate and step coverage of the thin film although the thin film is deposited at lower temperatures, thereby improving productivity and reliability of the semiconductor device. In order to form various thin films, Si 2 H 6 and N 2 O, or Si 2 H 6 and O 2 are applied for an oxide film, Si 2 H 6 and NH 3 for a nitride film, Si 2 H 6 , N 2 O, and NH 3 for a nitride-oxide film, Si 2 H 6 , O 2 , and PH 3 or TMOP for a PSG film, and Si 2 H 6 , O 2 , B 2 H 6 or TMOB, and PH 3 or TMOP for a BPSG film. Also, a system for the method according to the present invention is used among an atmospheric pressure chemical vapor deposition system, low pressure chemical vapor deposition system, and plasma chemical vapor deposition system.

Proceedings ArticleDOI
14 Sep 1998
TL;DR: In this article, a large area of approximately 1 mm2 was covered by a single line with a width of about 120 nm and a length of about 1 mm 2.1.
Abstract: line (852 nm) and a width of about 120 nm and covering a large area of approximately 1 mm2.

Patent
23 Apr 1998
TL;DR: In this paper, a method for forming a conductive layer using an atomic layer deposition process was proposed, in which a sacrificial metal atomic layer is formed on a semiconductor substrate by reacting a precursor containing a metal with a reducing gas, and a metal atom where metal atoms dissolved from a metal halide gas is deposited is formed by reacting the sacrificial metals atomic layer with a metal hydrogen gas.
Abstract: A method for forming a conductive layer using an atomic layer deposition process. A sacrificial metal atomic layer is formed on a semiconductor substrate by reacting a precursor containing a metal with a reducing gas, and a metal atomic layer where metal atoms dissolved from a metal halide gas is deposited is formed on a semiconductor substrate by reacting the sacrificial metal atomic layer with a metal halide gas. Also, a silicon atomic layer may be additionally formed on the metal atomic layer using a silicon source gas, to thereby alternately stack metal atomic layers and silicon layers.

Proceedings Article
01 Jan 1998
TL;DR: In this paper, conditions of the CIGS surface necessary for ALD growth are investigated and the heterojunction interface is characterized by band alignment studies of ZnO/CIGS and In2S3/CigS interfaces, and the conduction band offset is determined by in situ X-ray and UV photoelectron spectroscopy during layer by layer formation of buffer material.
Abstract: Cu(In,Ga)Se2 (CIGS) thin film solar cells contain a thin layer of CdS. To avoid toxic heavy-metal-containing waste in the module production the development of a cadmium-free buffer layer is desirable. This thesis considers alternative Cd-free buffer materials deposited by Atomic Layer Deposition (ALD). Conditions of the CIGS surface necessary for ALD growth are investigated and the heterojunction interface is characterized by band alignment studies of ZnO/CIGS and In2S3/CIGS interfaces. The thesis also includes investigations on the surface modification of the CIGS absorber by sulfurization. According to ALD theory the growth process is limited by surface saturated reactions. The ALD growth on CIGS substrates shows nucleation failure and generally suffers from surface contaminations of the CIGS layer. The grade of growth disturbance varies for different ALD precursors. The presence of surface contaminants is related to the substrate age and sodium content. Improved growth behavior is demonstrated by different pretreatment procedures. The alignment of the energy bands in the buffer/absorber interface is an important parameter for minimization of the losses in a solar cell. The valence band and conduction band offsets was determined by in situ X-ray and UV photoelectron spectroscopy during layer by layer formation of buffer material. The conduction band offset (ΔEc) should be small but positive for optimal solar cell electrical performance according to theory. The conduction band offset was determined for the ALD ZnO/CIGS interface (ΔEc = -0.2 eV) and the ALD In2S3/CIGS interface (ΔEc = -0.25 eV). A high temperature process for bandgap grading and a low temperature process for surface passivation by post deposition sulfurization in H2S were investigated. It is concluded that the high temperature sulfurization of CuIn(1-x)GaxSe2 leads to phase separation when x>0. The low temperature process did not result in enhanced device performance.



Journal ArticleDOI
TL;DR: In this paper, single crystal GaN films have been grown on an Al2O3 coated (001)Si substrate in a horizontal-type low-pressure MOVPE system, and the linewidth of (0002) peak of the X-ray rocking curve was 54 arcmin and the films had heavy mosaic structures.

Proceedings ArticleDOI
14 Jun 1998
TL;DR: In this article, thin, boron doped diamond films, have been used to build sensor devices acting as Wheatstone bridge elements, which have been exposed to simulated atomic oxygen.
Abstract: Diamond is a combustible material like graphite and amorphous carbon. Amorphous carbon is currently used as an atomic oxygen sensor material for short space flight missions. Thin, boron doped diamond films, have been used to build sensor devices acting as Wheatstone bridge elements. These devices have been exposed to simulated atomic oxygen. The resistance of the exposed resistors increases linearly with exposure to atomic oxygen. No interruption of the diamond consumption due to "possible" inhibition layer formation has been observed. Such sensor devices are currently fabricated by standard diamond deposition and reactive ion patterning methods.

Proceedings Article
01 Jan 1998
TL;DR: In this article, a combination of the hybrid plasma equipment model and plasma chemistry Monte Carlo codes was used to simulate nitrogen atomic and cation fluxes and their angular and energy distributions at the water surface.
Abstract: Quantum chemical calculations were employed to get insight into the mechanisms involved in plasma-induced nitridation of gate oxide that will suppress boron penetration. The roles played by the nitrogen cations and atoms were explored. It was shown that B interaction with siloxane rings that contain incorporated nitrogen yielded a larger energy gain than rings without nitrogen. This explains the chemical nature of the nitrogen-induced barrier effect. Monte Carlo simulations were used to simulate the necessary energy of incident N2 cations to produce the bond cleavage down to a particular depth in the amorphous SiO2 layer. A combination of the hybrid plasma equipment model and plasma chemistry Monte Carlo codes was used to simulate nitrogen atomic and cation fluxes and their angular and energy distributions at the water surface. Combining simulated cation energies with PROMIS Monte Carlo simulation results makes it possible to derive plasma process parameters that will permit a desired level of nitridation...

Proceedings ArticleDOI
06 Jan 1998
TL;DR: In this article, the authors developed the theory of the FMR lineshapes for the magnetic field aligned in the plane of the trilayer film, and the description of the angular dependence for the out-of-plane measurements.
Abstract: 285 materials, similar to Ref. 1. FMR measurements were performed in outof-plane geometry and showed two resonance lines (sometimes overlapped) for every angle of DC magnetic field between the film plane and film normal. We developed the theory of the FMR lineshapes for the magnetic field aligned in the plane of the trilayer film, and the description of the FMR angular dependence for the out-of-plane measurements. By the fitting of the model to the experiment we separated FMR lines and obtained magnetic parameters of the FeNi and CoNi layers. Although the exchange interaction via the 60 A thick Ag spacer was not expected, we observed the deviation of the angular dependences of FMR lines on the expected ones in the range of angles 5" -20" from normal, where the essential canting between magnetizations of the layers occurs, according to our computations, due to (mainly) different demagnetization fields of the film materials. This deviation was accompanied by the phase change of the FMR signal. We attribute the observed anomalous behavior of the FMR signal to the interlayer magnetostatic interaction between FeNi and CoNi layers2. *Research in Hacettepe University, Ankara is supported by l%BITAK within NATO-CPC AFP. 'Y. U. Idzerda, C. T. Chen, and S. F. Cheng et al., Journ. Appl. Phys. 76, 6525 (1994). 'T. L. Hylton, K. R. Coffey, M. A. Parker, and.J. K. Howard, Science 261, 1029 (1993). FR-12. HIGHLY LOCALIZED SURFACE MODES IN EPITAXIAL W N i FILMS. G. Suran, J. Rothman, and C. Meyer (Laboratoire Louis Nee1 CNRS, BP 166, 38042 France) The first data of non-propagating surface resonance modes studied by FMR in epitaxial W(110)Mi(lll)Mr(llO) films are reported. The films were prepared by pulsed laser deposition.'. The properties of the spectra are conditioned by the flatness of the W buffer layer. When the surface of W is flat only the uniform resonance (UR) is detected, with classical properties. When the roughness of the W layer is cr-20A due to different preparation conditions, an additional series of modes is also detected, with small intensities I (10-~<1<10-~) with respect to the UR. The properties of the spectra are best defined when H is applied along the film normal. Now, apart from the UR, 4 modes with stronger I, and 4 with weaker It are observed. The resonance fields and linewidths AH of these modes are totally independent of the thickness e of the Ni films which was varied between 20 A c e < 120 A, and are exceptionally reproducible (better than 0.1%) for ail e. The AH of the modes is in the range of 10 Oe to 20 Oe, a value never observed on Ni. The modes with I, and Ik are localized at the WMi and NilW interfaces respectively, since the modes with It disappear when the W cover layer is not deposited, while those with I, remain unchanged. The results are discussed in terms of surface spin-wave modes' related to the variations of the exchange stiffness constant near the interfaces due to lattice mismatch. The surface roughness is probably responsible for the pinning conditions. The small AH is explained by a

Proceedings ArticleDOI
19 Jul 1998
TL;DR: In this article, Li-based alloy coatings can provide enhanced electron emission from field emission arrays and can be deposited at room temperature by physical vapor deposition techniques and result in stable electron emission even under poor vacuum conditions.
Abstract: We have demonstrated that Li-based alloy coatings can provide enhanced electron emission from field emission arrays. These coatings can be deposited at room temperature by physical vapor deposition techniques and result in stable electron emission even under poor vacuum conditions.


Proceedings ArticleDOI
E. Minami1, W. Qin, M. Akizuki, H. Kastumata, Jiro Matsuo, Isao Yamada 
22 Jun 1998
TL;DR: In this paper, a multi-beam gas cluster ion beam assisted deposition technique has been developed to obtain high quality ITO films with resistivity lower than 3.0/spl times/10/sup -4/ /spl Omega//spl middot/cm and transparency higher than 80% at room temperature.
Abstract: The O/sub 2/ gas cluster ion beam assisted deposition technique has been developed to form high quality ITO films at ambient temperature. We have obtained high quality ITO films with a resistivity lower than 3.0/spl times/10/sup -4/ /spl Omega//spl middot/cm and transparency higher than 80% at room temperature. However, for application in industry, it is necessary to increase the cluster ion beam current to deposit films on a large area and to realize high throughput. A Multi-beam Gas Cluster Ion Beam equipment has been newly developed to increase the cluster ion beam current and to obtain higher quality ITO films at low temperatures. We report on new concepts of the Multi-beam gas cluster ion beam apparatus and experimental results of the formation of ITO films prepared by gas cluster ion beam assisted deposition technique.

Proceedings ArticleDOI
13 Jul 1998
TL;DR: In this article, the authors report on the 8 doping of Si on MOVPE grown GaAs vicinal surface, and explore the possibility of selective incorporation of Si along atomic steps.
Abstract: Atomically control of the incorporation sites of impurity atoms on the semiconductor surfaces is important for the fabrication of ultimate nano-scale devices. One of the approaches for such purpose is to utilize multi-atomic steps, which are naturally formed on vicinal surfaces with fairly regular spacing during metalorganic vapor phase epitaxial growth (MOVPE) [ l ] . Here we report on the 8 doping of Si on MOVPE grown GaAs vicinal surface, and explore the possibility of selective incorporation of Si along atomic steps. The growth was carried out in a low-pressure MOVPE system with triethylgallium (TEGa), triethylaluminium (TEAI), and arsine (ASH,) as source materials and monosilane (SiH,) as a dopant. toward the[-1101 direction (6 step). The layer sequence and the sample structure are schematically shown in Fig.1. Following GaAs and (AIAs),(GaAs), buffer layers, thick GaAs layer was grown at 600°C in order to form multi-atomic steps on the surface. Next, samples were annealed at 600°C for 30min to form uniform multiatomic steps with equal distance. Si 6 doping layer was formed at 600°C by supplying SiH, under arsine atmosphere during growth interruption. The doping times were changed from 10sec to 1000sec. SiH, partial pressure was kept at 1.25 X lO-'atm. Finally, 500nm undoped GaAs layer was grown as a cap layer at 550°C. The main results are listed below. Substrates were vicinal (001) GaAs with misorientation angles, a of 0" to 5.0"

Patent
06 May 1998
TL;DR: In this paper, a method of forming a metal layer of a semiconductor device is described, which is characterized by the following steps: Forming a sacrificial atomic metal layer, removing the atomic sacrificial metal layer and simultaneously forming a plurality of atomic metal layers on the semiconductor substrate by at least one.
Abstract: Method of forming a metal layer of a semiconductor device, characterized by the following steps: Forming a sacrificial atomic metal layer on a semiconductor substrate, Removing the atomic sacrificial metal layer and simultaneously forming an atomic metal layer on the semiconductor substrate by reacting the atomic sacrificial metal layer with a metal halide gas and - Stacking a plurality of atomic metal layers on the semiconductor substrate by at least one, alternately forming the atomic sacrificial metal layer and the atomic metal layer.