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Atomic layer deposition

About: Atomic layer deposition is a research topic. Over the lifetime, 19821 publications have been published within this topic receiving 477332 citations. The topic is also known as: ALD.


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Patent
In-Sun Yi1, Hwang Ki Hyun1, Jin-Tae Noh1, Ahn Jae Young1, Si-Young Choi1 
24 Mar 2010
TL;DR: In this paper, the methods of fabricating a silicon oxide layer using an inorganic silicon precursor and methods of fabrication of a semiconductor device using the same are provided, including forming a tunnel insulating layer and a charge storage layer on a substrate; forming a dielectric layer structure on the charge storage layers using an atomic layer deposition (ALD) method, the dielectrics layer structure including a first layer formed of silicon oxide, a second layer formed by a material different from the material forming the first layer; and forming a control gate on the layer structure.
Abstract: Methods of fabricating a silicon oxide layer using an inorganic silicon precursor and methods of fabricating a semiconductor device using the same are provided. The methods of fabricating a semiconductor device include forming a tunnel insulating layer and a charge storage layer on a substrate; forming a dielectric layer structure on the charge storage layer using an atomic layer deposition (ALD) method, the dielectric layer structure including a first dielectric layer formed of silicon oxide, a second dielectric layer on the first dielectric layer formed of a material different from the material forming the first dielectric layer, and a third dielectric layer formed of the silicon oxide on the second dielectric layer; and forming a control gate on the dielectric layer structure. The first and third dielectric layers formed of the silicon oxide are formed using a first gas including an inorganic silicon precursor, a second gas including hydrogen gas or a hydrogen component, and a third gas including an oxide gas.

128 citations

Journal ArticleDOI
06 Mar 2012-ACS Nano
TL;DR: The results indicate that ozone functionalization is a promising pathway to achieve scaled gate dielectrics on graphene without leaving a residual nucleation layer.
Abstract: Integration of graphene field-effect transistors (GFETs) requires the ability to grow or deposit high-quality, ultrathin dielectric insulators on graphene to modulate the channel potential. Here, we study a novel and facile approach based on atomic layer deposition through ozone functionalization to deposit high-κ dielectrics (such as Al2O3) without breaking vacuum. The underlying mechanisms of functionalization have been studied theoretically using ab initio calculations and experimentally using in situ monitoring of transport properties. It is found that ozone molecules are physisorbed on the surface of graphene, which act as nucleation sites for dielectric deposition. The physisorbed ozone molecules eventually react with the metal precursor, trimethylaluminum to form Al2O3. Additionally, we successfully demonstrate the performance of dual-gated GFETs with Al2O3 of sub-5 nm physical thickness as a gate dielectric. Back-gated GFETs with mobilities of ∼19 000 cm2/(V·s) are also achieved after Al2O3 deposi...

128 citations

Journal ArticleDOI
TL;DR: In this paper, Nanolaminate (NL) structures composed of alternating Al2O3 and ZrO2 sublayers grown by atomic layer deposition at 80°C are used to realize long-term stable OLED devices.
Abstract: We report on highly efficient gas diffusion barriers for organic light emitting diodes (OLEDs). Nanolaminate (NL) structures composed of alternating Al2O3 and ZrO2 sublayers grown by atomic layer deposition at 80 °C are used to realize long-term stable OLED devices. While the brightness of phosphorescent p-i-n OLEDs sealed by a single Al2O3 layer drops to 85% of the initial luminance of 1000 cd/m2 after 1000 h of continuous operation, OLEDs encapsulated with the NL retain more than 95% of their brightness. An extrapolated device lifetime substantially in excess of 10 000 h can be achieved, clearly proving the suitability of the NLs as highly dense and reliable thin film encapsulation of sensitive organic electronic devices.

128 citations

Journal ArticleDOI
23 Apr 2010-ACS Nano
TL;DR: Graphene quality degrades most severely following deposition of Ta( 2)O(5), while the deposition if TiO(2) appears to improve the graphene carrier mobility.
Abstract: We present the integration of epitaxial graphene with thin film dielectric materials for the purpose of graphene transistor development. The impact on epitaxial graphene structural and electronic properties following deposition of Al2O3, HfO2, TiO2, and Ta2O5 varies based on the choice of dielectric and deposition parameters. Each dielectric film requires the use of a nucleation layer to ensure uniform, continuous coverage on the graphene surface. Graphene quality degrades most severely following deposition of Ta2O5, while the deposition if TiO2 appears to improve the graphene carrier mobility. Finally, we discuss the potential of dielectric stack engineering for improved transistor performance.

128 citations

Journal ArticleDOI
Yuanzheng Yue1, Yue Hao1, Jincheng Zhang1, Jinyu Ni1, Wei Mao1, Qian Feng1, Linjie Liu1 
TL;DR: In this article, a stack gate HfO2/Al2O3 structure grown by atomic layer deposition was used for high-electron mobility transistors with 1- mum gate lengths.
Abstract: We have developed a novel AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistor using a stack gate HfO2/Al2O3 structure grown by atomic layer deposition. The stack gate consists of a thin HfO2 (30-A) gate dielectric and a thin Al2O3 (20- A) interfacial passivation layer (IPL). For the 50-A stack gate, no measurable C-V hysteresis and a smaller threshold voltage shift were observed, indicating that a high-quality interface can be achieved using a Al2O3 IPL on an AlGaN substrate. Good surface passivation effects of the Al2O3 IPL have also been confirmed by pulsed gate measurements. Devices with 1- mum gate lengths exhibit a cutoff frequency (fT) of 12 GHz and a maximum frequency of oscillation (f MAX) of 34 GHz, as well as a maximum drain current of 800 mA/mm and a peak transconductance of 150 mS/mm, whereas the gate leakage current is at least six orders of magnitude lower than that of the reference high-electron mobility transistors at a positive gate bias.

128 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023542
20221,013
20211,032
20201,269
20191,298
20181,322