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Bandwidth (signal processing)

About: Bandwidth (signal processing) is a research topic. Over the lifetime, 48550 publications have been published within this topic receiving 600741 citations. The topic is also known as: Bandwidth (signal processing) & bandwidth.


Papers
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Journal ArticleDOI
TL;DR: In this article, a printed reconfigurable ultra-wideband (UWB) monopole antenna with triple narrow band-notched characteristics is proposed for cognitive radio applications, which can work at eight modes by controlling switches ON and OFF.
Abstract: A printed reconfigurable ultra-wideband (UWB) monopole antenna with triple narrow band-notched characteristics is proposed for cognitive radio applications in this paper. The triple narrow band-notched frequencies are obtained using a defected microstrip structure (DMS) band stop filter (BSF) embedded in the microstrip feed line and an inverted π-shaped slot etched in the rectangular radiation patch, respectively. Reconfigurable characteristics of the proposed cognitive radio antenna (CRA) are achieved by means of four ideal switches integrated on the DMS-BSF and the inverted π-shaped slot. The proposed UWB CRA can work at eight modes by controlling switches ON and OFF. Moreover, impedance bandwidth, design procedures, and radiation patterns are presented for analysis and explanation of this antenna. The designed antenna operates over the frequency band between 3.1 GHz and 14 GHz (bandwidth of 127.5%), with three notched bands from 4.2 GHz to 6.2 GHz (38.5%), 6.6 GHz to 7.0 GHz (6%), and 12.2 GHz to 14 GHz (13.7%). The antenna is successfully simulated, fabricated, and measured. The results show that it has wide impedance bandwidth, multimodes characteristics, stable gain, and omnidirectional radiation patterns.

119 citations

Patent
21 Apr 1997
TL;DR: In this paper, a time-interleaved bit addressed weighted pulse width modulation (PWM) method and apparatus was proposed to reduce the bandwidth requirement for providing a plurality of data entries regarding multiple points of information.
Abstract: A time-interleaved bit addressed weighted pulse width modulation (PWM) method and apparatus reduces the bandwidth requirement necessary for providing a plurality of data entries regarding multiple points of information. As is well known, a weighted PWM scheme modulates an output by utilizing a frame time that is divided into events of varying durations; most conventional schemes have each bit in the frame being half the duration of its predecessor. The modulated signal is activated during all, some or none of the events in the frame to develop a signal representing a particular parameter. This method and apparatus can be used in a display for selecting among varying levels of gray scale or from among multiple colors on a palette. In one application for a display, a register containing the same number of data pits as pixels in a row of the display is provided. The register is loaded with one bit per frame for each pixel in the entire row. The bandwidth is reduced because the bits for each of the pixels are not all for the same weight event. This allows a bit for a long duration event to be displayed in one pixel, while more than one bit for shorter duration events to be displayed in another pixel. This obviates the need to load one bit for each pixel in the row during the shortest event duration. The organization of the sequence of the events amongst the various rows can be pseudo-random to achieve reduced bandwidth. If the organization is pseudo-random, the order can be pre-selected for an optimized bandwidth or organized into a predetermined format to achieve a pseudo-random effect.

118 citations

Journal ArticleDOI
05 Feb 1998
TL;DR: In this article, an integrated voltage-controlled oscillator (VCO) at a frequency of 2 GHz is implemented in a f/sub T/= 25 GHz standard bipolar process, where the phase noise of the VCO is -136 dBc/Hz at 4.684 MHz, when the integration bandwidth and the transmit output power of 25 dBm are taken into account.
Abstract: An integrated voltage-controlled oscillator (VCO) at a frequency of 2 GHz is implemented in a f/sub T/= 25 GHz standard bipolar process. The phase noise of the VCO is -136 dBc/Hz at 4.7 MHz frequency offset. The LC-resonator uses vertically coupled on-chip inductors and integrated tuning diodes. Due to the poor performance of integrated resonators on silicon ICs, oscillators with phase noise meeting requirements of wireless applications are difficult to integrate. With fully integrated designs only the standards for cordless phones, for instance DECT, can be achieved. The critical point in the DECT-specification is the emission of the transmitter due to intermodulation in the third adjacent channel, that must be <-47 dBm. This value is measured with an integration bandwidth of 1 MHz centered at the nominal center frequency. With a channel-spacing of 1.728 MHz the third adjacent channel is located 5.184 MHz from the actual transmit channel frequency. The beginning of the integration bandwidth is at an offset frequency of 4.684 MHz related to the nominal frequency of the transmit channel. This is the offset frequency, at which the specification must be met. The resulting noise requirement is -132 dBc/Hz at a offset frequency of 4.684 MHz, when the integration bandwidth and the transmit output power of 25 dBm are taken into account.

118 citations

Patent
09 Apr 2009
TL;DR: In this paper, a class of bandwidth reduction techniques are used to develop a broad class of modulation types collectively called SSB-FM, which can be used to construct communication systems that provide bandwidth-normalized performance gains of 10 dB or more when compared to popular prior art modulation methods.
Abstract: A class of bandwidth reduction techniques are used develop a broad class of modulation types collectively called SSB-FM. These signals can be used to construct communication systems that provide bandwidth-normalized performance gains of 10 dB or more when compared to popular prior art modulation methods. An aspect of the invention involves mapping trellis paths in a complex signal space onto corresponding real-valued trellis signals with desirable spectral properties. The invention can be used map continuous phase modulated (CPM) signals onto simpler amplitude-modulated trellis signals having double the channel capacity of prior art CPM signals. Multi-amplitude signaling and frequency division multiplexing may also be incorporated to further accommodate more information per symbol.

118 citations

Journal ArticleDOI
TL;DR: A comparison with state-of-the-art high-speed analog-to-digital conversions reveals that the proposed approach improves the figure of merit by a factor of three if the signal exhibits a 4% sparsity.
Abstract: This paper presents a sub-Nyquist rate sampling receiver architecture that exploits signal sparsity by employing compressive sensing (CS) techniques. The receiver serves as an analog-to-information conversion system that works at sampling rates much lower than the Nyquist rate. A parallel-path structure that employs current mode sampling techniques is used. The receiver performance is quantified analytically. Useful and fundamental design guidelines that are unique to CS are provided based on the analytical tools. Simulations with a 90-nm CMOS process verify the theoretical derivations and the circuit implementations. Based on these results, it is shown that an instantaneous receiver signal bandwidth of 1.5 GHz and a signal-to-noise-plus-distortion ratio of 44 dB are achievable. The receiver power consumption is estimated to be 120.8 mW. A comparison with state-of-the-art high-speed analog-to-digital conversions reveals that the proposed approach improves the figure of merit by a factor of three if the signal exhibits a 4% sparsity.

118 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202217
20211,517
20202,656
20193,121
20183,100
20172,744