Showing papers on "Banyan switch published in 1989"
27 Nov 1989
TL;DR: The author proposes a modular architecture for very large packet switches, where each switch consists of a Batcher sorting network, a stack of binary trees, and a bundle of banyan networks, and it can be physically realized as an array of three-dimensional parallel processors.
Abstract: The author proposes a modular architecture for very large packet switches, where each switch consists of a Batcher sorting network, a stack of binary trees, and a bundle of banyan networks. The modular architecture is a unification of the Batcher-banyan switch and the knockout switch, and it can be physically realized as an array of three-dimensional parallel processors. Switch modules are interconnected only at the outputs of multiplexers. The modularity implies less-stringent synchronization requirements and makes higher-speed implementation possible. Nonblocking and self-routing properties of Batcher-banyan switches are used to simplify the switch operation and to avoid the internal flow control problem. Also described is an extended ring reservation algorithm for contention resolution and output space extension. The proposed modular switch is intended to meet the needs of broadband telephone offices of all sizes. The author estimates that a modular switch with terabit capacity can be built with current VLSI technologies. >
40 citations
TL;DR: In this article, a switch matrix using monolithic GaAs IC technology has been presented for future high-capacity multibeam communications satellite services, in which a large number of switch elements are incorporated and the miniaturization of each element is required.
9 citations
TL;DR: In this article, high speed switching of an InP optical switch array with rise and fall times of 2.8 and 2.5 ns, respectively, was achieved. And the optical switch module can be utilised in a new ATM switch system.
Abstract: High-speed switching of an InP optical switch array is achieved. Optical switch rise and fall times of 2.8 and 2.5 ns, respectively, are obtained. It is shown that the optical switch module can be utilised in our new ATM switch system.
7 citations
Journal Article•
1 citations
15 May 1989
TL;DR: The design of a high-performance BiMOS switch in 3-μm double-level-metal technology is presented and is intended for use in switched-capacitor filter applications.
Abstract: The design of a high-performance BiMOS switch in 3-mm double-level-metal technology is presented. The switch makes use of the p-well as an isolation layer for the n-p-n transistor. SPICE simulations of the proposed switch have indicated that the rise and fall ON resistance is about 500 O. This switch is intended for use in switched-capacitor filter applications. The switch has been submitted for fabrication