Showing papers on "Banyan switch published in 1990"

A modular architecture for very large packet switches

Abstract: Switch modules, the building blocks of this system, are independently operated packet switches. Each module consists of a Batcher sorting network, a stack of binary trees, and a bundle of banyan networks. The modular architecture is a unification of the Batcher-banyan switch and the knockout switch, and can be physically realized as an array of three-dimensional parallel processors. Switch modules are interconnected only at the outputs by multiplexers. The partitioned switch fabric provides a flexible distributed architecture, which is the key to simplify the operation and maintenance of the whole switching system. The modularity implies less stringent synchronization requirements and makes higher-speed implementation possible. The proposed modular switch is intended to meet the needs of broadband telephone offices of all sizes. It is estimated that a modular switch with terabit capacity can be built using current VLSI technologies. >

Integrated optics 4*4 switch matrix with digital optical switches

Abstract: We report on the first 4 × 4 switch matrix with digital optical switches as switch elements. The matrix is arranged in a tree structure, and comprises 24 switch elements and is pigtailed and packaged.

The implementation of a high speed ATM packet switch using cmos vlsi

Abstract: This paper describes the implementation of an ATM switch capable of operation at the SONET STS-3 rate. These speeds are achieved using low-cost custom CMOS VLSI. The switch is based on the self-routing Batcher/banyan fabric with contention resolution. To minimize the size of the switch, the fabric is built using a three dimensional structure based on a rearrangement of the shuffle/exchange wiring pattern used in the Batcher/banyan. The components operate at high speed due to the density of the fabric, and the extensive use of pipelining and dynamic logic. The most complex of the fabric components have already been designed and tested at speeds much higher than the intended STS-3 rate.

A CMOS Batcher and banyan chip set for B-ISDN

Abstract: Batcher and banyan chips that are suitable for broadband packet switch applications, simultaneously accommodate 32-bit serial packet channels, and are building blocks for larger networks are discussed. 1.2- mu m CMOS Batcher and banyan chips were tested at bit rates of 170 Mb/s. The chips require a single 5-V supply, dissipate approximately 1.5 W, provide 5.44-Gb/s switching capacity, and are packaged in 84-pin leadless ceramic chip carriers (LCC) for conventional testing. An N-input by an N-output (N*N) Batcher or banyan network is a rectangular array of identical 2*2 processing elements (cells). A processing element can take on one of two states. Each network accomplishes distributed processing over serial bit streams. The bit streams are network binary output addresses presented most significant bit first. The algorithm executed by a given network depends on the state determination logic of the 2*2 elements, as well as on the wiring permutations between successive columns in the array. Batcher networks sort packets according to output address, whereas banyan networks deliver packets to their desired output address. >

A DISTRIBUTED MODULAR "ERA-BlT/SEC ATM SWITCH

Abstract: A simple distributed, modular architecture for a very large scale ATM switch is proposed in this paper. By extending the concept of the original knockout switch, the cell filtering and' contention resolution functions are distributed over many small switch elements, which are arranged in a cross-bar structure. The output ports of a switch fabric are partitioned into a number of groups by a novel grouping network to permit sharing of the routing paths in the same group. This results in close to one order of magnitude fewer switch elements. The proposed ATM switch has a regular and uniform structure and thus has the the advantages of (1) easy expansion due to the modular structure, (2) high integration density for the VLSI implementation, (3) relaxed synchronization for data and clock signals and (4) building the center switch fabric with a single type of chip. Furthermore, peripheral line concentrators, or statistical multiplexers, can be implemented with the grouping networks and be tightly coupled with the switch fabric. This permits the elimination of buffers at the cost of an increase in the number of switch elements in the switch fabric. The technique of channel grouping for trunk circuits can also be incorporated in the proposed ATM switch to improve the performance while cell sequence integrity is preserved. An experimental prototype circuit design for the key switch element has been completed and it is shown that more than 4,000 of them can be integrated in a VLSI chip with existing CMOS 51 pm

Switch arrays for photonic switching: status review and prospects

Abstract: The status and prospects of LiNbO/sub 3/ switch arrays are reviewed in view of system requirements. An experimental switching system is described. In this system, the subscriber access has a gross bit rate of 620 Mb/s divided into four 155 Mb/s interface blocks (IBs). In the access switch, the individual IBs can be switched (in optical form) to the digital cross connect (DCC) for private leased lines, to the distributive services switch, to the synchronous transfer mode (STM) services switch, or to the asynchronous transfer mode (ATM) services switch. Each IB is bidirectional (not used in distributive services). The potential applications of semiconductor switch arrays are discussed. >

Design and performance analysis of a buffer subsystem for the Batcher-Banyan switch

Abstract: A buffer subsystem for use with a Batcher-Banyan switch is proposed. Connected to each side of the input buffers is a distribution network which is built from a Batcher sorter running the connection algorithm. This algorithm enables the buffers to be shared by all input packets, and it also eliminates the adverse effect of unbalanced traffic on performance. A performance analysis is presented to support these conclusions. The overhead incurred in running the connection algorithm is also discussed. >

Atm cross‐connect switch using folded banyan switching network with bypass links

Abstract: A high-speed multiplex transmission system has recently been proposed based on ATM, where the information is divided into fixed-length blocks called cells, and transmitted on asynchronous multiplexing basis. As the switch to be used in the transit node in such a transmission system, various kinds of switching networks have been proposed, composed of two-input × two-output switch elements with internal buffers. Among those, the multistage buffered Banyan structure, which is a cascade connection of two Banyan networks as the distribution and routing networks, is of a distributed structure, being suited to LSI implementation. The network is a promising candidate since it realizes the self-routing and is stable against a variety of traffic. However, this switching network has a problem in that the delay is increased with the scale of the network, and the in-service expansion of the switching network is not easy. This paper proposes a new network topology of the Banyan network with bypass links, together with the self-routing method, and describes its performance. The network is composed of the distribution and routing networks with bypass links between individual unit switches. By transferring cells from the distribution network to the routing network through the bypass links at appropriate stages, the delay is reduced. The in-service expansion of the system is made easy.

InP-based carrier-injection optical switch for photonic switching

Abstract: An InP-based optical switch operating through carrier-induced refractive index change that is suitable for large-scale integration, polarization independence, and wavelength insensitivity is described. A compact optical switch module comprising a packaged version of the 4*4 optical switch array with novel fiber arrays (APT fiber arrays) is introduced. Preliminary experimental results of the optical switch unit obtained by integration with a traveling-wave amplifier are presented. An asynchronous transfer mode (ATM) switch architecture is also introduced as an example of applications of the optical switch module to switch systems in which the wide bandwidth of the optical switch module was successfully utilized. >