Showing papers on "Banyan switch published in 1994"

Experimental investigation of a digital free-space photonic switch that uses exciton absorption reflection switch arrays

Abstract: We present a digital free-space photonic switch structure that uses exciton absorption reflection switch (EARS) arrays. The network topology of the switch is a banyan network. This switch structure uses microbeam interconnections to realize a compact switch fabric. The low-loss interconnection that is necessary for high-speed operation can be achieved by the use of an optical system based on birefringent plates. A prototype switch (based on an 8 × 8 EARS array) with fiber array pigtails is fabricated and used to demonstrate two-input, two-output switching of 8-Mbits/s signals. This digital switch may be applicable to large-scale, multistage switching networks for optical interconnections and broadband telecommunication switching systems.

Throughput analysis and optimal design of Banyan switches with bypass queues

Abstract: A Banyan switch with bypass queue can overcome the problem of head of line blocking. This paper presents the throughput analysis for such a switch and the optimal window size for the bypass queue is also obtained. Moreover, to reduce the effect of the internal blocking and to increase the throughput, a parallel Banyan switch with bypass queue is also discussed and analyzed. >

Performance modelling of a multi-buffered banyan switch under bursty traffic

Abstract: Presents an approximation algorithm for the analysis of a buffered banyan ATM switch which allows complex (input and output buffering) switching elements, bursty traffic, non-uniform destination distribution and permits the analysis of large scale switches. >

The barrel switch: An ATM switch architecture for high‐speed switching

Abstract: This paper proposes a new asynchronous transfer mode (ATM) switch architecture called a “barrel switch.” The barrel switch is constructed from n/2 × n identical element switches which are placed out around a cylinder and connected to each other. The features of this proposed switch are as follows. 1. This switch has an architecture suitable for high-speed (2.4 Gbps and more) cell switching. 2. It is a multistage self-routing and nonblocking switch. 3. Copy connections can be realized with this switch. 4. The building-block method is applicable to switch implementation, which ensures a full scalability. Cell loss rate and delay characteristics of this switch also are discussed using computer simulation results. Simulation results under random traffic prove that a 64 × 64 barrel switch has adequate cell loss rate and mean delay characteristics to an actual ATM switching system.

A high‐speed‐retry banyan switch architecture for giga‐bit‐rate BISDN networks

Abstract: This paper proposes a high-speed ATM switch architecture for handling cell rates of several Gb/s in a broadband communication switching system or cross-connect system. The proposed switch architecture, named the high-speed-retry banyan switch, employs a bufferless banyan network between input and output buffers; a cell is repeatedly transmitted from an input buffer until it can be successfully transmitted to the desired output buffer. A simple cell-retransmission algorithm, is employed as is a ring-arbitration algorithm for cell conflict. They are suitable for FIFO type buffers and bufferless highspeed devices. Good traffic characteristics which are independent of switch size are achieved for an internal speed ratio of only four times the input line speed. A prototype system with the internal speed of 1·2 Gb/s is constructed in order to confirm the basic operation of the high-speed-retry banyan switch. The prototype system, even in its present state, could be used to realize a giga-bit-rate BISDN switching system.