Showing papers on "Banyan switch published in 1999"

Reconfigurable wavelength add-drop filtering based on a Banyan network topology and ferroelectric liquid crystal fiber-optic switches

Abstract: This paper presents a modular optical implementation of a Banyan network by using the physical flexibility of the optical fiber to form the interconnections between compact switching stages based on bulk polarization optics. Specifically, these switching stages use total internal reflection (TIR) prisms with ferroelectric liquid crystal (FLC) polarization rotators to form compact modules. Using this Banyan network implementation, a reconfigurable multiwavelength add-drop filter for wavelength division multiplexed (WDM) applications is proposed. Experimental results for our fiber connected 2 in-2 out FLC-based bulk-optic switching stage gives a /spl sim/6.7 dB optical insertion loss and a /spl sim/-40 dB optical interchannel crosstalk level. A low 2 dB optical insertion loss design number is expected with optimized components, realizing high (e.g., 35 /spl mu/s) switching speed and low crosstalk switching networks.

Polarization-based fiber-optic switch

Abstract: A fiber-optic switch based on a unique retro-reflection scheme is used to create a 2×2 switch having two fiber-optic circulators and two polarization rotation devices. Passive and active noise filtering techniques maintain the high performance of the switch even when the polarization rotation devices have poor performance. The switch also has the advantage of zero relative time delay between two channels for any of two switch settings making it appropriate for cascading switching stages. The preferred embodiment of the 2×2 optical switch also has a simple design in terms of alignment since only two optical fibers need to be aligned with each other. The switch is also scalable to form N 2×2 optical switch modules for use in add/drop, N-wavelength, multiple fiber-optic networks where its novel retro-reflective characteristic allows the use of half of the required wavelength multiplexers/demultiplexers in the system compared to a transmissive switch add/drop filter. An alternative embodiment uses a single polarization beam splitter to form a circulator-free transmissive mode 2×2 optical switch with comparable crosstalk but higher alignment complexity.

Optical space switches using multiport couplers

Abstract: The present invention provides N×N non-blocking switch modules using MMI-based switch elements. The arrangement requires a minimum of control elements to effect switching and uses no crossings of the signal waveguides. The switch control settings may be determined by following a simple and transparent algorithm for the setup procedure. Very high-order switch fabrics comprising a variety of the taught nonblocking N×N switch modules are envisaged. Determination of the appropriate values for ‘N’ is a practical consideration which trades-off the performance of the individual switch modules with the complexity required of the associated module interconnection fabric. The spatial switch fabrics that may by built from the non-blocking MMI-based switch arrangements may be combined with both wavelength-division switches and time-division switches to form any combination of higher order space-wavelength-time switch.

Designing efficient Benes and Banyan based input-buffered ATM switches

Abstract: Multistage network based input-buffered ATM switches, which have been studied extensively, are cheaper compared to crossbar designs but suffer from elaborate cell selection methods or expensive network setup. In this paper, a fast cell selection method is proposed to avoid slow cell selection and costly network setup for these designs. In particular, we propose network hardware specific selection techniques for cell selection in input buffered Banyan network with an internal speed twice that of the external links. Our simulation results show that cell selection by looking at up to 10 cells in each input queue for switch sizes up to N=64 yields 95% or higher switch utilization.

Optical Switch Array Using Banyan Network

Abstract: SUMMARY A large scale optical switch array based onguided-wave technology using banyan network architecture isdemonstrated. Banyan network architecture is the simplest NN network connecting a input port to all the output ports. Abanyan network optical switch array serves as a base for con-structing many classes of switch networks, as we propose in thisreport. We fabricated a 32 32 switch and measured its char-acteristics. Drive voltage was about 12V and extinction ratiowas 18dB, and the average insertion loss was 18dB. Preliminaryexperiments were conducted on a 64 64 device. The use of pro-ton exchanged waveguides makes a 10mm radius of curvaturefeasible. key words: opticalswitch,switchmatrix,waveguide,LiNbO3 1. IntroductionThe optical switch array [1]{[3] is a basic componentof any system, such as cross-connects or local area net-works, routing optical signals in an optical form. Thesesystems, require large-scale optical switch arrays thathandle numerous input and output ports. The largestscale optical switch array has been 16 16 switch [1],[4]. For devices based on silica waveguides the crossbararchitecture (Fig.1(b)) is most suitable. The crossbararchitecture provides low power consumption. Largenumber of switch element stage (long waveguide) isnot problematic for a low loss silica waveguides. Onthe other hand, the propagation loss tends to be highin a waveguide using electro-optic materials such asLiNbO

Evaluation of pipelined dilated banyan switch architectures for ATM networks

Abstract: In the pipeline banyan (PB), the reservation cycle in the control plane is made several times faster than payload transmission in data plane. This enables pipelining multiple banyans. It is observed that the ratio of throughput to switching delay (service rate) is relatively low in the PB due to the banyan. For this, we present a scalable pipelined asynchronous transfer mode (ATM) switch architecture employing a family of dilated banyan (DB) networks together with their complexity analysis and performance. A DB can be engineered between two extremes: (1) a low-cost banyan with internal and external conflicts, or (2) a high-cost conflict-free fully connected network with multiple outlets. Between the two extremes lies a family of DBs having different switching delays and throughputs. Increasing the dilation degree reduces path conflicts, which produces noticeable increase in service rate due to increase in throughput and decrease in path delay. Compared to PB, the pipelined dilated banyan (PDB) requires smaller number of data planes for the same throughput, or provides higher throughput for a given number of data planes. Simulation of PDB is carded out under uniform traffic and simulated ATM traffic. We study the switch performance while varying the load, buffer size, and number of data planes. To analyze the robustness of the switch, we show that performance is not degradable under ATM traffic with temporal and spatial burstiness generated using the on-off model. The PDB is scalable with respect to service rate and can be engineered with respect to: (1) cell loss rate; (2) hardware resources; (3) size of buffers; (4) switching delays; and (5) delay incurred to higher priority traffic. The PDB can deliver up to 3.5 times the service rate of the PB with only linear increase in hardware cost.

Integrated high-speed 1 × 4 digital Y-branch switch array with passive taper fanouts for fibre interconnection

Abstract: An integrated high-speed 1 × 4 switch array on InP-substrate using 8 GHz Y-branch switch elements is described. This switch array is suitable for optical time division multiplexing (OTDM) and demultiplexing data at 10 Gbit/s over a wide optical bandwidth. The channel-channel isolation and insertion loss are 18 and 15 dB, respectively, which may be improved by optimisation of the switch design and fabrication techniques.

Bifurcated buffering in internal buffer banyan ATM switch

Abstract: In our paper we present a bifurcated buffer banyan ATM switch concept. Bifurcated input buffering was proposed previously for switches with input buffers. We expanded it to buffer a banyan ATM switch with internal input buffers. Here, we give a detailed description of the proposed switch performance analysis, based on the algorithm described in [3]. Our proposition advantages over the simple input buffer banyan are higher throughput and lower cell loss probability. We found that buffer size b=20, for input load p<0.78, is enough for obtaining the required ATM switch performance levels no matter the switch size. It means that cheap and simple input buffering is possible in bifurcated banyan ATM switching.

Evaluation of pipelined banyan switch architectures for ATM networks

Abstract: In the pipeline banyan (PB) the reservation cycle in the control plane is made several times faster than payload transmission in data plane. This enables pipelining of multiple banyans. It is observed that the service rate is relatively low in the PB due to the banyan. For this, we present a scalable pipelined ATM switch employing a family of dilated banyan (DB) networks. A DB can be engineered between two extremes: (1) a low-cost banyan with internal and external conflicts; or (2) a high-cost conflict-free fully-connected network with multiple outlets. Increasing the dilation degree reduces path conflicts, which produces noticeable increase in service rate due to increase in throughput and decrease in path delay. Simulation of PDB was carried out under uniform traffic and simulated ATM traffic. We study performance under variation in the load, buffer size, and number of data planes. We show that performance of the switch is not degradable under ATM traffic with temporal and spatial burstiness generated by using the ON-OFF traffic model. A 256-input PDB can deliver up to 3.3 times the service rate of the PB with linear increase in hardware cost.

MEMS-based optical switch design for reconfigurable, fault-tolerant optical backplanes

Abstract: One of the critical components in developing reconfigurable, fault-tolerant optical backplanes is a low-cost optical switch. Microelectromechanical systems (MEMS) are a strong candidate for fabricating a low-cost optical switch. In this paper, we discuss the design issues for such a switch. Furthermore, using the material discussed in this report, we have designed a complete MEMS-based optical switch. It was submitted for prototype manufacturing in May 1999.

Two-way switch circuit arrangement

Abstract: The two way switch circuit is formed using anti-paralleled electronic switches, such as thyristor.

Improvement of Packet Loss Probability by Complementer in Dilated Banyan Switch under Hot-Spot Traffic

Abstract: Packet contention is one of the fundamental problems that must be overcome in designing packet switches. In banyan network, which has multistage interconnection structure of many small switch elements, we must be concerned with output port conflicts and internal collisions. Dilated banyan network which provides multiple path for internal link can reduce packet loss due to internal collisions in loss system. However, under hot-spot traffic higher packet loss probability is measured at the hot-spot port and the ports close to the hot-spot as coefficient h increases due to the heavy traffic to hot-spot port. In order to moderate the packet loss probability at the hot-spot port we propose the method to disperse the packets which concentrate on the hot-spot route by altering address field of a half of incoming packets. These packets are switched along detour routes. Thus, the traffic concentration toward hot-spot is mitigated and the packet loss probability at the hot-spot port is moderated. key words: dilated banyan network, hot-spot traÆc, tree satu-