Banyan switch

About: Banyan switch is a research topic. Over the lifetime, 242 publications have been published within this topic receiving 3452 citations.

A parallel-tree switch architecture for ATM networks

Abstract: We present a novel ATM switch called parallel-tree Banyan switch fabric (PTBSF) that consists of parallel Banyans arranged in a tree topology. Packets enter at the topmost Banyan. Internal conflicts are eliminated by using a conflict free 3/spl times/4 switching element which distributes conflicting cells over different Banyans. Thus, cell loss may occur only at the lowest Banyan. Increasing the number of Banyans leads to noticeable decrease in the cell loss rate. The switch can be engineered to provide arbitrarily high throughput and low cell loss rate without the use of input buffering nor cell pre-processing. The performance of the switch is evaluated analytically under uniform traffic load and by simulation under a variety of ATM traffic loads. Compared to other proposed architectures, the switch exhibited stable and excellent performance with respect to cell loss and switching delay for all studied conditions as required by ATM traffic sources. The advantages of PTBF are modularity, regularity, self-routing, low processing over head, high throughput and robustness under a variety of ATM traffic conditions.

Quasi-Output-Buffered Switches

Abstract: It is well known that output-buffered switches have better performance than other switch architectures. However, output buffered switches also suffer from the notorious scalability problem, and direct constructions of large output-buffered switches are difficult. In this paper, we study the problem of constructing scalable switches that have comparable performance (in the sense of 100 percent throughput and first-in first-out (FIFO) delivery of packets from the same flow) to output-buffered switches. For this, we propose a new concept, called quasi-output-buffered switch. Like an output-buffered switch, a quasi-output-buffered switch is a deterministic switch that achieves 100 percent throughput and delivers packets from the same flow in the FIFO order. Using the three stage Clos network, we show that one can recursively construct a larger quasi-output-buffered switch with a set of smaller quasi output-buffered switches. By recursively expanding the three-stage Clos network, we obtain a quasi-output-buffered switch with only 2 × 2 switches. Such a switch is called a packet-pair switch in this paper as it always transmits packets in pairs. By computer simulations, we show that packet-pair switches have better delay performance than most load-balanced switches with comparable construction complexity.

Bifurcated buffering in internal buffer banyan ATM switch

Abstract: In our paper we present a bifurcated buffer banyan ATM switch concept. Bifurcated input buffering was proposed previously for switches with input buffers. We expanded it to buffer a banyan ATM switch with internal input buffers. Here, we give a detailed description of the proposed switch performance analysis, based on the algorithm described in [3]. Our proposition advantages over the simple input buffer banyan are higher throughput and lower cell loss probability. We found that buffer size b=20, for input load p<0.78, is enough for obtaining the required ATM switch performance levels no matter the switch size. It means that cheap and simple input buffering is possible in bifurcated banyan ATM switching.

Design and optimization of RF MEMS T-type switch for redundancy switch matrix applications

Abstract: This paper presents a novel approach to monolithically implement a planar multiport radio-frequency (RF) microelectromechanical systems (MEMS) T-type switch. T-type switches are used as building blocks for redundancy switch matrix applications in space telecommunication. The T-type switch performs signal routing in three operational states. Two of them are turning states while the other one is a crossover state. The proposed design uses a series metal contact clamped-clamped beam SPST switches, four port cross junctions and a RF crossover. The simulated results for the entire T-type switch demonstrates an insertion loss of −0.46dB, return loss of better than −15.50dB and isolation better than −17.73dB for all states for a wideband frequency range 0–30GHz. The switch gives excellent RF performance near X-band and Ku-band which is the most widely used frequency range for satellite communication.