Topic
Banyan switch
About: Banyan switch is a research topic. Over the lifetime, 242 publications have been published within this topic receiving 3452 citations.
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20 Sep 1995
TL;DR: The knockout principle proves to be very efficient for the nonuniform concentration in the proposed switch architecture by using a knockout switch as the basic unit and is cost-effective compared with the growable switch architecture which employs the uniform connection pattern.
Abstract: A growable ATM switch architecture is desired for constructing a large scale ATM switch. All the current ATM switch architectures are based on uniform connections of unit switch elements. When the switch size becomes large, the uniform switch architecture is no longer suitable for the nonuniform traffic conditions. In this paper, we propose a nonuniform modular growth ATM switch architecture by using a knockout switch as the basic unit. All the internal traffic of the proposed switch has the best delay and throughput performance. An analysis is also presented to study the relationship between the cell-loss performance and the switch parameters. The knockout principle proves to be very efficient for the nonuniform concentration in the proposed switch architecture. The proposed switch architecture is cost-effective compared with the growable switch architecture which employs the uniform connection pattern.
1 citations
TL;DR: The simulation results of Sort Banyan architecture of size 8 × 8 are presented and the cell loss and delay performance versus the cell arrival rate for the four schemes viz, Input buffer, Interstage buffer, Shared output buffer and Regeneration of cells using FEC method are presented.
Abstract: The advancement in the field of computer technology, communication and the increasing user demand in terms of bandwidth and speed, the future communication network is rolling towards the BISDN with optical technology. The high speed ATM network is one of the major tool used for BISDN. In turn, the efficiency of the ATM network relies on the switching fabric. Hence, the switching fabric of future telecommunication systems should have a very low cell loss and delay performance. In this paper, the simulation results of Sort Banyan architecture of size 8 × 8 are presented. The simulation of Sort Banyan network is performed along with four different methods in view of enhancing the throughput of the Sort Banyan switch network. The cell loss and delay performance versus the cell arrival rate for the four schemes viz, Input buffer, Interstage buffer, Shared output buffer and Regeneration of cells using FEC method are presented for both Poisson and Self-similar traffic models.
1 citations
02 Dec 1997
TL;DR: Numerical results show that the TDXP switch can effectively eliminate HOL blocking and achieve high throughput, and the evaluation shows that crossbar switch configuration becomes more cost effective as the throughput of individual switch LSIs, which depends on device technologies, increases.
Abstract: This paper proposes a high-speed input and output buffering ATM switch, named the tandem-crosspoint (TDXP) switch. The TDXP switch consists of multiple crossbar switch planes. These switch planes are connected in tandem at all crosspoints. The TDXP switch architecture offers several advantages. First, the TDXP switch does not increase the internal line speed in eliminating head-of-line (HOL) blocking. Second, since the TDXP switch employs a simple cell reading algorithm at the input buffer in order to retain the cell sequence, the TDXP switch does not require the cell sequences to be rebuilt at output buffers using time stamps, as is required by a parallel switch. These merits make it easy to implement a high-speed ATM switch. Numerical results show that the TDXP switch can effectively eliminate HOL blocking and achieve high throughput. In addition, we discuss how TDXP switches can be combined to form larger switches in a cost-effective way. We clarify the relative advantages of the crossbar switch configuration and the three-stage Clos switch configuration in achieving a specific throughput. Because the three-stage Clos switch configuration is not strictly non-blocking, we introduce a nearly non-blocking condition and evaluate switch throughput under the condition. The evaluation shows that crossbar switch configuration becomes more cost effective as the throughput of individual switch LSIs, which depends on device technologies, increases.
1 citations
TL;DR: In this article, a compact 32×32 path-independent insertion loss (PILOSS) thermooptic switch based on CMOS-Si photonics is introduced. Switch design, advanced CMOS compatible fabrication process, and electronic packaging for more than 2000 I/Os are discussed.
Abstract: A compact 32×32 path-independent-insertion-loss (PILOSS) thermooptic switch based on CMOS-Si photonics is introduced. Switch design, advanced CMOS-compatible fabrication process, and electronic packaging for more than 2000 I/Os are discussed.
1 citations
TL;DR: In this paper, a speedup buffer (SB) is designed for realizing a high-throughput network switch based on single-fluxquantum (SFQ) technology.
Abstract: We have designed a speedup buffer (SB) that is indispensable for realizing a high-throughput network switch based on single-flux-quantum (SFQ) technology. The SB performs the rate conversion from 10 to 40 Gbps for the packet data streams fed into the Banyan switch. This approach can reduce the packet-blocking rate, resulting in an increased throughput for the network switch. The SB is composed of a 1:3 stream demultiplexer (SDMUX), three variable-bit-length shift registers (VLSRs) and a 3:1 stream multiplexer, coupled with a controller. We have successfully demonstrated the 1:3 SDMUX and the VLSR. As for the VLSR, we confirmed high-speed operation up to 55 GHz. We have also designed the SB using these components. The SB is a large-scale circuit composed of 11 663 Josephson junctions on a 3.8 × 3.8 mm2 area. So far, partial operations have been demonstrated experimentally.
1 citations