Topic
Banyan switch
About: Banyan switch is a research topic. Over the lifetime, 242 publications have been published within this topic receiving 3452 citations.
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01 Jan 2010
TL;DR: The hardware iterative decoder for a subclass of LDPC codes that are implementation oriented, known also as Architecture Aware LDPC, has been designed in the form of synthesizable VHDL description and synthesis results show significant decrease of decoder area in the second case.
Abstract: Low-Density Parity-Check codes are one of the best modern error-correcting codes due to their excellent error-correcting performance and highly parallel decoding scheme. This article concerns the hardware iterative decoder for a subclass of LDPC codes that are implementation oriented, known also as Architecture Aware LDPC. The parameterizable decoder has been designed in the form of synthesizable VHDL description. Implementation in Xilinx FPGA devices achieves throughput nearly 100Mb/s. Significant part of the decoder area is occupied by Configurable Interconnection Network. The network consists of a set of multiplexers that propagate the data from memory to the computation units. Behavioral description of the interconnection network gives quite poor synthesis results: decoder area is large and exponentially dependent on the number of inputs / outputs. Instead of straightforward behavioral description, the switching network can be described structurally making use of ideas known from theory of telecommunication interconnection networks: Benes or Banyan switches. In this article 1 present in detail the interconnection network implementation based on Banyan switch with additional multiplexer stage to enable non-power-of-2 numbers of outputs. Comparison of synthesis results for the network obtained by synthesis of behavioral description as well as the Banyan structural description shows significant decrease of decoder area in the second case.
12 Dec 1993
TL;DR: In this paper, the authors evaluated and analyzed the performance of the growable switch, bypass queue switch, and tandem banyan switch in an ATM network, and found that the growability of the switch has the best throughput regardless of the traffic patterns.
Abstract: Evaluates and analyzes the performance of the growable switch, bypass queue switch, and tandem banyan switch in an ATM network. Various traffic patterns are considered in simulation experiments. The simulation results show that the growable switch has the best throughput, regardless of the traffic patterns. The bypass queue and tandem banyan throughput can improve to more than 0.95 (for 100% traffic load). However, these two switch fabrics have some overhead on elapsed time; this is in the input queueing for the bypass queue switch, and occurs in the reordering of the packet sequence in the output port of the tandem banyan switch. >
Patent•
24 Feb 1999
TL;DR: The two way switch circuit is formed using anti-paralleled electronic switches, such as thyristor as mentioned in this paper, which are used in the two-way switch circuit of as mentioned in this paper.
Abstract: The two way switch circuit is formed using anti-paralleled electronic switches, such as thyristor.