Topic
Banyan switch
About: Banyan switch is a research topic. Over the lifetime, 242 publications have been published within this topic receiving 3452 citations.
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11 Jun 2006
TL;DR: In this paper, the authors investigate novel configurations of planar multi-port RF MEMS C-type and R-type switches as basic building blocks of redundancy switch matrices for satellite communications.
Abstract: The objective of this paper is to investigate novel configurations of planar multi-port RF MEMS C-type and R-type switches as basic building blocks of redundancy switch matrices for satellite communications. An in house monolithic fabrication process dedicated to electrostatic multi-port RF MEMS switches is developed and fine tuned. The proposed C-type switch is a four port device with two operational states. This switch illustrates an insertion loss of less than 0.3dB and isolation of about 25dB at satellite C band frequency range. The novel R-type switch is also a four port device with an additional operational state that could drastically reduce the number of required switch elements (up to 50%) in a redundancy switch matrix. The measured results show an insertion loss of better than 0.4dB and isolation of better than 25dB at C-band. This is the first time that an R-type RF MEMS switch is ever reported.
34 citations
TL;DR: A technique of implementing the Banyan network with free-space optics based on a polarization encoding of the input and two optical systems are described for the implementation of this technique.
34 citations
07 Apr 1991
TL;DR: A new space-division switch architecture based on Banyan interconnection networks, called the Tandem Banyans Switching Fabric, is introduced, overcoming in a very simple way the effect of blocking encountered in Banyen networks and achieving output buffering.
Abstract: A new space-division switch architecture based on Banyan interconnection networks, called the Tandem Banyan Switching Fabric, is introduced. It consists of placing Banyan networks in tandem, offering multiple paths from each input to each output, thus overcoming in a very simple way the effect of blocking encountered in Banyan networks and achieving output buffering. The simplicity of the architecture stems from the fact that it consists of several instances of only two chips, one implementing the Banyan network and the other implementing the output buffer function. >
33 citations
01 Oct 1993
TL;DR: In this paper, the InP digital optical switch is compared with other types of switch and its push-pull mode of operation is demonstrated for the first time, as well as its high-speed behavior.
Abstract: The InP digital optical switch presented is compared with other types of switch. In addition to reverse- and forward-bias operation, its push-pull mode of operation is demonstrated for the first time, as well as its high-speed behaviour. The high potential of the digital optical switch and switching matrix fabrication are described. The results show that the InP-based digital optical switch has to be considered as a key element for guided-wave photonic switching.
33 citations
12 May 2005
TL;DR: This work proposes an ultra scalable multi-path switch architecture, called TrueWay, a multi-plane multi-stage buffered switch, and shows by simulation that the TrueWay switch with a speed up of 1.6 is able to perform nearly as well as the outputbuffered switch under most interested traffic distributions.
Abstract: Packet switches have been extensively studied during the last two decades. Most commercially available packet switches have a single path between input and output ports, which limits the scalability of the switch. In order to accommodate the exponentially increasing demand of Internet traffic, we propose an ultra scalable multi-path switch architecture, called TrueWay, a multi-plane multi-stage buffered switch. Packets are delivered between the stages of switch modules with link-to-link flow control to avoid overflowing the next-stage's buffers. Schemes such as back-pressure, credit-based and our proposed DQ scheme are discussed. One of the challenging issues of multi-path buffered switch is the maintenance of packet orders that can be resolved by appropriate port-to-port flow control. Schemes such as static hashing, time-stamp-based re-sequencing, dynamic hashing, and window-based re-sequencing, are considered. We show by simulation that the TrueWay switch with a speed up of 1.6 is able to perform nearly as well as the output buffered switch under most interested traffic distributions. A small-scale prototyped switch fabric has been built on a 16-card chassis with high-speed SerDes interconnections at the backplane (with 640 Gbps capacity), and with FPGA chips on each card to reconfigure the switch to test various stage-to-stage and port-to-port flow control schemes. With today's ASIC technology, e.g., 64/spl times/64 switch chip with SerDes interfaces and VCSEL (vertical cavity surface emitting laser) optical interconnections, the TrueWay switch can scale up to 40 Tbps.
32 citations