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Showing papers on "Barrier layer published in 1994"


Patent
01 Aug 1994
TL;DR: In this article, the authors proposed an exotic-nitride barrier layer, which substantially inhibits diffusion of oxygen to the oxidizable layer, thus minimizing deleterious oxidation of the oxide layer.
Abstract: A preferred embodiment of this invention comprises an oxidizable layer (e.g. TiN 50), a conductive exotic-nitride barrier layer (e.g. Ti--A--N 34) overlying the oxidizable layer, an oxygen stable layer (e.g. platinum 36) overlying the exotic-nitride layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlying the oxygen stable layer. The exotic-nitride barrier layer substantially inhibits diffusion of oxygen to the oxidizable layer, thus minimizing deleterious oxidation of the oxidizable layer.

163 citations


Patent
29 Apr 1994
TL;DR: In this article, an insulating layer is provided above the nitride oxidation barrier layer, and an contact/container is etched there through and through dielectric and cell polysilicon layers.
Abstract: In one aspect of the invention, an insulative nitride oxidation barrier layer is provided over a cell polysilicon layer to a thickness of at least about 150 Angstroms. An insulating layer is provided above the nitride oxidation barrier layer, and an contact/container is etched therethrough and through dielectric and cell polysilicon layers. Such exposes edges of the cell polysilicon within the contact/container. The wafer is then exposed to an oxidizing ambient to oxidize the cell polysilicon exposed edges, with the nitride oxidation barrier layer during such oxidation exposure inhibiting oxidation of the outer surface of the cell polysilicon layer. In another aspect, a multi-container stacked capacitor construction has its containers defined or otherwise electrically isolated in a single CMP step. In another aspect, a combination etch stop/oxidation barrier layer or region is provided to enable exposure of a precise quantity of the outside walls of a stacked capacitor container.

132 citations


Patent
22 Jul 1994
TL;DR: In this article, a synergistic combination of a diffusion barrier and physical barrier materials is used to prevent interaction between constituents of the environment and devices that can be damaged by those constituents.
Abstract: An enhanced protective coating to prevent interaction between constituents of the environment and devices that can be damaged by those constituents. This coating is provided by applying a synergistic combination of diffusion barrier and physical barrier materials. These materials can be, for example, in the form of a plurality of layers of a diffusion barrier and a physical barrier, with these barrier layers being alternated. Further protection in certain instances is provided by including at least one layer of a getter material to actually react with one or more of the deleterious constituents. The coating is illustrated by using alternating layers of an organic coating (such as Parylene-C™) as the diffusion barrier, and a metal coating (such as aluminum) as the physical barrier. For best results there needs to be more than one of at least one of the constituent layers.

125 citations


Patent
27 Sep 1994
TL;DR: In this article, a storage cell capacitor and a method for forming the storage cell capacitance having a storage node electrode comprising a barrier layer interposed between a conductive plug and an oxidation resistant layer.
Abstract: The invention is a storage cell capacitor and a method for forming the storage cell capacitor having a storage node electrode comprising a barrier layer interposed between a conductive plug and an oxidation resistant layer. A layer of titanium silicide is fabricated to lie between the conductive plug and the oxidation resistant layer. A thick insulative layer protects the sidewalls of the barrier layer during the deposition and anneal of a dielectric layer having a high dielectric constant. The method comprises forming the conductive plug in a thick layer of insulative material such as oxide or oxide/nitride. The conductive plug is recessed from a planarized top surface of the thick insulative layer. Titanium is deposited and a rapid thermal anneal is performed. The titanium reacts with silicide of the conductive plug to form TiSi at the bottom of the recess. Unreacted Ti is removed. The barrier layer is then formed in the recess. The process is continued with a formation of an oxidation resistant conductive layer and the patterning thereof to complete the formation of the storage node electrode. Next a dielectric layer having a high dielectric constant is formed to overly the storage node electrode and a cell plate electrode is fabricated to overly the dielectric layer.

124 citations


Journal ArticleDOI
TL;DR: In this article, a bimodal grain size distribution was observed at annealing temperatures at or above 150°C for Cu on Ta and 100°C on W. The results are explained as the result of competition between strain energy minimization and surface and interface energy minimisation.
Abstract: Abnormal (100) grain growth has been characterized in predominantly (111)‐textured Cu thin films as a function of deposition temperature, annealing temperature and the presence of a Ta or W underlayer. For films deposited at room temperature, bimodal grain size distributions are observed at annealing temperatures at or above 150 °C for Cu on Ta and 100 °C for Cu on W. Suppression of (100) abnormal grain growth was achieved by depositing Cu on either barrier layer at 150 °C. A bimodal grain size distribution was still observed for the film deposited on W at 150 °C but the large grains forming this distribution were found to be (111) oriented. These results are explained as the result of competition between strain energy minimization and surface and interface energy minimization. The (100) growth is shown to be driven by a reduction of the orientation‐dependent strain energy that builds up due to the elastic anisotropy of Cu. Films deposited at higher temperatures have a lower yield stress which limits the ...

122 citations


Patent
18 Jul 1994
TL;DR: In this paper, an oversize ferroelectric capacitor is located against the contact hole to the MOSFET source/drain in a DRAM, and a barrier layer made of titanium nitride, titanium tungsten, tantalum, titanium, tengsten, molybdenum, chromium, indium tin oxide, tin dioxide, ruthenium oxide, silicon, silicide, or polycide lies between the barrier layer and the source drain.
Abstract: An oversize ferroelectric capacitor is located against the contact hole to the MOSFET source/drain in a DRAM. A barrier layer made of titanium nitride, titanium tungsten, tantalum, titanium, tungsten, molybdenum, chromium, indium tin oxide, tin dioxide, ruthenium oxide, silicon, silicide, or polycide lies between the ferroelectric layer and the source drain. The barrier layer may act as the bottom electrode of the ferroelectric capacitor, or a separate bottom electrode made of platinum may be used. In another embodiment in which the barrier layer forms the bottom electrode, an oxide layer less than 5 nm thick is located between the barrier layer and the ferroelectric layer and the barrier layer is made of silicon, silicide, or polycide. A thin silicide layer forms and ohmic contact between the barrier layer and the source/drain. The capacitor and the barrier layer are patterned in a single mask step. The ends of the capacitor are stepped or tapered. In another embodiment both the bottom and top electrode may be made of silicon, silicide, polycide or a conductive oxide, such as indium tin oxide, tin dioxide, or ruthenium oxide.

100 citations


Patent
28 Oct 1994
TL;DR: In this article, a semiconductor device comprises an interlayer insulating film formed on the semiconductor substrate, an insulating barrier layer, formed by plasma nitriding, for preventing diffusion of a metal constituting a wiring layer, a conductive barrier layer and a bottom portion of the wiring layer.
Abstract: A semiconductor device comprises a semiconductor substrate in which a semiconductor element is formed, an interlayer insulating film formed on the semiconductor substrate, an insulating barrier layer, formed on the interlayer insulating film by plasma nitriding, for preventing diffusion of a metal constituting a wiring layer, a conductive barrier layer, formed on the insulating barrier layer, for preventing diffusion of the metal, and a wiring layer formed of the metal on the conductive barrier layer. A bottom portion of the wiring layer is protected by the conductive barrier layer and the insulating barrier layer. Therefore, the diffusion of the metal constituting the wiring layer can be surely prevented.

96 citations


Patent
01 Jun 1994
TL;DR: In this paper, a layered material such as a packaging laminate for a packaging container possessing superior oxygen gas and aroma barrier properties is disclosed, which consists of a first laminate unit (10a) and a second laminating unit (11b) which are bonded together by the intermediary of an interjacent layer of an adhesive (11).
Abstract: A layered material such as a packaging laminate for a packaging container possessing superior oxygen gas and aroma barrier properties is disclosed. The packaging laminate comprises a first laminate unit (10a) and a second laminate unit (10b) which are bonded together by the intermediary of an interjacent layer of an adhesive (11). The first laminate unit has a rigid, but foldable core layer (12) and outer, surrounding layers (13, 14) of thermoplastic, and the second laminate unit has a flexible substrate or carrier layer (15) of thermoplastic which, on its surface, carries a layer (16) acting as an oxygen gas and aroma barrier and consisting of a silicon oxide deposited by chemical plasma deposition and having the general chemical formula SiOx, in which x may vary within the range of between 1.5 and 2.2. A flexible laminate having an SiOx barrier layer is also disclosed.

95 citations


Patent
01 Aug 1994
TL;DR: A preferred embodiment of this invention comprises an oxidizable layer (e.g. TiN 50), an noble-metal-insulator-alloy barrier layer, an oxygen stable layer, and a high-dielectric-constant material layer as discussed by the authors.
Abstract: A preferred embodiment of this invention comprises an oxidizable layer (e.g. TiN 50), an noble-metal-insulator-alloy barrier layer (e.g. Pd-Si-N 34) overlying the oxidizable layer, an oxygen stable layer (e.g. platinum 36) overlying the noble-metal-insulator-alloy layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlying the oxygen stable layer. The noble-metal-insulator-alloy barrier layer substantially inhibits diffusion of oxygen to the oxidizable layer, thus minimizing deleterious oxidation of the oxidizable layer.

93 citations


Patent
Toyoji Chino1, Kenichi Matsuda1
11 Mar 1994
TL;DR: In this paper, a mask pattern is used to define a top mirror on a semiconductor substrate, and the mask pattern and the etching protective film are used as masks to protect the surface of the top mirror.
Abstract: A method for producing a surface-emitting laser, includes the steps of: forming a mask pattern to define a top mirror on a semiconductor substrate, the semiconductor substrate having a first semiconductor multilayer formed on the semiconductor substrate, a second semiconductor multilayer formed on the first semiconductor multilayer, and a third semiconductor multilayer formed on the second semiconductor multilayer, the first semiconductor multilayer constituting a bottom mirror, the second semiconductor layer including an upper barrier layer and a lower barrier layer, and an active layer sandwiched between the upper and lower barrier layers, the third semiconductor multilayer constituting a top mirror; forming the top mirror by partially removing the third semiconductor layer by dry etching using the mask pattern as a mask until the surface of the upper barrier layer of the second semiconductor multilayer is exposed; forming an etching protective film at least on the side of the top mirror; partially removing the active layer, the upper barrier layer, and the lower barrier layer by dry etching using the mask pattern and the etching protective film as masks; and partially removing the active layer, the upper barrier layer, and the lower barrier layer by wet etching so that the active layer has an area smaller than that of the top mirror.

81 citations


Journal ArticleDOI
TL;DR: In this article, high quality chemical vapor deposited TiCN films were produced in a single wafer reactor using a metallorganic (TDMAT) precursor, which showed excellent step coverage over high aspect ratio contacts as well as very low particle content.
Abstract: High‐quality chemical vapor deposited TiCN films were produced in a single wafer reactor using a metallorganic (TDMAT) precursor. The films have excellent step coverage over high aspect‐ratio contacts as well as very low particle content. These properties are obtained because the films are deposited under surface‐reaction controlled conditions. The films show also excellent barrier properties against Al and WF6 attack. These properties make this material a superb contact barrier material for ultra‐large‐scale integrated devices.

Journal ArticleDOI
TL;DR: Mooring measurements at 0°, 165°E, for the period November 1988 to August 1991 indicate that surface layer structure was characterized by two distinct climatic regimes associated with dramatic differences in large-scale atmospheric and oceanic conditions.
Abstract: Mooring measurements at 0°, 165°E, for the period November 1988 to August 1991 indicate that surface layer structure was characterized by two distinct climatic regimes associated with dramatic differences in large-scale atmospheric and oceanic conditions. La Nina conditions existed from November 1988 to November 1989, during which time the easterly trades were strong, Ekman divergence and upwelling were pronounced, surface velocity was strongly westward, and rainfall was low. The surface layer was cold, salty and well mixed down to 100-m depth, with density variations controlled primarily by temperature. In contrast, from November 1989 to August 1991, the zonal winds were on average westerly and punctuated by frequent westerly wind bursts, the surface currents reversed and flowed eastward in the upper 50 m, and rainfall was high. Compared to the La Nina period, the surface layer was warmer and fresher, and the density mixed layer was shallower than the isothermal layer owing to the presence of a 30-m-thick mean halocline (or barrier layer) between 55- and 85-m depth. Moreover, density variations in the mixed layer were determined primarily by salinity. During the November 1988 to November 1989 La Nina period, variability in sea surface temperature was influenced by local upwelling and zonal advection. However, during November 1989 to August 1991, the presence of the barrier layer effectively prevented the entrainment of cooler, saltier water from the thermocline into the surface layer. Local air-sea heat fluxes were therefore more likely to be prominent in the surface layer temperature balance. The barrier layer thickness, which varied with a dominant time scale of 12–25 days, appears to have been affected by variations in zonal advection of low-salinity water past the mooring.

Patent
29 Apr 1994
TL;DR: In this article, a method for forming aluminum-silicon contacts with a barrier layer is described, where the barrier is enhanced by the provision of titanium oxynitride layers adjacent the silicide film formed at the exposed silicon at the bottom of the contact.
Abstract: Methods of forming, in an integrated circuit, aluminum-silicon contacts with a barrier layer is disclosed. The barrier layer is enhanced by the provision of titanium oxynitride layers adjacent the silicide film formed at the exposed silicon at the bottom of the contact. The titanium oxynitride may be formed by depositing a low density titanium nitride film over a titanium metal layer that is in contact with the silicon in the contact; subsequent exposure to air allows a relatively large amount of oxygen and nitrogen to enter the titanium nitride. A rapid thermal anneal (RTA) both causes silicidation at the contact location and also results in the oxygen and nitrogen being gettered to what was previously the titanium/titanium nitride interface, where the oxygen and nitrogen react with the titanium metal and nitrogen in the atmosphere to form titanium oxynitride. The low density titanium nitride also densifies during the RTA. Alternative embodiments are also disclosed in which the silicide is formed first, prior to the formation of additional titanium oxynitride by air exposure and RTA, or by sputter deposition. Each of these processes produces a high-quality barrier contact structure overlying a silicide film, where the barrier structure includes titanium oxynitride and titanium nitride.

Patent
31 May 1994
TL;DR: In this article, the authors proposed a semiconductor waveguiding structure which includes a first waveguide layer formed on a substrate, a barrier layer that is formed on the waveguide, and a second waveguide that is etched using the selected etchant such that its width is tapered along its length to a pointed edge.
Abstract: The present invention is directed to a semiconductor waveguiding structure which includes a) a first semiconductor waveguiding layer formed on a substrate, b) a barrier layer that is formed on the first semiconductor waveguiding layer, and that is resistant to a selected etchant, and c) a second semiconductor waveguiding layer that is etched using the selected etchant such that its width is tapered along its length to a pointed edge. A separate etching of the first semiconductor layer is performed to form each sidewall of the first semiconductor layer. The intersection of those sidewalls defines the pointed edge which has a radius of curvature of less than 500 Angstroms.

Patent
17 Mar 1994
TL;DR: In this paper, the active layer is interposed between the cladding layers and the semiconductor laser unit comprising a multiquantum barrier layer including well layers and barrier layers disposed between active layer and cladding layer or disposed in the claddings close to active layer, wherein the well and barrier layer have a high reflectivity with respect to the electrons and holes at a position close to Γ-point in the reciprocal lattice space.
Abstract: It is an object of the present invention to provide a highly efficient semiconductor laser unit having excellent temperature characteristics, in which electrons or holes are suppressed from overflowing from the active layer to the cladding layers while the threshold of current density is maintained low. The present invention is to provide a semiconductor laser unit fundamentally composed of an active layer and cladding layers in which the active layer is interposed between the cladding layers the semiconductor laser unit comprising: a multiquantum barrier layer including well layers and barrier layers disposed between the active layer and the cladding layers or disposed in the cladding layers close to the active layer, wherein the well and barrier layers have a high reflectivity with respect to the electrons and holes at a position close to Γ-point in the reciprocal lattice space, and also the well and barrier layers have a high reflectivity with respect to the electrons and holes at a position close to at least one of the primary symmetrical points.

Journal ArticleDOI
TL;DR: In this article, a single phase and polycrystalline insulating films of In2O3 were prepared by sputtering indium in the presence of pure oxygen using dc magnetron sputtering.
Abstract: Insulating films of In2O3 were prepared by sputtering indium in the presence of pure oxygen using dc magnetron sputtering. Transmission electron microscopic investigations showed the films to be single phase and polycrystalline. Analysis of the optical transmittance data showed the films to have an optical band gap of 3.71±0.01 eV. Tunnel junctions were made with high Tc superconductors Bi2Sr2Ca1Cu2Oy and NdBa2Cu3O7−δ using indium oxide as the barrier layer and Pb0.5In0.5 as the counter electrode. The conductance spectra displayed prominent structures attributable to energy gap. The reduced gap parameters for Bi2Sr2Ca1Cu2Oy and NdBa2Cu3O7−δ were found to be 4.0±0.5 and 5.2±0.6, respectively.

Patent
13 Jun 1994
TL;DR: A sheet material which includes an apertured top layer formed of a non-absorbant, thermally non-conductive thermoplastic material, a nonwoven layer having a first portion consisting of a mixture of moisture-wicking and moistureabsorbent fibers affixed to the top layer, and, in various embodiments, a barrier layer and/or cushioning layer forming a laminate is sandwiched between the top and such other layers.
Abstract: A sheet material which includes an apertured top layer formed of a non-absorbant, thermally non-conductive thermoplastic material, a non-woven layer having a first portion formed of a mixture of moisture-wicking and moisture-absorbent fibers affixed to the top layer, and, optionally, a second portion including fibers which are non-adsorbent and non-absorbent, and, in various embodiments, a barrier layer and/or cushioning layer forming a laminate in which the non-woven layer is sandwiched between the top layer and such other layers. The chemical formulation of the top layer of thermoplastic material can be varied to alter its coefficient of friction or degree of slip resistance depending upon the requirements of a particular application.

Patent
29 Aug 1994
TL;DR: In this article, the authors proposed a method for the formation of interconnects and landing pads having a thin, conductive film underlying the plug of an associated contact or via hole.
Abstract: The present invention provides a method for the formation of interconnects and landing pads having a thin, conductive film underlying the plug of an associated contact or via hole. In accordance with the preferred embodiment of the present invention, a silicon substrate is provided having at least one device region formed at the surface of the substrate. An insulating layer is deposited over the substrate having at least one contact hole formed through the insulating layer to expose the device region. A first blanket layer of titanium is deposited as a tungsten adhesion layer over the insulating layer and the exposed device region within the contact hole. A second blanket layer of titanium-tungsten or titanium-nitride is then deposited as a tungsten barrier layer over the adhesion layer. Subsequently, a blanket contact plug layer comprising tungsten is deposited over the barrier layer by chemical vapor deposition. Both the contact plug layer and the barrier layer are then removed from the surface of the adhesion layer everywhere except within the contact hole by a selective etch back process wherein a selectivity between tungsten and titanium of at least 5:1 is achieved. Next, the exposed portions of the adhesion layer are patterned with a mask and etched to remove those portions of the adhesion layer not covered by the mask, thus converting the adhesion layer into a thin film interconnect or landing pad underlying the contact plug of the associated contact hole.

Patent
27 Dec 1994
TL;DR: In this article, a method for forming a metal contact in a self aligned contact region over a impurity region in a substrate which comprises forming a doped polysilicon layer over the device surface except in a contact area is presented.
Abstract: A method for forming a metal contact in a self aligned contact region over a impurity region in a substrate which comprises forming a doped polysilicon layer over the device surface except in a contact area A thin polysilicon barrier layer and a metal layer, preferably tungsten, are then formed over the polysilicon layer and the contact area The resulting metal contact has superior step coverage, lower resistivity, and maintains the shallow junction depth of buried impurity regions

Patent
16 Aug 1994
TL;DR: An oxygen and moisture impermeable multilayer barrier film which is free of halogens and which may be produced by coextrusion or lamination techniques is provided in this article.
Abstract: An oxygen and moisture impermeable multilayer barrier film which is free of halogens and which may be produced by coextrusion or lamination techniques is provided. The film provides excellent adhesion between layers, has quietness, odor barrier, and softness characteristics, and provides a heat sealable surface for the fabrication of bags. The barrier film includes a halogen-free barrier layer and at least one heat sealable skin layer. The heat sealable skin layer includes either a thermoplastic polyurethane, a substantially linear copolymer of ethylene and an α-olefin having a density in the range of from about 0.87-0.92 gm/cc and from about 0.01 to 3 long chain branches/1000 carbon atoms along the polymer backbone, a homogeneously-branched linear polyolefin resin, or a blend of an ultra low density polyolefin resin with a copolymer of ethylene and vinyl acetate.

Patent
Frank Hawley1
28 Jul 1994
TL;DR: In this article, the first etch-stop dielectric layer is disposed over an underlying layer comprising either a lower or upper antifuse electrode barrier layer or an antifusible material layer.
Abstract: A dielectric layer through which an antifuse via or an antifuse contact via is to be formed comprises a sandwich of at least two, and preferably three, individual layers. A first etch-stop dielectric layer is disposed over an underlying layer comprising either a lower or upper antifuse electrode barrier layer or an antifuse material layer. The first etch-stop dielectric layer comprises a thin layer of dielectric material. An isolation dielectric layer is disposed over the first etch-stop dielectric layer and comprises a second material comprising most of the thickness of the sandwich and having a substantial etch-time differential from the first etch-stop dielectric material for a selected etchant for the first etch-stop dielectric material. A second etch-stop dielectric layer may be provided under the first etch-stop dielectric layer and may be formed from a third material having a substantial etch time differential from the first etch-stop dielectric material for a selected etchant for the first material. A process for forming a via according to the present invention comprises, in order, the steps of forming the first etch-stop, isolation, masking the sandwich of dielectric layers for formation of a via; etching the isolation dielectric layer with an over-etch, stopping on the underlying first etch-stop dielectric layer; etching the first etch-stop dielectric layer with high over-etch, stopping on the layer beneath it.

Patent
22 Dec 1994
TL;DR: A vibration damper sheet is composed of a laminated sheet having a base stock layer 3, a resilient layer 4, an primer layer 5, an organic component barrier layer 6 and an adhesive layer 7 successively laminated in that order from one to the other side thereof as mentioned in this paper.
Abstract: A vibration damper material 1 composed of a laminated sheet having a base stock layer 3, a resilient layer 4, an primer layer 5, an organic component barrier layer 6 and an adhesive layer 7 successively laminated in that order from one to the other side thereof, and a release liner 8 stuck on the adhesive layer 7. The resilient layer 4 is constituted by a resilient material containing a vehicle consisting of a member or a mixture of two or more members selected from the group of asphalt, rubber, synthetic resins and cellulose derivatives, synthetic resin powder, and an elastic material having an elongation rate of 500% or higher. The organic component barrier layer functions to block permeation therethrough of organic components such as tar and oil components which would otherwise tend to migrate into the adhesive layer from the resilient layer. Despite a substantial reduction in thickness, the vibration damper sheet possesses satisfactory vibration damping properties, along with excellent adhesion to curved surfaces and punching machinability and sticking machinability.

Journal ArticleDOI
TL;DR: In this article, a metallurgical scheme for the purpose of bonding laser chip to CVD-diamond sub-mounts was proposed, which was shown to provide a high quality bond of the laser diode to the chemically vapor-deposited diamond submount.

Patent
11 May 1994
TL;DR: In this article, a hollow multi-layer molding made of a multilayer laminate material has been proposed, which is capable of being produced while allowing improved reclaiming of flash and the like.
Abstract: A hollow multi-layer molding made of a multi-layer laminate material, the multi-layer laminate material having: a polyethylene layer; a barrier layer made of a substance selected from the group consisting of polyamide resins, saponified derivatives of ethylene-vinyl acetate copolymers, thermoplastic polyesters, and a mixture of at least two of the polyamide resin, the saponified derivative and the thermoplastic polyester; and an adhesive layer made of a modified polyolefin resin, the polyethylene layer and the barrier layer being laminated to each other with the adhesive layer sandwiched therebetween. The polyethylene layer is made of a high-molecular-weight polyethylene which is obtained by using a specific chrome catalyst and a reducing agent, and which has a high-load melt flow rate (at a temperature of 190°C under a load of 21.6 kg) of 1 to 10 g/10 min., and a density of not less than 0.935 g/cm³. The hollow multi-layer molding has excellent barrier properties with respect to vehicle fuels and excellent mechanical strength, such as impact strength, and is capable of being produced while allowing improved reclaiming of flash and the like.

Patent
14 Nov 1994
TL;DR: An acoustic barrier for mounting to a barrier wall is described in this paper, where the mass layer has a series of projections formed on a rear surface, which coincide with the indentations of the barrier.
Abstract: An acoustic barrier for mounting to a barrier wall, such as a barrier wall between an engine compartment and a passenger compartment of a vehicle. The barrier wall has multiple indentations forming an uneven surface. The acoustic barrier comprises a decoupling layer and a mass layer. The mass layer has a series of projections formed on a rear surface, which coincide with the indentations of the barrier. When the decoupling layer is mounted to the rear wall of the mass layer, the projections alter the shape of the decoupling layer to conform with the shape of the barrier layer.

Patent
18 Aug 1994
TL;DR: In this paper, a thin film electroluminescent device is described, comprising a first electrode layer, first and second dielectric layers with an active phosphor layer disposed therebetween, and a second electrode layer where there is provided within the phosphor layers at least one barrier layer comprising a thin layer of dielectrics material.
Abstract: A thin film electroluminescent device is disclosed, comprising a first electrode layer, first and second dielectric layers with an active phosphor layer disposed therebetween, and a second electrode layer, wherein there is provided within the phosphor layer at least one barrier layer comprising a thin layer of dielectric material. There is also disclosed an array of such devices placed side to side, and a print head suitable for A4 electrographic printing.

Patent
21 Dec 1994
TL;DR: A metallurgical joint structure between two workpieces to be joined by soldering or brazing includes a stress release layer of a low yield point metal, preferably silver, gold, copper, palladium or platinum as discussed by the authors.
Abstract: A metallurgical joint structure between two workpieces to be joined by soldering or brazing includes a stress release layer of a low yield point metal, preferably silver, gold, copper, palladium or platinum. The joint structure also includes a juxtaposed barrier layer to prevent the diffusion of a solder element, such as tin, to the stress release layer. Preferred barrier layers are chromium, titanium-tungsten and tantalum. Preferably, the joint includes one or more stress relief layer and associated barrier layer combinations in the joint structure for improved joint reliability.

Patent
01 Mar 1994
TL;DR: In this paper, a multilayer composite film consisting of a surface layer A, a gas barrier layer C, a heat sealing layer D and, optionally, adhesive or coupling layers B was presented.
Abstract: A WHITE OPAQUE BARRIER LAYER FILM WITH EXCELLENT LAY-FLAT PROPERTIES A b s t r a c t The invention relates to a multilayer composite film consisting of a surface layer A, a gas barrier layer C, a heat sealing layer D and, optionally, adhesive or coupling layers B, the individual layers being arranged as follows in the composite film: A a biaxially stretched, white opaque polypropylene film, B an adhesive or coupling layer, C a gas barrier layer with a permeability to oxygen of at most 30 Ncm3/m2 d bar (23°C/0% relative humidity), B an adhesive or coupling layer, D a heat sealing layer, layers A and C optionally being interchangeable.

Patent
23 Aug 1994
TL;DR: In this article, a LOCOS procedure is performed to form a field oxide layer on a silicon substrate by using a barrier layer as a mask, and then the field oxide is removed to leave a concave area in the silicon substrate.
Abstract: A MOS transistor with concave channel and method of fabrication is provided. First, a LOCOS procedure is performed to form a field oxide layer on a silicon substrate by using a barrier layer as a mask. Next, the field oxide is removed to leave a concave area in the silicon substrate. Silicon dioxide sidewall spacers are formed apart on side walls of the barrier layer. A gate oxide layer is formed on the bottom of the concave area. A polysilicon layer is formed in conformity with the exposed surfaces of the barrier layer, the silicon dioxide sidewall spacers, and the gate oxide layer. A mask layer is formed overlying the polysilicon layer within the concave area. Then, portions of the polysilicon layer not covered by the mask layer are removed, so that the remained portion of the polysilicon layer and the gate oxide layer together construct a gate electrode, while the area under the gate electrode forms a concave channel. The mask layer and the barrier layer are removed respectively. Heavily doped source/drain areas are formed by a first ion implantation using the gate electrode and the silicon dioxide sidewall spacers as self-align masks. After removing the silicon dioxide sidewall spacers, lightly doped source/drain areas are formed by a second ion implantation using the gate electrode as a self-align mask.

Patent
07 Feb 1994
TL;DR: In this paper, a flexible elongate barrier laminate (ELB) is proposed for attachment to the outer surface of a structure, such as a house before attachment of its siding, to cover joints between structural members assembled to form the structure.
Abstract: A barrier laminate (10) for attachment to the outer surface of a structure, such as a house prior to attachment of its siding, to cover joints between structural members assembled to form the structure. The barrier laminate (10) comprises a flexible elongate barrier layer (18) having minute passageways between its major surfaces (21, 22) affording passage of water vapor while restricting the passage of liquid water and air between its major surfaces (21, 22). Means providing an exposed layer (24) of pressure sensitive adhesive along each of the opposite edges (20) of the barrier layer (18) are provided for adhering the barrier layer (18) to structural members on opposite sides of a joint therebetween.