Showing papers on "Benchmark (computing) published in 1970"
TL;DR: The algorithms and techniques exploited by a hierarchical simulator are described and benchmark examples with regard to memory size and loading time for circuits of different size are given.
Abstract: The use of hierarchical data structures during the run time of simulation results in excellent performance values regarding model size and loading time without any loss of accuracy of the results. This paper describes the algorithms and techniques exploited by a hierarchical simulator and gives benchmark examples with regard to memory size and loading time for circuits of different size. Although this technique has been developed for the simulation of digital circuits, it is applicable to a broader spectrum of problems of discret simulation.
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