Showing papers on "Biasing published in 1978"

Selective resputtering‐induced anisotropy in amorphous films

Abstract: A model will be presented to explain the bias voltage dependence of magnetic anisotropy in sputtered amorphous films of gadolinium cobalt alloys. It has been found that the magnetic anisotropy increases with bias voltage up to a critical bias voltage (∠150 V depending on the sputter gas) then decreases precipitously at higher voltages. The model used to explain this behavior is based on selective resputtering of atoms in different surface sites causing an anisotropic distribution of Gd and Co atoms with respect to the growth direction. For example, a Gd adatom in contact with three surface atom neighbors can have 0, 1, 2, or 3 cobalt neighbors. The sputtering threshold for each type of Gd adatom will be different so those with a low threshold will be selectively removed giving a structural anisotropy. This anisotropic atomic distributions can cause different kinds of anisotropy with respect to the growth direction depending on the type of amorphous film. For example, both easy‐axis (GdCo) and hard‐axis (G...

On the influence of a flexural biasing state on the velocity of piezoelectric surface waves

Abstract: A system of linear electroelastic equations for small fields superposed on a bias is applied in the determination of the velocity of acoustic surface waves in piezoelectric substrates subject to flexural biasing stresses. The influence of the biasing stresses appears in the boundary conditions as well as the differential equations. Direct calculations performed for both quartz and lithium niobate when the spatial variation of the flexural biasing state is omitted indicate that the biasing stresses in the boundary conditions have an important influence of the surface wave velocity. In addition, perturbation calculations are performed which include the influence of the spatial variation of all flexural biasing terms and it is shown that, for substrate thickness-to-wavelength ratios well within the practical range, the spatial variation in the biasing state has an appreciable effect on the velocity of acoustic surface waves.

Steady-state characteristics of two terminal inversion-controlled switches

Abstract: The direct current-voltage (I–V) characteristics of three terminal inversion controlled switches are described. These devices are layered sequences of metal/conducting “insulator”/semiconductor junction with electrical terminals at the metal and both sides of the junction. If a bias is applied between the metal and the far side of the junction, in the sense which tends to deplete the surface and forward bias the junction, the device shows bistable impedance states similar to the current-voltage characteristics of a silicon-controlled rectifier. The intermediate terminal which contacts the semiconductor region between the insulator and the junction, can be used, in proper circuit and biasing arrangements, to switch the device both into and out of its low impedance state without varying the voltage supplied to the outer terminals of the device and a series-connected resistor. The I–V characteristics of these three terminal devices support the inversion-controlled conduction model of device behavior which permits high conductivity of the device only when inversion of the semi-conductor surface occurs. The high and low impedance states and the pulses required to induce transistions between states are contained entirely within the “active” bias configuration for these devices, which is defined by analogy with the active bias region of conventional bipolar transistors.

1/ƒ Noise in solid state single injection diodes

Abstract: 1/ƒ noise calculations and experiments are presented for solid state single injection diodes operating in the ohmic and space-charge-limited current (SCLC) regime. Investigations are performed on diodes both with a planar and with a hemispherical geometry. In the ohmic regime the 1/ƒ voltage noise is proportional to the square of the bias voltage V for both geometrics. In the space-charge regime the 1/ƒ voltage noise is theoretically found to be proportional to V and V 3 4 for planar and hemispherical geometry, respectively. Here the current is proportional to V2 and V 3 2 , respectively. The experiment al results of 1/ƒ voltage noise are found to be in agreement with the calculations for both kinds of geometry.

Integrated amplifier with adjustable offset voltage

Abstract: An operational amplifier including two parallel transistors in each of the two current paths with one of the transistors being connected to the current path by a fusible element and the other transistor being connected to the path by an impedance which does not affect the overall operation of the current path during normal operation with the current in the first direction and steers the current in the opposite direction towards the fusible element to blow the fusible element by forward biasing a normally reversed biased junction. Using bipolar transistors, the base-collector junction is forward biased to blow the fusible element. A single junction field effect transistor can be used having a plurality of parallel drain segments and the gate-drain junction is forward biased.

GaAs MESFET For High-Speed Optical Detection

Abstract: The microwave, low-noise GaAs-metal-semiconductor, field-effect transistor (MESFET) has a cutoff frequency higher than 80 GHz and possesses a good optical responsiveness over a very wide spectral range, from visible to near-infrared wavelengths. The drain-current variation of the MESFET is proportional to the input optic intensity. If the light is modulated, MESFET detects the high-speed subcarrier. Besides the low-noise and amplification-gain advantages, the MESFET photodetector operates at a low bias voltage, normally, below 6 V. The common-gate configuration at zero drain voltage also can function in a photocapacitive mode in which the capacitance changes with the change in polarized light intensity. The S-parameter of the device has been characterized up to Ku-band. The high-frequency optical receiver is ready to be designed and optimized using this charaterization. For high-speed fiber-optic communications, the monolithic receiver, the ILD driver, and the low-cost repeater all can be fabricated by using the MESFET's.

High current triggered spark gap

Abstract: A triggered spark gap suitable for use with high levels of voltage and current over long periods of time generally comprising support means, a pair of insulated main electrodes disposed opposite each other on the support means so as to form a gap therebetween, first electrical means associated with the main electrodes for creating a potential difference therebetween, at least one trigger electrode defining a region having a cross-sectional thickness to width ratio greater than one, said trigger electrodes being mounted on the support means such that said region is disposed in the gap between the main electrodes, and second electrical means connecting the trigger electrode to a source of triggering and biasing potential.

Influence of inert gas incorporation on uniaxial anisotropy of sputtered GdCo thin films

Abstract: A study was made of the gas content and uniaxial anisotropy of GdCo films as a function of bias voltage and gas pressure. Unlike previous studies of GdCo, in this investigation, a multi‐target sputtering system was used, making it possible to keep the Gd/Co ratio (and hence 4πM) relatively constant while the bias and pressure were varied. For low bias voltages, the anisotropy was found to increase with bias as has been reported in the literature. However, unlike previous studies, we found that the anisotropy reached a peak value at ∼200 V and then decreased with bias at higher voltages. When argon was used as the sputtering gas, it was found that the gas content in the film also peaked at ∼200 V; with neon, the gas content did not peak but decreased with bias at voltages over ∼100 V. Samples deposited with an argon pressure of 50 mTorr show an approximate proportionality between anisotropy and gas content, suggesting that the presence of the gas is at least partly responsible for the generation of growth‐...

p-n-p-n optical detectors and light-emitting diodes

Abstract: Light-emitting diodes with the high-radiance Burrus configuration have been made with an internal p-n-p-n structure which causes an S -type negative resistance. The devices were double heterostructures using InGaAsP material. By using the proper external load impedance and bias voltage, the negative resistance can be used to obtain bistable operation with switching from low current to high current triggered by a small current (e.g., 1 μA). Light coupled into the center junction can be used as the source of signal current. Since light output is proportional to the total current, this type of device can be used as a light-signal repeater.

A monolithic 10-bit A/D using I/sup 2/L and LWT thin-film resistors

Abstract: Describes the function, circuit details, and performance of a monolithic 10-bit A/D converter. The converter is a successive approximation type using linear compatible I/SUP 2/L for the SAR. The converter is completely self-contained, including both clock and voltage reference. Biasing is arranged to take advantage of naturally occurring interfaces in the circuitry, simplifying the overall circuit in comparison to discrete or hybrid approaches. The processing also includes on-chip thin-film resistors which are laser-wafer-trimmed (LWR) for overall accuracy and temperature stability. The finished circuits operate with no missing codes over the -55/spl deg/ to +125/spl deg/C temperature range.

Inversion layer sprain gauge

Abstract: A strain gauge element having an elastic beam with field effect transistors deposited on one surface arranged in a Wheatstone bridge so that deformation of the beam produces a proportional imbalance signal across the bridge, and means for applying a gate biasing voltage to the transistors with at least one such voltage being adjustable so that the bridge can be electrically balanced for a null or no load condition.

Low noise-high gain JFET amplifier for a piezoelectric transducer

Abstract: A low-noise junction field effect depletion mode transistor amplifier and a signal retrieval network therefor is described. The junction (JFET) is used to amplify the signal from a piezoelectric transducer which forms the sensing element of a bone conduction microphone. A conventional transistor or Darlington pair is provided with a base electrode coupled to the source electrode of the JFET and a collector electrode coupled to the JFET drain electrode. The emitter circuit of the transistor includes a first voltage divider for feeding back a portion of the emitter signal to the base circuit of the transistor and another portion to the gate circuit of the JFET through the piezoelectric transducer. A second voltage divider is provided in the feedback path from the first divider to the transistor base to apply a portion of the base feedback signal to the JFET gate through the gate input resistor. By suitably selecting a high enough bias voltage for the JFET and by provision of the output transistor and associated feedback, the amplified output signal can be taken from either of the D.C. bias supply lines, namely, the positive line from the drain electrode of the JFET or the negative supply line at the bottom of the first voltage divider. Further solid state circuit means are provided for retrieving the amplified output signal from either of said supply lines with maximum gain and signal output.

Leakage current compensating circuit for semiconductor image sensor

Abstract: A dark current compensation system for use with a semiconductor imaging device. A p-n junction, thermally connected to the semiconductor imaging device, is forward biased by a temperature variant voltage. The bias voltage is varied in accordance with the temperature of the junction such that the current through the forward biased junction is substantially equal to the reverse saturation current of the junction times a predetermined constant. A dark current compensation signal is derived from the current through the junction.

Separation of storage effects in monolithic pn diode correlators

Abstract: The use of a combination of steady and pulsed dc biasing of a ZnO monolithic SAW device enabled a distinction to be made between surface‐state and pn diode storage mechanisms in a single memory correlator device. By use of demonstrated biasing schemes, storage times of from tens of microseconds to tens of miliseconds are available in a single device.

Memory array with bias voltage generator

Abstract: A bias generator produces a voltage (V R ) which is applied to the control electrode of a gating transistor via whose conduction path the contents of a memory cell are read-out. V R is such that, during read-out, the maximum amplitude of the gate-to-source potential (V GS ) applied to the gating transistor, in a direction to turn it on, is approximately equal to a fraction of the memory cell supply voltage plus an offset voltage comparable to the threshold voltage (V T ) of the gating transistor. The bias generator includes a voltage divider connected across the same supply voltage source as the memory cell. A portion of the supply voltage (K V DD ) generated at a node of the divider is applied to an offset voltage generating circuit which includes as least one device of the same type as the gating transistor and which produces V R at its output. V R is approximately equal to K V DD offset by a voltage comparable to the V T of the gating transistor. Applying V R to the gating transistor enables the contents of the memory cell to be read out non-destructively since the ON impedance of the gating transistor is controlled over a wide range of supply voltage variation and for a wide range of device characteristics.

Low noise oscillator circuit

Abstract: A low noise, high frequency oscillator (50) is disclosed which includes a JFET (100) having a tuned circuit (102) connected in a feedback arrangement with it. The JFET is operated in a self-biasing mode and includes a gate biasing circuit (104) comprised of a capacitor (114) and a resistor (116). The capacitor (114) and resistor (116) are selected such that the gate bias circuit (104) represents a low impedance path to low frequency noise components. These low frequency noise components are therefore shunted to ground, and do not modulate the operation of the JFET (100). This significantly reduces noise in the oscillator output signal. A hot carrier diode (118) is connected across the gate-to-source junction of the JFET (100) to reduce loading on the tuned circuit (102) by the JFET (100).

Integrated circuit substrate charge pump

Abstract: An integrated circuit is disclosed which includes a charge pump adapted for biasing the substrate of a monolithic integrated circuit containing bipolar transistors. An oscillator operating under the control of a control input provides pulsed output signals for driving a diode-capacitor voltage multiplier network which generates a substrate bias voltage. A feedback network including a zener diode senses the substrate voltage, and switching action of the zener diode operates to selectively enable and disable the oscillator for regulating the substrate bias voltage.

Electrically variable impedance circuits

Abstract: In a known variable impedance circuit with the variable impedance established across junctions of transistors connected in two branches between a control current source, for variably forward-biasing the junctions, and an equalizing circuit for equalizing the currents in the branches, the balance of the circuit is upset when an amplifier connected to one branch draws input bias current therefrom. This problem is overcome by a transistor connected to the other branch to draw a matching current from the second branch. Transistors may be connected to both branches to increase the currents in the equalizing circuit and thereby improve the operation thereof when the control current is reduced to a low value for obtaining a high impedance.

An analysis of wide-band transferred electron devices

Abstract: The trapping conditions of a high-field domain at the anode are studied by varying doping density, applied bias voltage, and doping notch depth and width near the cathode. It is shown that the frequency band of negative conductance of the trapped-domain mode depends significantly on the doping density, and a diode having the doping density of 3 × 1015/cm3exhibits the negative conductance over the wide range from 4 GHz to 42 GHz. The upper frequency limit of the negative conductance is due to the series resistance in the low-field region and the lower limit is determined by carrier transit-time effects in high-field region. The operation mode of a trapped-domain diode will change into a traveling dipole or accumulation mode from a trapped-domain mode depending on the doping density and the operation frequency for a large-signal operation.

Increase of gate capacitance in DMOST

Abstract: The gate capacitance of an n-channel DMOST at nonzero drain current biasing exceeds that of a similar conventional MOST and may even exceed the gate oxide capacitance. This effect is due to the behavior of mobile electrons in the device. The fundamental operation of the DMOST is understood through the use of a two-dimensional computer analysis. Based on this insight, the increase of the gate capacitance is clarified in terms of the electron velocity between the source and the drain. Gate capacitance measurements are carried out on experimental DMOST's, which are made on a p-background as well as on an n-epitaxial layer. The measured C-V curves qualitatively confirm the theory on the increase of the gate capacitance in its dependence on the background of the DMOST and the applied dc voltages.

Automatic kinescope bias control circuit

Abstract: Apparatus for automatically controlling the bias of an image reproducing color kinescope in a system incuding a plurality of video driver stages for supplying image representative video signals to respective intensity control electrodes of the electron guns of the kinescope. The output of each driver stage is coupled to an operating supply voltage via a load impedance. The electron gun currents (e.g., cathode currents) are sensed during image blanking intervals of the video signal to provide respective control voltages representative of the electron gun blanking current levels. The control voltages are respectively applied to control the output operating voltage of each driver stage, and thereby the electron gun bias, in a manner to reduce deviations of the blanking current level from a normally expected level. In one embodiment, each driver stage comprises a transistor with a video input base electrode, and a collector output electrode coupled to an electron gun. The control voltage is applied to the collector circuit of the transistor for varying the quiescent current through the load impedance and the collector quiescent output potential independent of the video signal, to thereby vary the electron gun bias in a direction for reducing the blanking current. Interaction between the control voltages and video signals is minimized, and the apparatus is suitable for use with kinescopes having separately energized grids or with kinescopes having grids energized from a common source.

Voltage comparator having capacitively cascade-connected inverting amplifiers

Abstract: A voltage comparator suitable for use in an analog-to-digital converter such as a successive-approximation converter which is comprised of a plurality of capacitively cascade-connected inverters to generate an output signal of a logic level 1 or 0 according to the relationship between the magnitudes of two analog input voltage signals to be compared. A bias circuit for impressing a bias voltage on the inputs of the inverters comprises first and second MOS transistor resistor elements connected in series across a power source and a third MOS transistor which is connected in parallel to the second MOS transistor, and whose gate is supplied with a control voltage so that the inverters are respectively biased to the optimum operation point for comparison through adjustment of the control voltage. With another embodiment of this invention, the respective inverters are automatically biased to the optimum operation point for comparison by detection of the bias voltage of inverters.

Constant voltage threshold device

Abstract: Disclosed is a constant voltage threshold device for providing a substantially constant voltage across a pair of terminals. The threshold device includes a field effect device having source and drain regions formed into an isolated semiconductor region which, in turn, is formed into a substrate. The distance between the drain region of the field effect device and the substrate is directly related to the threshold voltage of the threshold device. The threshold voltage is also determined by the relative doping levels of the various semiconductor regions and the value of various fixed biasing potentials applied to the various electrodes of the threshold device.

Back gate bias voltage generator circuit

Abstract: A back gate bias voltage generator circuit consists of three MOS transistors (Q4, Q5, Q6) with a separate load element (Q1, Q2, Q3) coupled to the drain of each and a voltage clamp (Q7) connected to an output terminal (16). A terminal at the potential of a power supply (VCC) serves as one input and a terminal at the substrate potential (VSub) serves as another input. When the power supply (VCC) potential and the substrate potential are within normal operating ranges, the output terminal (16) assumes a reference potential (VSS). The potential of the output terminal increases in magnitude if either of the two input potentials (VSS, VSub) goes outside preselected operating ranges.

Radiation Hardened N-Buried Channel CCD's Using Backside Phosphorus Gettering

Abstract: This paper describes the ionizing radiation effects on 4-phase n-buried channel 128 bit CCD shift registers with a polysilicon overlapping polysilicon gate structure which were fabricated with a radiation hardened process plus backside phosphorus gettering. These CCDs have the state of the art performance with the charge transfer efficiency better than 0.99995, and 5 nA/cm2 dark current density. They are operable to doses of at least 1X106 rads without changing any biasing conditions. The threshold voltage shifts are

Thermally Stimulated Currents from Non-Treated Poly(ethlene Terephthalate) Films

Abstract: Thermally stimulated current (TSC) is obtained under a small bias voltage from commercial poly(ethylene terephthalate) films without any previous treatment. A TSC peak appears around 85°C during the initial heating at the heating rate of 0.67°C/min, but no peak can be detected during reheating. Effects of sorbed water and elongation on the TSC peak are discussed. The peak is possibly due to the dipoles made up from several repeat units produced by internal stress introduced in the manufacturing process.

Breakerless flywheel magneto ignition system

Abstract: In a flywheel magneto ignition system, opposite terminals of the primary winding are respectively connected with the collector and emitter terminals of a transistor device. A biasing coil, inductively coupled with the magneto armature core, has its terminals respectively connected to the transistor base and emitter terminals to bias the transistor on during an interval terminating at the time of ignition. An SCR, non-conductive during said interval, is connected for short circuiting the biasing coil. A trigger coil, connected with the SCR gate through a zener diode, provides gating current for the SCR at the time of ignition. A diode in series with the biasing coil and the base-emitter junction of the transistor ensures fast transistor turn-off.

Determination of surface‐ and bulk‐generation currents in low‐leakage silicon MOS structures

Abstract: A technique is presented in which, by appropriately biasing a circular MOS capacitor surrounded by an annular electrode, it is possible to directly measure generation currents from controllably depleted surfaces. Knowledge of the surface‐generation velocity from this measurement then facilitates the correction of the usual MOS relaxation data to account for generation effects at peripheral surfaces. From the measurements presented, it is demonstrated that the technique is particularly useful for assessing state‐of‐the‐art low‐leakage devices.

Audio amplifier output circuit

Abstract: A PNP/NPN complementary pair of common emitter connected output transistors are driven by separate differential amplifiers having unity feedback and biasing to prevent simultaneous operation. Only a single battery supply is required.

Power regulator for use with line signal repeaters which are remotely powered

Abstract: Operating power for line signal repeaters is fed over a transmission cable pair (signal line) which is susceptible to lightning strikes and, thus, to longitudinally induced currents in the DC power feed circuit. A symmetrical non-linear power regulator is connected between the signal line and the line signal repeater, and includes a high current shunt regulator which bypasses excessive induced currents. By so doing the adverse effects of these induced currents on the operation of the line signal repeater is minimized. A shunt voltage regulator provides the line repeater with a constant operating voltage when the line current (DC line power feed current plus induced currents) is greater than the minimum required bias current. When the potential at input terminals of the power regulator exceeds a predetermined value, a portion of the excess current is conducted through a blocking diode to charge an energy storage device. But, when the DC line power feed current and the induced current oppose each other the energy stored in the energy storage device is used to supplement the power feed current to just maintain the required repeater voltage, until the potential decreases below the operating voltage.