Showing papers on "Biasing published in 1979"

High-voltage circuit for insulated gate field-effect transistor

Abstract: A high-voltage circuit for insulated gate field-effect transistors (MOSFETs) is provided wherein two MOSFETs are connected in series, the source and gate of the first MOSFET being respectively used as a source terminal and gate terminal of the high-voltage circuit, the drain of the second MOSFET being used as a drain terminal of the circuit. First and second resistors are connected in series between the source terminal and the drain terminal, and a biasing voltage supply is connected between the juncture of both the resistors and the gate of the second MOSFET. By virtue of these connections the "on" resistance of the high-voltage circuit is improved due to the effect of the biasing voltage effect in bringing the second MOSFET into an "on" condition.

Sensing amplifier for floating gate memory devices

Abstract: An MOS sensing amplifier for sensing the binary state of floating gate memory devices in a read-only memory is disclosed The potentials on the column lines in the memory are held to a narrow voltage swing A pair of "zero" threshold voltage transistors having slightly different threshold voltages are used to maintain the potentials on these lines A potential developed from the column line is compared with a reference potential developed with a "dummy" biasing network and a "dummy" floating gate memory device

Singly-balanced active mixer circuit

Abstract: A singly-balanced active mixer circuit is disclosed for developing an IF signal by combining an RF signal and a local oscillator (LO) signal. The RF and LO signals are applied to a strip transmission line ring which provides balanced components of the LO signal to a pair of active devices arranged in an singly-balanced active mixer. The active devices are coupled directly, or via a balanced PI-network to the primary winding of an output transformer for application to the following IF stage of the radio receiver. DC biasing of the active devices is provided via a floating tap on the primary winding of the output transformer which is not bypassed at the input, LO and IF frequencies. The singly balanced active mixer circuit may be advantageously utilized in a radio having a receiver with broadband front-end RF selectivity.

Ignition apparatus for internal combustion engine

Abstract: PURPOSE:To prevent recirculation phenomenon and allow the stable electric discharge of an ignition plug to be continued by applying the noise voltage in the operating signals of a current-cut-off element to the control element for controlling the cut-off element. CONSTITUTION:The base resistance of a cut-off transistor 10 is divided into two parts 8A and 8B, and the collector of a controlling transistor 18 is connected between resistances 8A and 8B, and the emitter is grounded. The base of the controlling transistor 18 is connected with the output of an amplification circuit 6 through a condenser 17 and connected with the point which divides the power voltage through resistors 15 and 16, and a bias voltage is applied. The resistor 8A and the condenser 17 transmitts effectively only high frequency voltages such as noise voltage. The second turning-ON of the cut-off transistor 10 directly after the primary current of an ignition coil 13 is cut-off is removed.

Arrays of superconducting tunnel junctions as low‐noise 10‐GHz mixers

Abstract: Quasiparticle mixing (biasing at the gap voltage) was studied in arrays of small Pb‐O‐Pb tunnel junctions. Coherent mixing at 9 GHz gave a conversion loss as low as −5.8 dB and a single sideband mixer noise temperature of 10–40 K. The optimal conversion efficiency was obtained where the bias current microwave response was maximal. The arrays of junctions were rugged, and gave a good impedance match to external circuitry.

Reference voltage circuit using nested diode means

Abstract: A temperature-independent reference voltage is developed as the difference between the offset potentials across first and second diode means, the second nested within the first to conduct the same forward bias current.

Power generator for telemetry transmitter

Abstract: A voltage generator which provides the biasing voltage to a telemetry transmitter positioned inside the tire of a moving vehicle is disclosed. The entire transmitting system, including the antenna, is self-contained within the pneumatic tire; and, accordingly, there is no need for connecting wires of any nature to be extended outside the tire containing the invention. The invention utilizes one of several available types of voltage generators to generate a voltage in response to the rotation of the tire as the vehicle moves within a coil. As is known, as a tire rotates along a road, the tire deflects and flattens along the area which contacts the road. The transducer used in the invention generates a voltage in response to this tire deflection. The voltage thus generated are processed and utilized to provide the biasing voltage for a transmitter. Various measured parameters, such as tire pressure, temperature, inflation, and fatigue can then be provided from appropriately positioned and styled transducers and the measured telemetry signals transmitted by the transmitter to a receiver within the operator's compartment of the vehicle. The invention, therefore, is directed toward a means for providing the biasing voltage to the transmitter without the need for coupling to outside voltage sources or receiving equipment. Additionally, several transducers can be equally spaced around the parameter of the tire to thereby yield a biasing voltage which is more constant and higher in voltage than if a single voltage generator were utilized.

Switch-arc preventing circuit

Abstract: A switch-arc preventing continuous current circuit for protecting pulsing contact telephone exchange switches, the circuit having a first transistor in circuit with and controlled by a control transistor, the power electrodes of the first transistor being disposed in circuit between an inductive coil of a stepping solenoid and a protected switch, a bias voltage source connected to a terminal of the protected switch by a blocking diode and a pair of resistors in series, and a metal oxide varistor in shunt across the power electrodes of the first transistor.

Field effect transistor circuit arrangement

Abstract: In a circuit arrangement having a plurality of field effect transistors which are connected in series and operate simultaneously, the circuit arrangement is free from restriction of an operating frequency and it is not necessary to provide an individual power source for gate biasing, so that the construction of the circuit arrangement is simplified and the cost is reduced A gate drive pulse is applied to the gate of the field effect transistor (Q2) on a common potential point side A parallel connection circuit having a first resistor (R3) and a first capacitor (C3) is coupled between the gate of the other field effect transistor (Q1) and the common potential point side A parallel connection circuit having a second resistor (R4) and a second capacitor (C4) is coupled between the first electrode (eg drain) and the gate of the other field effect transistor A capacitance of the first capacitor is larger than that of the second capacitor, so that the other field effect transistor is sufficiently shifted to a conductive state when the gate drive pulse is applied to the field effect transistor on the common potential side

Transport processes of electrons in MNOS structures

Abstract: The transport processes of electrons in MNOS structures, especially in the SiO2 layer and the surface region of the Si substrate, have been investigated using p‐channel MNOS transistors with a relatively thick SiO2 layer to avoid the complexity of two‐carrier transport in the system. An induced junction technique utilizing the electron and hole separation properties of the transistor structure was used as a means of analysis. Theoretical derivation of the carrier multiplication factor, i.e., the number of electron‐hole pairs produced by an electron entering the Si from the SiO2, is calculated. It is experimentally shown that an electron entering the Si from the SiO2 produces approximately one electron‐hole pair in the low negative gate bias voltage range up to a critical voltage, and above this critical voltage the multiplication factor increases with increasing gate bias voltage. The former observation is in good agreement with the prediction of the theory, considering cascaded impact ionization of an electron with high energy in Si. The latter fact reveals that electrons in SiO2 become hot in the high voltage range. The critical voltage coincides with the value theoretically estimated using an LO phonon energy of 0.153 eV and an electron‐phonon scattering length of 1.74 A in SiO2. The mean free path of the electrons between scatterings by defects or other scattering centers in SiO2 is estimated to be about 30 A by analyzing gate bias dependence of the multiplication phenomena.

Bias adjustment responsive to signal power

Abstract: A distortion correction arrangement for a power amplifier which uses transistors is described. Biasing circuits are coupled to the transistor for biasing a transistor into a low-distortion conduction condition. The conduction condition of the transistor changes in response to the signal power being handled. Changes in signal power may therefore change the conduction condition to one of higher distortion. Bias control circuits are coupled to the transistor and to the bias circuit for controlling the bias in response to the signal power being handled. In a particular embodiment of the invention, the bias control circuits additionally respond to the rate of change of the signal power.

Characteristics of three-terminal metal-tunnel if oxide-n/p+ devices

Abstract: The device described here comprises a p + substrate containing an epitaxial n -layer, on the surface of which is grown a thin (∼50 A) tunnel oxide. A metal cathode is deposited on the oxide surface, and a metal anode on the back side of the p + substrate. A third terminal, the gate electrode, is connected to the n epilayer to provide for biasing the n - p + junction. The I-V characteristic exhibit two stable states: a high-impedance state and a low-impedance state which are separated by a negative-resistance region. The high-impedance state is stable for applied voltages up to the intrinsic threshold voltage, V s . When the switching voltage is exceeded, the device switches rapidly to the low-impendance state, which is characterized by a current that increases with little increase in the voltage across the device. The switching voltage may be reduced below V s by current or voltage biasing of the n - p + junction by means of the gate electrode. Gate efficiencies, the ratio of the change in switching voltage with d.c. gate voltage or current, of 10 V/V and 1.0 V/μA have been observed. Pulsed gate measurements are also presented, and it found that for pulse widths down to 0.1 μs the gate switching characteristics follow the d.c. characteristics. For pulse widths less than 0.1 μs the gate efficiencies are degraded. Suggestions for improving the device characteristics and the turn-on and turn-off time of the device and device reliability are discussed.

IGFET Bootstrap circuit

Abstract: An improved IGFET bootstrap driver circuit capable of driving a load impedance to substantially full VDD power supply voltage and holding the load at that voltage for an indefinite period of time. The circuit includes a load transistor, a feedback capacitor connected between the source and gate electrodes of the load transistor, a fix valued resistor connected between the gate electrode of the load transistor and an on-chip bias voltage generating circuit for providing a bias voltage greater than VDD+VT. The resistor and the bias voltage generating circuit provide sufficient current to replenish the charge lost from the feedback capacitor through junction leakage currents in the driver circuit. The resistor is of a sufficiently high value such that the current drain from the generating circuit is insignificantly small in comparison to the current drain from the VDD power supply. The improved circuit also permits the load transistor to be switched "on" or "off" by an externally applied signal.

Brightness control circuit for a vacuum fluorescent display

Abstract: A circuit for controlling the brightness of a vacuum fluorescent display having filament terminals and connected to anode or segment biasing means includes a transformer having a filament winding connected to the filament terminals. The transformer is driven by a 60-cycle power source. An electronic switch, including a transistor, is connected between a center tap of the filament and the anode biasing means (at a common ground) and circuit means open and close the switch at a 60-cycle rate. The ratio of time during which the switch is closed to the time during which the switch is open is variable to control the brightness of the display.

Method of detecting a cathodic corrosion site on a metallized substrate

Abstract: A method of detecting a cathodic corrosion site on a metallized substrate comprises depositing molecules of a pH sensitive fluorescent dye adjacent a metallic surface of the substrate, the metallic surface having a corrosion site thereon characterized by a reduction of the hydronium ion to hydrogen (2H + +2e - →H 2 ). An electrical bias is then applied across the metallic surface, and the fluorescent dye is exposed to ultraviolet (UV) radiation, whereby fluorescence is activated at the cathodic corrosion site.

Fabrication of Nb‐NbOx‐Pb Josephson tunnel junctions using rf glow‐discharge oxidation

Abstract: An rf glow‐discharge oxidation technique has been applied to the fabrication of Nb‐NbOx‐Pb Josephson tunnel junctions which exhibit quasiparticle current densities up to 104 A/cm2 at the sum of the gaps (i.e., junction resistances as low as 10−7 Ω cm2). The dependence of the impedance level and the shape of the junction V‐I curve on the oxidation parameters (e.g., oxidation time, rf bias voltage, the composition, and the pressure of the argon‐oxygen mixture) have been investigated. Good junctions were obtained by using very low rf peak‐to‐peak voltage (?60 V) and an oxidation period of 10 min or less. The junction resistance can be controlled by varying the partial pressure of oxygen (less than 3×10−4 Torr) while using a partial pressure of argon high enough (?10−2 Torr) to sustain a steady rf glow discharge. The results also indicate that sputter removal of niobium oxide is virtually absent in this rf glow‐discharge oxidation process. The dependence of the junction resistance on the glow‐discharge parame...

Side pincushion correction modulator circuit

Abstract: A side pincushion corrected deflection circuit for a television receiver includes a deflection winding, a trace capacitor and a first switch for generating scanning current in the deflection winding. A modulator circuit includes a modulator inductor, a modulator capacitance and a second switch for generating a sawtooth modulator current in the inductor. The trace and modulator capacitors are charged from a voltage source through a flyback transformer winding. Reflected load currents from other television receiver circuits also flow in the flyback transformer winding. A transistor stage in the modulator circuit shunts current away from the modulator capacitor to control the modulator and trace capacitor voltages. A vertical rate bias voltage is applied to the transistor stage and varies the shunt current at the vertical rate to provide side pincushion correction. The transistor stage is operated in an open loop manner with no voltage feedback of the modulator capacitor voltage. An additional bias voltage, representative of the load current flowing in the flyback transformer, is applied to the transistor stage in order to reduce undesirable load current modulation of the side pincushion correction.

Velocity matched optical gate

Abstract: The coupling between a pair of coupled wavepaths (11, 12) is modulated by means of a biasing wave travelling in synchronism with the signal in the coupled wavepaths. In particular, by limiting the coupling to a small interval about the zero crossover point of the biasing signal, subpicosecond pulses can be generated by means of a simple sine wave biasing signal. Such a velocity matched gate can be employed as a pulse generator; a modulator; a multiplexer/demultiplexer; and pulse shape analyzer.

Bias voltage controlled developing system in an electrophotographic copying machine

Abstract: An electrophotographic copying machine is disclosed comprising an image formation section for forming an electrostatic latent image on a photosensitive drum, and a magnet brush developing unit for developing the electrostatic latent image through the use of toner. A bias voltage is applied between the photosensitive drum and the magnet brush developing unit. A humidity sensor is disposed in the electrophotographic copying machine to develop an output signal indicative of the humidity in the electrophotographic copying machine. A bias voltage control circuit is associated with the humidity sensor for selectively determining the bias voltage at a higher value when the humidity exceeds a preselected threshold value. When the humidity is below the preselected threshold value, the bias voltage is held at a lower value.

Constant-current circuit

Abstract: A constant-current circuit is especially well-suited for construction as a semiconductor integrated circuit, and it is stable over a wide range of variations in power potential. The constant-current circuit produces first to third biasing potentials. A first current source produces a first current responsive to the first bias potential. A second current source produces a second current responsive to the second bias potential, and a third current source produces a third current responsive to the third bias potential. A constant current output is obtained by subtracting the second current from the sum of the first and third currents.

Inverted microstrip phase shifter

Abstract: The inverted microstrip phase shifter consists of a substrate having at least one diode and biasing circuitry connected to one side and at least one center conductor connected to its opposite side. The substrate side containing a center conductor is enclosed within a hollow case so as to form an rf transmission line. The parameters for the biasing circuitry are selected by performing a computer optimization of the chain matrix equivalent expression for the voltage transmission coefficient.

Directional coupler switch in molecular‐beam epitaxy GaAs

Abstract: An 8‐mm‐long rib waveguide directional coupler has been made from a n (1×1016 cm−3) GaAs layer grown by molecular‐beam epitaxy. By reverse biasing the ’’stepped Δβ’’ Schottky electrodes with less than 30 V, more than 17 dB power isolation has been achieved at 1.06 μm for both switching states. Improvements are expected with the progress in layers morphology and doping level. This is a new step towards the feasibility of optoelectronic devices by a growth technique which is very attractive for GaAs integrated circuits.

Sampling circuit and method therefor

Abstract: A sampling circuit and method therefor including a first Josephson junctionor producing a series of sampling pulses for activating a second Josephson junction that is receptive of both the analog current signal being sampled and a bias current. The first Josephson junction is continually triggered at a fixed time relative to the repetitive analog signal to provide a series of sampling pulses and before each sampling pulse the bias level to the second Josephson junction is changed until the sum of the current from the sampling pulse, from the analog signal, and from the bias source exceeds the critical current value of the second Josephson junction causing it to switch from one voltage state to another. The value of the bias current at the point of switching is proportional to the current in the analog signal. In one embodiment, the bias current is increased in a step-like fashion for each sampling pulse from the first Josephson junction until the critical value of the second Josephson junction is reached. The resolution of the analog signal for this embodiment is 1/N if there are N samples. In another embodiment where the analog signal is known to exist between two extremes, the bias current for the first sample is initially positioned at a mid-range value between the extremes. If, at the sample time, the second Josephson junction is switched, the bias current for the next sample is reduced by 1/2. If the second Josephson junction has not switched, the bias current is increased by 1/2 for the next sample. This process continues for N samples, the resulting resolution being 1/2 N .

Electro optical modulation system

Abstract: An electro optical modulation system utilizes electro optical effect of a crystal. The electro optical modulation system comprises a voltage comparator for comparing a modulated light intensity signal with a reference voltage; and a bias controlling device which feeds a differential signal between mean value signal of the output of the voltage comparator and mean value signal of the inverted output of the voltage comparator, to an optical modulator as a bias voltage.

Reverse development method

Abstract: A reverse development is performed with application of development bias voltage to a development sleeve at the time of development, and the polarity of the bias voltage is reversed or the bias voltage is reduced to zero at the time of non-development. Furthermore, positive images and negative images can be selectively formed by changing the voltage to be applied to a charge injection electrode, without changing the bias voltage to be applied to the development sleeve.