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Showing papers on "Biasing published in 1981"


Patent
23 Feb 1981
TL;DR: In this paper, the bias field is supplied at an angle of approximately 45° with respect to the direction in which the bias current flows in each current path; and the source of external magnetic field generates a signal field whose polarity gradually decreases and then changes over to an opposite polarity at a boundary region.
Abstract: The magnetic field sensing apparatus includes first and second magnetoresistive elements having respective angularly disposed current path portions through which a bias current flows and to which a bias magnetic field is supplied. An external magnetic signal field is supplied from a magnetic source, and the magnetoresistive elements are relatively displaceable with respect to this source. The bias field is supplied at an angle of approximately 45° with respect to the direction in which the bias current flows in each current path; and the source of external magnetic field generates a signal field whose polarity gradually decreases and then changes over to an opposite polarity at a boundary region. This change in the signal field is sensed by the magnetic sensor as it is relatively displaced, thereby producing an output signal that varies substantially linearly with this displacement over a predetermined range on both sides of the boundary region.

55 citations


Journal ArticleDOI
TL;DR: In this article, the effects of optical input power, feedback gain, biasing phase retardation, and delay on the instability of an electrooptic bistable device with a delayed feedback voltage are discussed theoretically and experimentally.
Abstract: Instability of an electrooptic bistable device with a delayed feedback voltage is discussed theoretically and experimentally. The effects of optical input power, feedback gain, biasing phase retardation, and delay on the instability are described, and the sustained oscillatory optical output is generated under the unstable condition. A quasi-chaotic behavior of the device is also shown.

52 citations


Patent
23 Mar 1981
TL;DR: In this paper, a majority carrier rectifying barrier semiconductor device housing a planar doped barrier is described. But the device is fabricated in GaAs by an epitaxial growth process, which results in an n+ -i-p+ −i-n+ semiconductor structure wherein an extremely narrow p+ planar Doped region is positioned in adjoining regions of nominally undoped (intrinsic) semiconductive material.
Abstract: Disclosed is a majority carrier rectifying barrier semiconductor device housing a planar doped barrier. The device is fabricated in GaAs by an epitaxial growth process which results in an n+ -i-p+ -i-n+ semiconductor structure wherein an extremely narrow p+ planar doped region is positioned in adjoining regions of nominally undoped (intrinsic) semiconductive material. The narrow widths of the undoped regions and the high densities of the ionized impurities within the space charge region results in rectangular and triangular electric fields and potential barriers, respectively. Independent and continuous control of the barrier height and the asymmetry of the current vs. voltage characteristic is provided through variation of the acceptor charge density and the undoped region widths. Additionally, the capacitance of the device is substantially constant with respect to bias voltage.

47 citations


Journal ArticleDOI
TL;DR: In this paper, the carbon-to-titanium ratio was found to be 0.98 at zero bias voltage and it increases with bias voltage up to -200 V where it reaches a maximum of 1.08.

46 citations


Patent
09 Mar 1981
TL;DR: In this article, a scanning spectrometer incorporating a scanning diode laser powered with a controllable injection current is described, where the laser output is directed via a beam splitter to both sample and reference cells.
Abstract: A scanning spectrometer incorporating a scanning diode laser powered with a controllable injection current. The injection current control may be set at predetermined discrete levels. These levels may be varied in accordance with signals derived from a servo loop, and may have superimposed upon them a cyclically varying substantially constant amplitude current. The laser output is directed via a beam splitter to both sample and reference cells. The material in the reference cell is so selected as to provide absorption features at each of the desired frequencies. The cyclically varying current is provided with an amplitude sufficient to cause a frequency amplitude at least as great as the maximum breadth of each of these spectral features of interest. The preselected bias currents are selected so as to provide lasing action of the diode at or near each of the selected frequencies. A phase-locked amplifier tuned to the frequency of the cyclically varying current senses the position of the scanned laser output relative to that of the associated absorption feature and provides an error signal to adjust the bias current so as to center the cyclically scanned laser frequency on the selected absorption feature.

45 citations


Journal ArticleDOI
TL;DR: The design and operation of a 100 junction array fabricated using photolithography produced stable quantized voltages up so 27 mV when operated at 20 GHz.
Abstract: Levinsen et al. have suggested that the voltage level of the Josephson-effect voltage standard might be increased by using a series array of highly hysteretic junctions which have rf-induced steps crossing the zero current axis. If the Phase lock condition which yields quantization is stable then biasing the array at zero current insures that the voltage across each junction will be quantized, eliminating the need to individually bias the junctions. Here we describe the design and operation of a 100 junction array fabricated using photolithography. The array produced stable quantized voltages up so 27 mV when operated at 20 GHz.

45 citations


Patent
Roger A. Whatley1
14 Dec 1981
TL;DR: In this paper, a bias current reference circuit is described, where a first diode-connected bipolar device is connected in series with an MOS device to develop a reference voltage which is proportional to the bias current.
Abstract: A bias current reference circuit is disclosed having a first diode-connected bipolar device connected in series with an MOS device to develop a reference voltage which is proportional to a bias current. The reference voltage is used by an MOS device connected in series with a resistor which is connected in series with a second diode-connected bipolar device to develop a reference current which is proportional to the difference in the base to emitter voltages of the two bipolar devices. The reference current is used by a diode-connected MOS device to develop a bias voltage which is proportional to the reference current. The bias voltage in turn is used by another MOS device to develop the bias current in proportion to the bias voltage. The bias voltage is also used by other MOS devices to provide similar bias currents. In the disclosed embodiment, such a bias current can be used by a diode-connected CMOS device to develop a complementary bias voltage.

41 citations


Patent
07 Dec 1981
TL;DR: In this paper, the authors propose a back bias voltage that is feedback controlled as a function of the sum of the positive threshold voltage of one field effect transistor (FET) and the negative threshold voltage (NVR) of a second FET.
Abstract: A semiconductor circuit supplies a substrate back bias voltage that is feedback controlled as a function of the sum of the positive threshold voltage of one field-effect transistor (FET) and the negative threshold voltage of a second FET. Preferably, one of the FET's is an enhancement-mode device, and the other is a like-polarity depletion-mode device. This arrangement enables the bias voltage to vary from chip to chip in such a manner as to speed up the logic gates on a chip containing the slowest gates and to slow down the logic gates on a chip containing the fastest logic gates, thereby decreasing the chip-to-chip spread in gate propagation delay and average power dissipation. The worst-case noise margin increases slightly.

38 citations


Patent
Roger A. Whatley1
23 Oct 1981
TL;DR: In this article, a bias current reference circuit is disclosed having a diode-connected bipolar device connected in series with an MOS device to develop a reference voltage which is proportional to the bias current.
Abstract: A bias current reference circuit is disclosed having a diode-connected bipolar device connected in series with an MOS device to develop a reference voltage which is proportional to a bias current. The reference voltage is used by an MOS device connected in series with a resistor to develop a reference current which is proportional to the reference voltage. The reference current is used by a diode-connected MOS device to develop a bias voltage which is proportional to the reference current. The bias voltage in turn is used by another MOS device to develop the bias current in proportion to the bias voltage. The bias voltage is also used by other MOS devices to provide similar bias currents. In the disclosed embodiment, such a bias current is used by a complementary diode-connected MOS device to develop a complementary bias voltage. The complementary bias voltage may be used to develop start-up bias current in the event the bias current reference circuit fails to provide a suitable bias voltage.

35 citations


Patent
15 Oct 1981
TL;DR: In this article, a transfer roller for use in a retention type copying machine is connected through a current limiting resistor having a high resistance value of 100 M Ω to 1000 MΩ to a transferring bias voltage source.
Abstract: In a transfer roller for use in a retention type copying machine, a semiconductive transfer roller is connected through a current limiting resistor having a high resistance value of 100 MΩ to 1000 MΩ to a transferring bias voltage source. A pair of auxiliary transfer rollers made of conductive material are arranged on respective sides of the transfer roller. The auxiliary transfer rollers are connected to the transferring bias voltage source through a potentiometer. To the transfer roller is applied a first transferring bias voltage of 600 to 900 volts and to the auxiliary transfer rollers is applied a second transferring bias voltage of 400 to 650 volts. When a resistance of a record paper is decreased due to high humidity, the first transferring bias voltage is automatically decreased and the second transferring bias voltage becomes predominant.

31 citations


Patent
17 Dec 1981
TL;DR: In this paper, a direct current power controller for aircraft control circuits is described, where a bias voltage supply circuit powers a gate driving circuit, current limiting circuit, and trip indicating circuit.
Abstract: A direct current power controller for use in electrical control systems such as aircraft control circuits. The controller utilizes a field effect transistor (FET) as the switching element. A bias voltage supply circuit powers a gate driving circuit, current limiting circuit, and trip indicating circuit. Gate driving circuitry is not directly connected to the system ground, thus minimizing load interference with controller performance and eliminating the need for level shifting circuitry. Remote control circuitry is provided.

Patent
28 Oct 1981
TL;DR: In this paper, the negative substrate bias voltage is generated by a charge pump operating under the control of a two-phased output oscillator, the operation of which is enabled and disabled by the output signals from a MOS memory overcurrent sensor, an undercurrent sensor and a bias voltage level sensor.
Abstract: A regulated substrate bias voltage generating system for maintaining a minimum data retaining current through an associated MOS memory. The negative substrate bias voltage is generated by a charge pump operating under the control of a two-phased output oscillator, the operation of which is enabled and disabled by the output signals from a MOS memory over-current sensor, a MOS memory under-current sensor, and a bias voltage level sensor.

Journal ArticleDOI
TL;DR: Expressions assuming a simple square-law MOSFET model are presented for the low-frequency harmonic distortion of an enhancement-mode source follower, and the distortion of the depletion-load inverter is the highest among the three circuits, but is practically independent of process parameters.
Abstract: Expressions assuming a simple square-law MOSFET model are presented for the low-frequency harmonic distortion of an enhancement-mode source follower. These theoretical results are compared to measurements of several integrated versions of the three circuit types. For a given fabrication process, the main factors determining the amount of distortion for all three circuits are the quiescent output voltage and the output swing; to a first order, the distortion does not depend on bias current or device geometries. The distortion of an enhancement-mode source follower has a similar behavior to that of an enhancement-load inverter with the same output quiescent voltage and output swing; both distortions are nearly proportional to the body-effect coefficient. For the same output quiescent voltage and output swing, the distortion of the depletion-load inverter is the highest among the three circuits, but is practically independent of process parameters.

Journal ArticleDOI
TL;DR: In this article, the spectral determination of bias voltage is justified by the close agreement between the threshold voltage determined by spectral analysis and the voltage determined from extrapolation of directly measured light versus voltage data.
Abstract: Spontaneous emission spectra and intensity measurements are made on buried heterostructure lasers with transparent windows above the active stripe. The bias voltage V, where eV is the separation of quasi‐Fermi levels, is determined from spectral measurements. The total luminescence intensity increases as exp(eV/nkT), where n changes from 1.0 to about 2 as V increases from 1.3 V to the threshold voltage of 1.415 V. The change in n is due primarily to saturation of the low‐energy electron states as a result of electron degeneracy. The spectral determination of bias voltage is justified by the close agreement between the threshold voltage determined by spectral analysis and the voltage determined by extrapolation of directly measured light versus voltage data. Calibration of the absolute radiative rate with optical absorption data yields a predicted radiative recombination current of Jth/d≊5.8 kA cm−2 μm−1, in reasonable agreement with empirical threshold data.

Patent
Emsley H. Stevens1
26 May 1981
TL;DR: In this article, the threshold voltage control circuit includes a reference (FET) which is electrically connected to the other FETs so that threshold voltage of the reference FET determines the threshold voltages of the other fETs.
Abstract: A threshold voltage control circuit controls the threshold voltages of one or more field-effect transistors (FETs) of an integrated circuit. The threshold voltage control circuit includes a reference (FET) which is electrically connected to the other FETs so that the threshold voltage of the reference FET determines the threshold voltages of the other FETs. A bias voltage is applied to a gate of the reference FET and a current path is established between first and second supply terminals. This current path includes the drain and source of the reference FET. The current flowing in the current path is a function of the bias voltage applied to the gate of the reference FET and the threshold voltage of the reference FET. A high gain, high input impedance amplifier is connected to the current path and provides a threshold control signal to the reference FET (and the other FETs) which is a function of the current in the current path. The threshold control signal causes the threshold voltage of the reference FET to attain a value which maintains a predetermined current flow in the current path.

Journal ArticleDOI
TL;DR: In this article, surface electron mobility in the range of 600-700 cm2/Vs was measured at the lower Si-SiO2 interface and subthreshold source-drain leakage current of a few pA/μm (channel width).
Abstract: n‐channel deep‐depletion mode metal‐oxide‐semiconductor field‐effect transistors (MOSFET’s) have been fabricated in Si films prepared by zone‐melting recrystallization of chemical‐vapor deposited (CVD) polycrystalline Si deposited on SiO2‐coated Si substrates. The transistors exhibit surface electron mobility in the range of 600–700 cm2/Vs, comparable to values for devices fabricated in single‐crystal Si. Measurements of electron mobility as a function of gate bias voltage indicate that the mobility is nearly constant throughout the depth of the recrystallized Si films. Mobility of 650–700 cm2/Vs at the lower Si‐SiO2 interface and subthreshold source‐drain leakage current of a few pA/μm (channel width) have been measured.

Patent
15 Oct 1981
TL;DR: In this article, an improved substrate bias generator is disclosed for use in a capacitive charge storage integrated circuit memory device having an external voltage supply, which includes means for generating first and second timing signals, charge pumping, and voltage regulation means.
Abstract: An improved substrate bias generator is disclosed for use in a capacitive charge storage integrated circuit memory device having an external voltage supply. The generator comprises means for generating first and second timing signals, charge pumping means disposed for pumping positive charge from the substrate of the integrated circuit memory device in response to the first and second timing signals. Removal of the positive charge from the substrate polarizes the substrate at a negative potential, which is the generated bias voltage. A voltage regulation means is disposed between the output of the charge pumping means (i.e., the substrate) and the means for generating the timing signals. The voltage regulation means provides a reference potential that regulates the amount of charge pumped from the substrate as a function of the magnitude of the generated bias voltage. The voltage regulation means includes a voltage clamp circuit that is disposed for clamping the generated bias voltage to a limited negative value; a modulator circuit means disposed at the output of the voltage regulation means; and, a generator circuit means disposed at the output of the modulator circuit means for supplying the reference potential in response to the output voltage from the clamp circuit means as modified by the modulator circuit means.

Journal ArticleDOI
TL;DR: In this article, surface band bending effects on the photoluminescence (PL-) intensity in n-InP Schottky and MIS diodes were studied, and the bias dependence curve of the PL-intensity was found to be quite different from those obtained for Si, Ge and GaAs with large surface recombination velocity.
Abstract: Surface band bending effects on the photoluminescence (PL-) intensity in n-InP Schottky and MIS diodes were studied. The bias dependence curve of the PL-intensity for n-InP is quite different from those obtained for Si, Ge and GaAs with large surface recombination velocity. Remarkable depression and enhancement of the PL-intensity were observed in n-InP with application of reverse and forward bias voltages. The maximum PL-intensity was achieved at the flat-band bias condition in Schottky diodes. In MIS diodes, the PL-intensity increased when the forward bias voltage was more than the flat band voltage. PL-intensity variation with surface band bending for Schottky and MIS diodes can be explained well using a surface dead layer model in the depletion condition and a surface excess carrier model in the accumulation condition.

Patent
21 Aug 1981
TL;DR: In this article, a two-way voice communication instrument with a microphone and a transducer is described, which includes a transmit-receiver circuit system comprising a transmit conditioning circuit and a receiver conditioning circuit.
Abstract: A voice communication instrument system for two-way voice communication is disclosed. The system includes a voice communication instrument having a microphone and a receiver transducer, and a transmit-receiver circuit system comprising a transmit conditioning circuit and a receiver conditioning circuit. The transmit conditioning circuit provides amplification and frequency response correction of microphone electrical voice signals. The receiver conditioning circuit provides linear compression limiting, amplification, and, if desired, frequency response correction to an incoming electrical voice signal prior to introduction to the receiver transducer. The receiver conditioning circuit is powered from the transmit circuit D.C. output voltage, at low voltage and low current. The receiver conditioning circuit has a transformerless input circuit, and further includes bias current control to the various circuit stages to eliminate the effects of supply voltage fluctuations.

Journal ArticleDOI
TL;DR: In this article, numerical computations on a sine-Gordon model of the Josephson junction fluxon oscillator are compared with experimental measurements, and good agreement is found for the voltage current characteristic, oscillator power output, and range of current bias over which oscillation is observed.
Abstract: Numerical computations on a sine‐Gordon model of the Josephson junction fluxon oscillator are compared with experimental measurements. Good agreement is found for the voltage current characteristic, oscillator power output, and range of current bias over which oscillation is observed. Our numerical results imply a ’’bunched‐fluxon’’ mode of oscillation at larger values of bias current.

Journal ArticleDOI
TL;DR: In this paper, photo effects in common-source and common-drain mode GaAs MESFET oscillators show that the common source mode oscillator has an optical-frequency sensitivity approx. 5 times higher than that of the common drain mode, principally caused by the oscillator frequency dependence upon C gs.
Abstract: Photoeffects in common-source and common-drain mode GaAs MESFET oscillators show that the common-source mode oscillator has an optical-frequency sensitivity approx. 5 times higher than that of the common-drain mode, principally caused by the oscillator frequency dependence upon C gs . Although the photoinduced frequency change can be duplicated by a small decrease (0.2–0.6 V) in gate bias voltage, 1 MHz capacitance data indicates that a change in the effective space charge density in the gate depletion layer (not a change in built-in voltage) is the source of the C gs variation.

Patent
27 May 1981
TL;DR: In this paper, a hysteresis circuit is added to a differential comparator to provide a predetermined bias current from one of two input transistors connected in a differential configuration, and a current mirror structure is used to accurately determine the amount of current which is shunted when the output of the comparator is in a predetermined state.
Abstract: A hysteresis circuit is added to a differential comparator to provide a predetermined bias current from one of two input transistors connected in a differential configuration. A current mirror structure is used to accurately determine the amount of current which is shunted when the output of the comparator is in a predetermined state.

Patent
20 Aug 1981
TL;DR: In this paper, the authors proposed to separate a photoelectric conversion region from a charge storage region to shorten the distance between a transfer gate and the farthest part of the charge storage regions.
Abstract: PURPOSE:To shorten a charge transfer time considerably, by separating a photoelectric conversion region from a charge storage region to shorten the distance between a transfer gate and the farthest part of the charge storage region CONSTITUTION:Barrier electrode 30 is provided to keep relation VST>VBE between applied constant bias voltage VBE and bias voltage VST applied to storage electrode 9 Signal charge subjected to photoelectric conversion by the light incident to the P-N junction photo diode formed by N type impurity layer 7 and substrate 8 is flowed into storage region 8-b over potential barrier 32 at any time Consequently, all signal charge subjected to photoelectric conversion is stored only on semiconductor surface 8-b opposite to electrode 9 After a prescribed time, the surface potential of region 8-c is fluctuated to broken line 21 by applying a positive voltage to the transfer gate through voltage supply line 14, and the stored signal charge flux is transferred to the charge coupling device Since storage charge is stored only in region 8-b, the time required for transfer is dependent upon only the storage electrode length, and as a result, the transfer time of signal charge is shortened considerably

Journal ArticleDOI
TL;DR: In this article, the effects of optically generated minority carrier current on the etching behavior of n-type GaAs in 1-M KOH aqueous solution were studied.
Abstract: The effects of optically generated minority‐carrier current on the etching behavior of n‐type GaAs in 1‐M KOH aqueous solution were studied. It was observed that the etch rate depends on the minority‐carrier current flow through the interface, which is controlled by the bias voltage. The etch rate is considerably reduced under open‐circuit conditions as compared to short‐circuit conditions. This effect simulates a self‐limiting photoetching process for the thickness trimming of thin films, which is necessary for several device applications.

Patent
20 May 1981
TL;DR: In this paper, the impurity concentrations in the hook structure, their distribution profiles, materials of layers forming the hook, and their thicknesses are selected as to optimize the carrier storage function of the hook structures, thereby permitting the non-destructive readout of the optical information.
Abstract: A semiconductor image sensor of wide dynamic range, high sensitivity, low noise and high image clarity, which is provided with a hook structure for detecting radiant energy input information, a readout transistor and means for refreshing stored optical information and which is capable of non-destructive readout of optical information, and a method of operating such a semiconductor image sensor. The impurity concentrations in the hook structure, their distribution profiles, materials of layers forming the hook structure and their thicknesses are so selected as to optimize the carrier storage function of the hook structure, thereby permitting the non-destructive readout of the optical information. The ratio between the junction capacitance and the earth capacitance of a floating pn junction establishing a potential barrier in the hook structure is selected so that a stored voltage in the floating pn junction and the readout sensitivity may become maximum. By repeating the non-destructive readout, as integrated value of the quantity of incident light is read out. The time interval to a first operation of the readout transistor after the operation of a refresh pulse signal is selected in accordance with the quantity of the incident light, by which an electric signal proportional to the quantity of the incident light can be read out. The refresh operation is performed by applying a pulse voltage in such a manner that a bias voltage may be provided to a substrate electrode or surface electrode in a light integration period alone and, in the refresh period, the pulse voltage is made zero or negative.

Journal ArticleDOI
TL;DR: In this article, the authors studied the propagation of two fluxons on an overlap-geometry Josephson tunnel junction of length 10l, having a McCumber bc = 5r, by numerical integration of the circuit equations of a 100-section lumped resistive shunted junction type.
Abstract: Resonant propagation of two fluxons on an overlap‐geometry Josephson tunnel junction of length 10l, having a McCumber bc = 5r is studied by numerical integration of the circuit equations of a 100‐section lumped resistive shunted junction type (RSJ) model. Two different modes of propagation are observed: a symmetric fluxon‐antifluxon mode and an asymmetric fluxon‐fluxon mode. Which mode is stable depends on the value of the bias current. The existence of these two modes gives rise to a fine structure in the second zero‐field step in the dc current‐voltage characteristic of the junctions and to very different power spectra of the associated radiation emitted from the junction.

Patent
24 Apr 1981
TL;DR: In this article, a biasing circuit for a non-switching type power amplifier includes first and second DC voltage supply terminals, at least one input resistor and at least two output transistors, each having a main current path and an input electrode.
Abstract: A biasing circuit for a non-switching type power amplifier includes first and second DC voltage supply terminals; at least one input resistor; first and second output resistors; first and second output transistors, each having a main current path and an input electrode, the input electrodes of which are connected to the at least one input resistor, and the main current paths of which are connected in series between the first and second DC voltage supply terminals through the first and second output resistors, the connection point of the first and second output resistors constituting a signal output terminal; a signal input circuit for supplying an input signal to the input electrodes of the first and second output transistors, through the at least one input resistor; third and fourth DC voltage supply terminals; a series circuit comprised of a at least one input variable current source, the first resistor and a second variable current source, the series circuit being connected between the third and fourth DC voltage supply terminals; a voltage detecting circuit for detecting one of the voltages across the first and second output resistors or one of the voltages supplied to the input electrodes of the first and second output transistors; and a control circuit for controlling at least one of the first and second variable current sources in accordance with the detected output of the voltage detecting circuit.

Patent
10 Dec 1981
TL;DR: In this article, an injection laser is provided with a modulator which includes an external resonator cavity including a lithium niobate crystal and a spherical mirror closely coupled to the rear end of the laser with a source of bias voltage for selectively tuning the resonator for high frequency modulating the laser.
Abstract: An injection laser is provided with a modulator which includes an external resonator cavity including a lithium niobate crystal and a spherical mirror closely coupled to the rear end of the laser with a source of bias voltage for selectively tuning the resonator for high frequency modulating the laser.

Patent
10 Dec 1981
TL;DR: An internal bias generator for providing a negative bias voltage to the substrate of an MOS integrated circuit at a magnitude higher than the power supply voltage includes a pump circuit which comprises a plurality of switches which are sequentially actuated by nonoverlapping clock signals to alternately charge and discharge a capacitor.
Abstract: An internal bias generator for providing a negative bias voltage to the substrate of an MOS integrated circuit at a magnitude higher than the power supply voltage includes a pump circuit which comprises a plurality of switches which are sequentially actuated by nonoverlapping clock signals to alternately charge and discharge a capacitor. The clock signals are produced by a generator which includes a series of RC-delay inverting amplifier stages coupled to a series of NOR gates. The bias generator further comprises a threshold-sensitive regulator which uses the source-body effect of substrate bias on the threshold voltage of an MOS FET to control the magnitude of the applied bias voltage. When the sensed threshold voltage deviates from a desired level, certain of the clock signals are disabled, thereby to modify the bias voltage applied to the substrate in a manner to tend to restore the threshold voltage to its desired level.

Journal ArticleDOI
TL;DR: In this article, a simple one-dimensional model for the electrical and thermal behavior of a bipolar transistor is proposed and the triggering mechanism for second breakdown in the case of forward base current and reverse base current is described.
Abstract: Suggests a simple one-dimensional model for the electrical and thermal behavior of a bipolar transistor. The proposed model can be embedded in an external circuit and analyzed by an appropriate circuit analysis program. Existence of multiple equilibrium points for certain biasing conditions is demonstrated and their implication upon the transient behavior of a device is discussed. The triggering mechanism for second breakdown in the case of forward base current, as well as reverse base current, is described in the light of these multiple equilibrium points. Prediction of that part of the safe operating area boundary limited by second breakdown is reported. The results compare favorably with the manufacturer's recommended limit.