Showing papers on "Biasing published in 1992"

Single-Electron Pump Based on Charging Effects

Abstract: We have designed and operated a device consisting of three nanoscale tunnel junctions biased below the Coulomb gap. Phase shifted r.f. voltages of frequency f applied to two gates "pump" one electron per cycle through the device. This is shown experimentally by plateaus in the current-voltage characteristic at I = ± ef, the sign of the current depending on the relative phase of the r.f. voltages and not on the sign of the bias voltage.

High frequency power amplifier

Abstract: In a base-bias-control-type high-frequency power amplifier with a plural stage configuration, a rising voltage of a base bias current supplied to an initial stage transistor is made lower than a rising voltage of a base bias current supplied to a second stage transistor by a bias circuit, and a difference between the both voltages is set to be smaller than a base-emitter voltage of an amplifying stage transistor. Also, a rising voltage of a base bias current supplied to a third stage transistor is made equal to the rising voltage of the base bias current supplied to an initial stage transistor. Accordingly, a technology capable of improving the power control linearity can be provided in a high-frequency power amplifier used in a polar-loop transmitter or the like.

Low-frequency noise properties of N-p-n AlGaAs/GaAs heterojunction bipolar transistors

Abstract: The low-frequency noise characteristics of N-p-n Al/sub x/Ga/sub 1-x/As/GaAs heterojunction bipolar transistors (HBTs) have been investigated as a function of bias current, device geometry, extrinsic-base-surface condition, Al mole fraction in the emitter, and temperature in order to identify the dominant noise mechanisms. These measurements show the existence of three distinct regions in the noise spectra: a 1/f noise line shape, a Lorentzian spectrum (noise 'bump'), and a white-noise region. The 1/f noise is attributed to fluctuations in the extrinsic-base surface recombination current. The noise bump is generated by an AlGaAs trap in the emitter-base junction. The DX center was identified as a possible candidate for this trap. It is shown that for 4- mu m*10- mu m emitter AlGaAs/GaAs HBTs, the use of a depleted, AlGaAs passivation ledge over the extrinsic-base surface typically reduced the 1/f base noise current by a factor of 10, and the reduction of the Al mole fraction from 0.3 to 0.2 decreased the magnitude of the noise bump by a factor of 3. >

Radial current in a tokamak caused by a biased electrode

Abstract: It is demonstrated that measurements of radial electric currents excited from biased electrodes in TUMAN 3 and other tokamaks provide a crucial test in validating different models for L-H transitions. The results are assessed from the viewpoint of a previously developed theory, which is briefly described. There is evidence from the voltage-current characteristics in TUMAN 3 which corroborates features of this theory. A spontaneously occurring Ohmic H-mode is switched off when a substantial positive biasing voltage is applied to the electrode

Constant-voltage diode for over-voltage protection

Abstract: A constant-voltage diode has a first semiconductor region of a first conductivity type, an adjoining semiconductor region of a second conductivity type, a third semiconductor region of the second conductivity type adjoining the second semiconductor region, and a fourth semiconductor region of the first conductivity type partially surrounded by the second semiconductor region. At low reverse biases between a cathode electrode and an anode electrode, the behavior of the device is determined by the pn junction between the first and second semiconductor regions. As the reverse biasing increases, the depletion layers of that junction will reach the fourth semiconductor region, but the reverse bias at this time is insufficient to break down that junction. A further increase of reverse bias causes breakdown of the pn junction between the third and fourth semiconductor regions. This effect is achieved by suitable impurity concentrations in the semiconductor regions. A plurality of fourth semiconductor regions may be provided, and a bi-directional structure can be obtained by providing a polarity reversed structure with the first semiconductor region in common.

Scanning probe microscope having cantilever and detecting sample characteristics by means of reflected sample examination light

Abstract: A scanning probe microscope comprises a cantilever having a conductive probe positioned near a sample, an actuator for moving the sample to and away from the probe, a circuit for applying a bias voltage between the probe and sample to produce a tunnel current therebetween, a circuit for detecting the produced tunnel current, a circuit for detecting the amount of displacement of the probe resultant from interatomic forces acting between atomics of the probe and sample, thereby producing signals, a circuit for providing the actuator for feedback in response to the output signals from the circuit to retain constant the distance between the probe and sample, thereby causing the actuator to move the sample, a circuit for forming an STS image data from the detected tunnel current, a circuit for forming an STM image data from the detected tunnel current, and a circuit for forming an AFM image data. Thus, the STS, STP and AFM images are separately obtained simultaneously.

Even order term mixer

Abstract: An even order term mixer for mixing two ac input signals includes two bipolar junction transistors (each having a base-emitter junction forward bias threshold voltage V T ) with mutually connected collectors and cross-coupled bases and emitters. Each transistor receives a dc emitter bias current I E and both transistors each receive two single-ended ac input signals V 1 (=|V 1 |.cos[2πf 1 t]) and V 2 (=|V 2 |.cos[2πf 2 t]). Each transistor mixes its two ac input signals V 1 , V 2 and produces a collector current representing the result thereof. The two collector currents sum at the interconnected collectors and produce across a resistor R C also connected thereto an ac output voltage V 0 having even order terms and virtually no odd order terms of the mixing products (e.g. sum of and difference between the frequencies) of the two ac input signals.

Radiation image detector with optical gain selenium photosensors

Abstract: A large area radiation imager having a scintillator, an amorphous selenium photosensor, and a non-linear high voltage protective device employs a selected biasing voltage between about 100 volts and 1000 volts at the selenium photosensor to cause the photosensor to exhibit avalanche multiplication. The photosensor has an area not less than about 100 square centimeters. The amorphous selenium is doped slightly with arsenic or arsenic and tellurium. The device is advantageously coupled to a data read and reset circuit to selectively read charge generated in pixels of the photosensor. The read and data circuit is protected from an overvoltage condition by the non linear high voltage protective device, such as a protective thin film transistor or a two terminal protective device. The protective TFT is structured to have a relatively thick gate dielectric layer, which thickness is selected to cause the protective TFT to have a threshold voltage corresponding to a desired protective voltage.

Low-voltage, low-power amplifier for magnetoresistive sensor

Abstract: Low noise, low power, low voltage amplifier circuits with a single ended input having no common mode rejection for concurrently biasing and amplifying signals generated by magnetoresistive (MR) elements in a disk file. The amplifier circuits comprise a single (grounded) supply voltage source. One terminal of each MR element and the conductive substrate of each MR element and the conductive substrate of each disk in the disk file are grounded to minimize transient conductive asperity currents. The head/disk assembly of the disk file is completely enclosed by a highly conductive electrostatically shielded metallic enclosure that operates as a Faraday cage and isolates leads connecting the MR elements with the amplifier circuit from large, fast rise/fall time voltage transients.

Output level control circuit for use in RF transmitter

Abstract: An output level control circuit for radio-frequency transmitter which intermittently transmits radio-frequency carrier waves such as seen in the TDMA radio communication system and the digital cellular mobile telephone system. The variable gain amplifier unit of this transmitter amplifies the transmitting signal to a predetermined output power level in response to a control signal, the output power level is detected by a detecting diode which receives the application of a temperature-compensated bias voltage, and the sum of the detected output and the bias voltage becomes the detection output to the control loop. The bias voltage of the detecting diode is stored by bias voltage detection circuit during the off-period of the transmitting signal, an input reference voltage that is supplied in synchronism with the turning-on of the transmitting signal and the stored bias voltage are added by reference signal addition circuit, and the added output is served as the reference voltage that corresponds to the predetermined output power level. A power control circuit generates the control signal in response to the added output and the detection output, and the control signal controls the output power level of the variable gain amplifier unit.

Nucleation enhancement for chemical vapor deposition of diamond.

Abstract: A method and apparatus for enhancing the nucleation of diamond by pretreating a substrate by electrically biasing a diamond film adjacent the substrate while exposing the substrate and the thus biased diamond film to a carbon-containing plasma The bias pretreatment may be maintained for a time period in the range of about 1 hour to 2 hours to achieve a high diamond nucleation density Alternatively, the biasing may be continued until diamond film formation is indicated by a change in reflectivity of the surface of the substrate The biasing pretreating may be used to nucleate diamond heteroepitaxially on a substrate having a surface film formed of a material having a relatively close lattice match to diamond, such as β-silicon carbide The apparatus includes a laser reflection interferometer to monitor the surface of the substrate The laser reflection interferometer is used to monitor growth of the diamond film and cooperates with a controller to control the processing parameters during the diamond growing process

Liquid crystal driving device

Abstract: PROBLEM TO BE SOLVED: To reduce a bias current in a differential, input part held at a stand-by state and the power consumption of a display system by operating only a bias current for a selected liquid crytal driving device SOLUTION: A bias current operation control signal 101 is generated from an RS flip flop(FF) to be set up by the first latch signal 1 out of latch signals 1, 2,, m generated from a shift control part 103 and reset by the final latch signal (m) The control signal 101 is generated from the shift control signals simultaneously with valid data and controls bias current operation so that a bias current is allowed to flow only in the input period of the valid data Although the operation of a bias current in a comparator is generally unstable immediately after its start, there is no trouble even when bias current operation is controlled simultaneously with the valid data in accoradance with the input timing of the vaid data, an operation clock period and the operation speed of the comparator, so that the operation of a bias power supply is started simultaneously with the input of the valid data and the bias current is stopped simultaneously with the completion of input of the valid data COPYRIGHT: (C)1999,JPO

Electron‐beam lithography with the scanning tunneling microscope

Abstract: The scanning tunneling microscope (STM), operated in vacuum in the field emission mode, has been used in lithographic studies of the resist SAL‐601 from Shipley. Patterns have been written by raising the tip–sample voltage above −12 V while operating the STM in the constant current mode. Resist films, 50 nm thick, have been patterned and the pattern transferred into the GaAs substrate by reactive ion etching. The variation of feature size with applied dose and tip–sample bias voltage has been studied. Comparisons have been made to lithography with a 10 nm, 50 kV electron e‐beam in a JEOL JBX‐5DII in the same resist thickness films. In all cases the resist films were processed in the standard fashion before and after exposure. The STM can write smaller minimum features sizes and has a greater process latitude. Proximity effects are absent due to the reduced scattering range of the low energy primary electrons. However, the writing speed is slower, being limited by the response of the piezoelectric scanner....

Two‐color GaAs/(AlGa)As quantum well infrared detector with voltage‐tunable spectral sensitivity at 3–5 and 8–12 μm

Abstract: We report on a novel GaAs:Si/(AlGa)As multiquantum well photodetector structure which exhibits photoresponse maxima in both the 8–12 and 3–5 μm spectral regions. The relative intensity of these maxima strongly depends on the bias voltage, demonstrating the potential of such a structure as a tunable two‐color intersubband detector.

A kinetics study of the electron cyclotron resonance plasma oxidation of silicon

Abstract: The electron cyclotron resonance plasma oxidation of silicon was investigated using in situ static spectroscopic ellipsometry during process and dynamic real time ellipsometry at oxidation temperatures between 80 and 400 °C and at various applied bias’. Successful optical modeling of the ellipsometric data was accomplished using a two layer model, in which the top layer is a pure silicon dioxide film over an interface layer. The kinetics results are compatible with the Cabrera–Mott theory for the oxidation by charged species in the limit of low electric field. The effect of applied bias suggests that the oxidizing species is O−. The energy activation is 0.18 eV, substantially lower than the thermal oxidation value.

Influence of a direct current bias on the energy of ions from an electron cyclotron resonance plasma

Abstract: The energy distributions of ions (IED) on the substrate in an electron cyclotron resonance discharge have been measured for methane at pressures of 5.4 × 10−2 and 1.1 × 10−1 Pa, for substrate holders with diameters ranging from 2.2 to 9.5 cm and dc‐bias voltages between 0 and −120 V. The applied dc bias is fully converted into an increase of ion energy only with the smallest substrate plate, and has no effect on the ion energy for the largest diameter. For intermediate diameters, the ion energy increases with increasing pressure at constant bias. This is explained by a model taking into account the sheath and anisotropic plasma resistivity. The current density does not increase with bias. From the merely small changes in full width at half‐maximum and the percentage in low energy ions with increasing dc‐bias voltage and sheath thickness it can be concluded that the sheath is collisionless.

Breakdown walkout in AlAs/GaAs HEMTs

Abstract: It was observed that the gate breakdown voltage of an unpassivated AlGaAs/GaAs HEMT can move to higher negative values when a current is allowed to flow through the gate under reverse gate bias voltage. When a reverse bias is applied between the gate and source, this breakdown 'walkout' can be accompanied by a permanent increase in device source resistance and decreases in transconductance and drain saturation current. A similar effect was observed in AlGaAs/InGaAs/GaAs pseudomorphic HEMTs and in GaAs MESFETs. This effect was not observed in silicon nitrided passivated devices. >

Josephson voltage standard based on single-flux-quantum voltage multipliers

Abstract: A Josephson single-flux-quantum voltage/frequency multiplier circuit is proposed as the basic building block for a new generation of voltage standards. The circuit uses magnetic coupling to synchronize a series array of independent junction oscillators to the flux flow in a Josephson transmission line. A cascade of these circuits can multiply an arbitrarily low input frequency up to the frequency limit of the circuit ( approximately=250 GHz) and then add the voltages across approximately 30000 oscillators to generate precise voltages up to 10 V. Because the oscillators can be switched on and off with a bias current, the output voltage is rapidly programmable. A complete design for a voltage standard programmable in 1.2- mu V increments to a maximum of 10 V is proposed. Using existing fabrication technology, the circuit would cover a substrate area of about 1 cm/sup 2/ and use 67210 junctions. >

Driving circuit for liquid crystal display

Abstract: A driving circuit for a liquid crystal display comprises: a selector driving circuit having a plurality of shift registers and latch circuits for outputting hold signals latched in the latch circuits; a plurality of selector circuits each for selecting one reference coltage corresponding to the hold signal; a plurality of hold capacitors each being charged by the selected reference voltage; and a plurality of source follower circuits each receiving the hold voltage from the hold capacitor and outputting a driving voltage for the liquid crystal display. The driving circuit further comprise a plurality of comparator circuits each receiving the output driving voltage and the reference voltage selected and switching the connection of a ramp voltage to the hold capacitor. Each source follower circuit provided for each stage requires a constant current source and only one output driver transistor instead of as many transistors as the number of gradations, which transistor commonly operates over all the gradations. The driving circuit may comprise a plurality of level shifting or biasing circuits supplying to the respective selector circuits level-shifted reference voltages whose potentials are higher than the normal reference voltages by the amount of a biasing voltage applied to the constant current sources of the source follower circuits.

Method and apparatus for biasing a magneto-resistive head

Abstract: A method and apparatus are provided for biasing a non-center tapped magneto-resistive head at a constant voltage using two separate biasing stages to provide independent control over the voltage at each of the two terminals of the head. A first control device detects the voltage at a first head terminal and directs changes to the output of a current source, interconnected with a first terminal of the head, to maintain the voltage at the first terminal at a first predetermined voltage. A second control device detects the voltage at second terminal of the head and directs changes to the input of a current sink, interconnected with the second terminal, to maintain the voltage at the second terminal at a second predetermined voltage. Each control device is interconnected to a separate reference voltage source; by appropriate selection of the voltages of the reference voltage sources, the voltages at the two head terminals and the potential across the head can be established and maintained.

Highly integrated semiconductor memory device with triple well structure

Abstract: A highly integrated semiconductor memory device, such as a DRAM, is provided with a unique triple-well structure which results in reduced junction capacitance of transistors and a smaller body effect. The semiconductor memory device comprises first and second wells of a first conductivity type and a third well of a second conductivity type formed in a semiconductor substrate of the first conductivity type. The first well is formed in the third well and the first well and the second well are connected to receive a ground level Vss well bias voltage and a negative level V BB well bias voltage, respectively. A plurality of MOS transistors of the first conductivity type are formed in the third well and at least two series-connected MOS transistors of the second conductivity type are formed in the first well. A plurality of MOS transistors of the second conductivity type and a plurality of memory cells are also formed in the second well.

Current sensor system and detection method comprising magetoresistance element, biasing conductor and current measurement conductor on insulating substrate

Abstract: The object of the present invention is to provide a small precise insulating type current sensor system. Sensing portion is composed of a magnetoresistance element, a bias conductor, and a current conductor, all of which are arranged on an insulating substrate. Resistance change of the magnetoresistance element is taken into an amplifier, and an output of the amplifier flows as a bias current to the bias conductor. When a current flows in the current conductor, the current causes a magnetic field and the resistance of the magnetoresistance element must be changed. However a feedback of the resistance change by the amplifier changes the bias current and controls the bias current for keeping the magnetic field of the magnetoresistance element at a constant. Accordingly, the insulation type current sensing with a wide range and preferable preciseness without being affected with a hysteresis of the magnetoresistance element and Barkhausen noise became possible.

ECR plasma etching of chemically vapour deposited diamond thin films

Abstract: Arc jet deposited films of diamond have been patterned using Au or photoresist masks and electron cyclotron resonance (ECR) O2 discharges. To achieve anisotropic features, additional RF-induced DC biasing of the sample is necessary. Diamond etch rates of 2000 A/min were obtained for 1 mtorr, 400 W O2 discharges with −80 V DC bias. The etch rates increase with either pressure or microwave power as a result of a greater density of atomic oxygen in the plasma. Chlorine (BCl3)-based discharges did not product significant etching of the diamond, but SF6/O2 mixtures had slightly faster rates than O2 alone.

EPROM source bias circuit with compensation for processing characteristics

Abstract: An electrically programmable read only memory (EPROM) source bias circuit provides a bias voltage at the source of an EPROM transistor which may vary with EPROM processing characteristics. The source bias circuit includes a reference voltage generator which generates a reference voltage which varies with EPROM transistor cell conductivity, and a source bias element which sets the voltage on the source node of the EPROM transistor during programming. The circuit functions to provide a greater amount of source bias to a higher-conductivity EPROM cell during programming, and to apply a lower source bias voltage to low conductivity EPROM cells. Programming efficiency of the EPROM transistor is improved, and yield of EPROM devices employing the circuit is enhanced.

High isolation integrated switch circuit

Abstract: A high isolation broadband switching circuit includes a plurality of switching elements coupled in series alternatingly with transmission line segments. Each switching element has a low or very high impedance between first and second points responsive to first and second values of a control voltage, respectively. In a first embodiment, the switching element includes a PIN diode having a cathode coupled to a first transmission line and an anode coupled to a second transmission line. In a second embodiment, the switching element includes a field effect transistor (FET) having a drain coupled to a first transmission line and a source coupled to a second transmission line. A first resistor is coupled between the drain and the source for DC continuity between the drain and the source, and a second resistor coupled between a gate of the FET and ground for DC continuity. A bias voltage source is coupled through a resistor to one of a source and a drain of one of the FETs. A bias voltage propagates through each transmission line and each first resistor, so DC continuity is provided. The bias voltage has a first value which causes the switching elements to have a low impedance to place the switching circuit in an ON state, and a second value which causes the switching elements to have a high impedance to place the circuit in a non-conductive state. The high impedance of the switching elements effectively opens the connections between the transmission lines.

Semiconductor integrated circuit device equipped with substrate biasing system selectively powered from internal and external power sources

Abstract: A dynamic random access memory device negatively biases the semiconductor substrate, and a substrate bias system incorporated therein produces a negative bias voltage from an external power voltage level for accelerating the negative biassing operation before an internal power voltage is sufficiently developed by an internal step-down circuit incorporated therein; however, after the development, the substrate bias system produces the negative bias voltage from the internal power voltage so as to be less affectable by fluctuation of the external power voltage level.

Drive circuit for power switches of a zero-voltage switching power converter

Abstract: A drive arrangement and operative scheme for the power switching transistors of a half-bridge power drives the two power switching transistors with unequal duty cycles having conducting durations such that the sum of the conduction intervals substantially equals the combined switching period of the two power switching transistors. The conducting intervals are separated by very short dead time intervals controlled by the differing turn-on and turn-off times of the two power switching transistors. The short interval between alternate conductions of the two power switching transistors is sufficient to allow zero voltage turn on of the power switching transistors but short enough to minimize power loss and conducted noise. Special biasing is provided to prevent drive signal application to power switches prior to attainment of a minimum voltage across the switch. Circuitry is provided for cancellation of output ripple currents at selected operating points of the power converter.

Magnetoresistive head amplifier

Abstract: An amplifier for biasing and amplifying the signals produced by a magnetoresistive element is provided. The input stage of this circuit includes two transistors in a differential common base configuration having a low input impedance. Since the two transistors are coupled to separate identical current sources, balance between the currents through the two transistors is maintained. The currents are balanced without the use of a feedback loop. Additional input stages may be added to allow signals from additional magnetoresistive elements to be selected and amplified. By using a common mode switching configuration, switching transients are greatly reduced.

Solid-state image pickup device

Abstract: An image pickup device capable of controlling the quantity of incident light The device has a liquid crystal layer with upper and lower transparent electrodes disposed over a photosite A fixed bias voltage is applied to the upper transparent electrode, while another voltage is applied to the lower transparent layer The photosite converts incident light into electrons, and then stores a signal charge produced by the conversion of the incident light A variation in the stored signal charge varies the voltage applied to the lower transparent layer Thus, the liquid crystal layer modulates the incident light in response to a variation of the signal charge quantity

One-transistor adaptable analog storage element and array

Abstract: An analog storage array according to the present invention is disposed on a semiconductor substrate. The array is arranged as a plurality of rows and a plurality of columns and includes a plurality of N-channel MOS transistors disposed in the rows and columns in a p-well in the semiconductor substrate. Each of the MOS transistors includes a source, a drain, and a floating gate forming a tunneling junction with a tunneling electrode. An input line is associated with each of the rows in the array. Each input line is connected to the source of each of the N-channel MOS transistors disposed in the row with which the input line is associated. A bias line is associated with each of the rows in the array. Each bias line is capacitively coupled to the floating gate of each of the N-channel MOS transistors disposed in the row with which the bias line is associated. A tunnel line is associated with each of the columns in the array. Each tunnel line connected to the tunneling electrode of each of the N-channel MOS transistors disposed in the column with which the bias line is associated. A current-sum line is associated with each of the columns in the array. Each current-sum line is connected to the drain of each of the N-channel MOS transistors disposed in the column with which the bias line is associated. Circuitry is provided for forward biasing said p-well with respect to the substrate. Circuitry is provided for simultaneously driving a selected one of the bias lines low while driving a selected one of the tunnel lines high, for raising the floating gate voltage of the one of the N-channel MOS transistors common to the selected one of the bias lines and the selected one of the tunnel lines.