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Showing papers on "Biasing published in 1995"


Patent
21 Feb 1995
TL;DR: In this article, a method for controlling a digital micromirror device resulting in decreased mechanical stress, longer device lifetimes, decreased incidence of spontaneous bit reset, and increased pulsewidth modulation accuracy is presented.
Abstract: A method for controlling a digital micromirror device resulting in decreased mechanical stress, longer device lifetimes, decreased incidence of spontaneous bit reset, and increased pulse-width modulation accuracy. To reduce the device stress, the bias voltage applied to the mirror may be reduced after the mirror has been latched. To prevent premature mirror changes, the address electrode bias voltage may be reduced after the mirror is driven to the desired position. To ensure that the mirror returns to the neutral position during reset, the mirror bias voltage may be raised from ground potential to approximately halfway between the two addressing voltages during the reset period. To reduce the effects of hinge memory and to ensure that the mirror rotates toward the proper address electrode, the mirror bias voltage may be gradually increased to allow the mirror time to rotate towards the proper address electrode.

301 citations


Journal ArticleDOI
K. Itoh1, K. Sasaki, Y. Nakagome1
01 Apr 1995
TL;DR: In this article, a general description of power sources in a RAM chip, and covers both DRAMs and SRAMs, is discussed, and the authors also show that the application of subthreshold current reduction circuits (such as source-gate back biasing) to cell and iterative circuit blocks is indispensable in the future.
Abstract: Trends in low-power circuit technologies of CMOS RAM chips are reviewed in terms of three key issues: charging capacitance, operating voltage, and dc current. The discussion includes a general description of power sources in a RAM chip, and covers both DRAMs and SRAMs. In DRAMs, successive circuit advancements have produced a power reduction equivalent to two to three orders of magnitude over the last decade for a fixed memory capacity chip. Coupled with the low-power advantage of CMOS circuits, two technologies have been the major contributors to power reduction: lower charging capacitance due to partial activation of multi-divided arrays that use multi-divisions of data and word lines; and lower operating voltage resulting from external power supply reduction, half-V/sub DD/ precharging and on-chip voltage down converting scheme. In SRAMs, partial activation of a multi-divided word line drastically reduces the dc current from the data-line load to the selected cell. In addition to advances in the sense amplifier circuit, an auto power down scheme that uses address transition detection for word driver and column circuitry further reduces the dc current. It is also shown that to design ultralow voltage DRAMs and SRAMs, the application of subthreshold current reduction circuits (such as source-gate back biasing) to cell and iterative circuit blocks will be indispensable in the future. >

275 citations


Journal ArticleDOI
01 Apr 1995
TL;DR: In this paper, a 14-b D/A converter with 13 bias lines is presented, and the circuit is a fast accurate dc reference, and it makes possible the digital synthesis of ac waveforms whose amplitudes derive directly from the internationally accepted definition of the volt.
Abstract: A binary sequence of series arrays of shunted Josephson junctions is used to make a 14-b D/A converter. With 13 bias lines, any step number in the range -8192 to +8192 -1.2 V to +1.2 V can be selected in the time required to stabilize the bias current (a few microseconds). The circuit is a fast accurate dc reference, and it makes possible the digital synthesis of ac waveforms whose amplitudes derive directly from the internationally accepted definition of the volt. >

272 citations


Journal ArticleDOI
TL;DR: In this paper, it was shown that the suppressed polarization can be restored to essentially its initial polarization value by creating electronic charge carriers in the ferroelectric, which strongly suggests that all three forms of degradation largely involve locking domains by electronic charge trapping at domain boundaries.
Abstract: Switchable polarization can be suppressed in Pb(Zr,Ti)O3 thin films by optical, thermal, electrical, and reducing processes. The optical suppression effect occurs by biasing the ferroelectric near the switching threshold and illuminating the material with band gap light; the thermal suppression effect occurs by biasing the ferroelectric near the switching threshold and heating the material to ≊100 °C. The electrically induced suppression effect, known as electrical fatigue, occurs by subjecting the ferroelectric capacitor to repeated polarization reversals. We find that the suppressed polarization in these three cases can be restored to essentially its initial polarization value by creating electronic charge carriers in the ferroelectric. This strongly suggests that all three forms of degradation largely involve locking domains by electronic charge trapping at domain boundaries. The fourth form of polarization suppression, a reducing treatment, was obtained by annealing the crystallized PZT films at 400 °C in nitrogen. The suppressed polarization could not be restored by injecting electronic charge into the reduced films, indicating that the mechanism for polarization suppression is different. In this case, it appears as though ionic defects, such as oxygen vacancies, are responsible for locking the domains, and hence, suppressing the polarization.

203 citations


Book
01 Aug 1995
TL;DR: In this article, a two-dimensional (2D) vertical cavity surface emitting laser (VCSEL) structures have been grown by both metal-organic chemical vapour deposition (MOCVD) and molecular beam fabrication (MBE).
Abstract: Vertical cavity surface emitting laser (VCSEL) structures have been grown by both metal-organic chemical vapour deposition (MOCVD) and molecular beam epitaxy (MBE). These incorporate 3 strained InGaAs / GaAs quantum wells placed resonantly in a two wavelength long optical cavity, formed between AlAs / GaAs quarter wave dielectric reflector stacks through which current is injected. The reflection spectra of these stacks is studied in detail; the effects on the laser threshold gain of absorption due to impurities and of errors in growth are investigated. Methods of disruption of the AlAs / GaAs heterointerfaces have been used to reduce the operating voltage. The completed designs use 200A intermediate layers containing 30 or 50% aluminium or a superlattice graded region simpler than that used in previous designs. The effectiveness acceptor dopants; Be in MBE, C and Zn in MOCVD; is studied also. Modulation doping was employed to reduce the effects of optical absorption. Devices were fabricated into mesas by SiC14 reactive ion etching or defined by proton implant isolation. MBE grown devices were resonant at wavelengths in the range 950 to 1059mn with essentially constant (at —1020nm) eihhi transition energies in the wells. A detailed study of the wavelength variation of threshold current density Jth (X)was made. A minimum of 366A.cnr2 was measured at 1018nm in mesa devices. A similar relation is found for ion-implanted devices but the minimum is increased to 535A.cm-2 by incomplete isolation. Gain calculations, including strain effects, are used to explain the Jth(X) variation. Implanted devices offer superior c.w. performance due to reduced thermal and ohmic resistances. The relative offset between the gain spectrum and cavity resonance was examined for c.w. operation. It was found that carrier thermal effects limit the output power rather than shifts in the offset. The bias voltage of MOCVD grown devices is as low as 1.7V and the threshold current is as low as 764A.cm-2. This is higher than for MBE grown devices because of growth thickness errors and non-optimal alignment of the gain spectrum and cavity mode. The uniformity in emission wavelength is ±1% over 80% of a 2 inch diameter wafer, offering suitability for very large uniform arrays.

184 citations


Patent
14 Dec 1995
TL;DR: In this article, a voltage-variable ceramic capacitance device with a plurality of las in a matching lattice structure and a determinable voltage breakdown was proposed, which can be placed in a position of maximum standing wave voltage in a tuning circuit or tuning mechanism.
Abstract: A voltage-variable ceramic capacitance device which has a plurality of las in a matching lattice structure and which possesses a symmetric voltage characteristic and a determinable voltage breakdown and has a high resistance to overbiasing or reverse biasing from an applied voltage. The device consists of a carrier substrate layer, a high temperature superconducting metallic layer deposited on the substrate, a thin film ferroelectric deposited on the metallic layer, and a plurality of metallic conductive means disposed on the thin film ferroelectric which are placed in electrical contact with RF transmission lines in tuning devices. The voltage breakdown of the device is easily designed by selecting the appropriate thickness of the ceramic, thus enabling a highly capacitive device that can be placed in a position of maximum standing wave voltage in a tuning circuit or tuning mechanism to provide a maximum effect on tunability, especially in high power applications, based on the changes in dielectric constant of the device.

177 citations


Patent
Seiji Samukawa1
26 Oct 1995
TL;DR: In this paper, an alternating bias signal for biasing the processing object is also applied to the object in the chamber, and the bias signal has a frequency of at most 600 kHz.
Abstract: A plasma processing method is provided which suppresses the charge accumulation on a processing object such as a semiconductor substrate. An alternating excitation signal in the form of pulses for exciting the plasma is supplied to a reaction gas contained in a plasma chamber, each pulse having an on-period t on for supplying the excitation signal and an off-period t off for stopping the excitation signal. The off period ranges from 10 to 100 μsec. The on-period may be determined as needed. An alternating bias signal for biasing the processing object is also applied to the object in the chamber. The bias signal has a frequency of at most 600 kHz. As a result, an increased number of positive and negative ions impinge the object thus increasing the processing rate and reducing the charge accumulation compared to prior art processes.

145 citations


Journal ArticleDOI
TL;DR: The tip-surface chemical interaction induced by the electric field is clarified and shown to provide a clue for the extreme site specificity of atom extraction by STM.
Abstract: We present a method for the first-principles calculation of the electronic states under strong field and current, which is effective for the bielectrode system with atomic structures around the surface regions. A microscopic electron distribution is calculated self-consistently together with the field and current distributions. In our method the scattering waves are calculated by the step-by-step recursion-matrix method and two different Fermi levels are assigned to each jellium electrode in accord with a given applied bias voltage. The method is applied to the Na/vacuum/Na junction system with a tip structure to mimic the scanning tunneling microscopy (STM). The tip-surface chemical interaction induced by the electric field is clarified and shown to provide a clue for the extreme site specificity of atom extraction by STM.

139 citations


Journal ArticleDOI
TL;DR: In this article, electrical impedance measurements of polymer light-emitting diodes employing the soluble, conjugated polymer poly[2]-methoxy, 5'(2'−ethylhexyloxy)•1,4'phenylene vinylene] (MEH‐PPV) as the light emitting layer were reported.
Abstract: We report electrical impedance measurements of polymer light‐emitting diodes employing the soluble, conjugated polymer poly[2‐methoxy, 5‐(2’‐ethyl‐hexyloxy)‐1,4‐phenylene vinylene] (MEH‐PPV) as the light‐emitting layer. The diode structures were metal‐polymer‐metal structures utilizing thin gold as the transparent, positive contact, and calcium as the negative contact. The devices were fabricated using undoped, polymer active layers ∼40 nm thick. The polymer light‐emitting diodes are accurately modeled as a resistor and capacitor in parallel for frequencies from 100 Hz to 1 MHz and for bias conditions from reverse bias to forward current densities of 0.1 A/cm2. The diode capacitance as a function of bias voltage is qualitatively different from conventional Schottky or p‐n junction diodes; in reverse bias, the polymer layer is fully depleted and the capacitance is independent of bias; at small forward bias, traps are charged near the metallic contacts and the capacitance increases; under large forward bias, with significant electron and hole injection, the traps are neutralized and the capacitance decreases. From the magnitude of the initial increase in capacitance with forward bias the trap density is estimated to be only a few times 1016 cm−3.

136 citations


Journal ArticleDOI
TL;DR: In this article, electroluminescent porous silicon (PS) diodes operate as surface-emitting cold cathodes, which is explained by the model that electrons are injected from the substrate, drifted by the field within the PS layer, and ejected as hot electrons through the thin Au film.
Abstract: It is demonstrated that electroluminescent porous silicon (PS) diodes operate as surface-emitting cold cathodes The PS diode is composed of a semitransparent thin Au film, PS layer, n-type Si substrate and ohmic contact When a sufficient positive bias voltage is applied to the Au contact in vacuum, the diode uniformly emits electrons as well as visible light This cold emission is explained by the model that electrons are injected from the substrate, drifted by the field within the PS layer, and ejected as hot electrons through the thin Au film This mode gives important insight for understanding the electroluminescence mechanism of PS, and shows the potential of PS devices not only for optoelectronic applications, but also for vacuum microelectronic ones

111 citations


Journal ArticleDOI
TL;DR: In this paper, superconducting YBa2Cu3O7−x (YBCO) and paraelectric SrTiO3 (STO) layers on LaAlO3 substrates were used for microwave transmission through the coplanar transmission line.
Abstract: We have prepared electrically tunable microwave resonators incorporating superconducting YBa2Cu3O7−x (YBCO) and paraelectric SrTiO3 (STO) layers on LaAlO3 substrates. The top YBCO layer for each sample was patterned into a 8 mm long coplanar transmission line with a 40 μm gap and a 20 μm center line width. The microwave transmission through the coplanar transmission line exhibits resonances corresponding to standing microwaves along the coplanar transmission line. These resonances are modulated by applying a bias voltage between the center line and the ground planes. Samples with a 0.5 μm thick (2 μm thick) bottom STO layer show, for a resonance at around 8 GHz (5 GHz), a frequency modulation of about 4% (24%) and a quality factor Q of about 200 (50) under 100 V bias at 80 K.

Journal ArticleDOI
P. J. van der Zaag1, Ronald Martin Wolf1, A.R. Ball1, C. Bordel1, LF Lou Feiner1, RM Jungblut1 
TL;DR: In this article, the magnitude of exchange bias in a series of Fe 3 O 4 /CoO bilayers with constant and varying CoO thicknesses has been studied and compared with the value calculated under the assumption of nearest-neighbour exchange at a flat and magnetically uncompensated interface.

Journal ArticleDOI
TL;DR: In this paper, the electroluminescence (EL) of poly(2,5-diheptoxy-p-phenylenevinylene (DHDMPPV) copolymer was tested under a conventional dc forward bias, a reverse bias, or an ac voltage.
Abstract: Poly(2,5-diheptoxy-p-phenylenevinylene-alt-2,5-dimethoxy-p-phenylenevinylene) (DHDMPPV) exhibits electroluminescence (EL) at room temperature when either a conventional dc forward bias, or a reverse bias, or an ac voltage is applied to the test device, which has a simple ITO (indium tin oxide)/polymer/Al configuration. DHDMPPV is a soluble derivative of poly(p-phenylenevinylene) (PPV) synthesized using a Wittig condensation polymerization. Its EL spectrum lies in the orange region with a maximum intensity at 582 nm and a shoulder at 620 nm. The EL spectra either under a dc forward or reverse bias or on the imposition of an ac voltage are qualitatively identical. The threshold biases are ∼5 V for dc forward bias, ∼6 V for dc reverse bias, and ∼5 V (10 V peak-to-peak) for ac operation, for a polymer emitter film thickness of ca. 80 nm. The EL emissions are bright and relatively stable at room temperature and can be easily seen under normal light conditions. Two other EL-active copolymers were also tested in similar configurations ; no significant dc reverse bias EL was observed. However, blends of DHDMPPV with another EL-active copolymer previously described show the same behavior as DHDMPPV itself ; for example, a 1 :1 weight ratio blend with a green-light-emitting multiblock copolymer shows only an enhanced orange emission from the narrow-band-gap DHDMPPV.

PatentDOI
TL;DR: In this paper, the magnitude of the AC bias voltage applied to the sample is adjusted to maintain a constant capacitance change as the tip is scanned across the sample surface, and a one dimensional model is used to extract dopant density profiles from the measurements made by the scanning capacitance microscope.
Abstract: Quantitative dopant profile measurements are performed on a nanometer scale by using a scanning capacitance microsope. A nanometer scale tip of the microscope is positioned at a semiconductor surface, and local capacitance change is measured as a function of sample bias. The method incorporates a feedback system and procedure in which the magnitude of the AC bias voltage applied to the sample is adjusted to maintain a constant capacitance change as the tip is scanned across the sample surface. A one dimensional model is used to extract dopant density profiles from the measurements made by the scanning capacitance microscope.

Journal ArticleDOI
TL;DR: In this paper, the nucleation and growth of c-BN films by means of the inductively coupled plasma technique was investigated. But the results were limited to two sets of experiments: deposition as a function of the bias voltage V B and experiments with varying deposition times.

Patent
31 Jan 1995
TL;DR: In this paper, a phase shifter with a single or monolithic ferroelectric material and a plurality of different lengths of transmission lines has a voltage source associated therewith for applying a predetermined bias voltage, resulting in a change in permitivity in the material.
Abstract: A phase shifter having a single or monolithic ferroelectric material and alurality of ferroelectric transmission lines formed thereon, each having a different effective physical length and associated delay or phase shift. The plurality of different lengths of ferroelectric transmission lines has a voltage source associated therewith for applying a predetermined bias voltage, resulting in a change in permitivity in the ferroelectric substrate material. The different lengths of ferroelectric transmission line formed on the single substrate have a predetermined relationship between their effective physical linear lengths. By selectively activating the different lengths of ferroelectric transmission line by applying a bias voltage in different combinations, a desired or predetermined phase shift is obtained. The single or monolithic ferroelectric substrate used greatly reduces the overall length of the ferroelectric phase shifter. Additionally, less complex drive circuits are needed relative to analog type ferroelectric phase shifters.

Patent
23 Jun 1995
TL;DR: In this paper, a charge pump circuit with negative current feedback is dislcosed and a feedback loop is used to control the conductivity of the switch circuit to regulate the output voltage of the charge pump.
Abstract: A charge pump circuit with negative current feedback is dislcosed. The charge pump circuit consists of charge pump stages, switch circuits in between the stages, and a feedback loop to control the conductivity of the switch circuit. The conductivity of the switch circuits is controlled by modulating the bias current of the switch circuit which modulates its conductivity. By using the feedback loop to control the conductivity, the output voltage of the charge pump circuit can be regulated.

Patent
19 Jan 1995
TL;DR: In this paper, surface modification of magnetic recording heads using plasma immersion ion implantation and deposition is described, which may be carried out using a vacuum arc deposition system with a metallic or carbon cathode.
Abstract: Surface modification of magnetic recording heads using plasma immersion ion implantation and deposition is disclosed. This method may be carried out using a vacuum arc deposition system with a metallic or carbon cathode. By operating a plasma gun in a long-pulse mode and biasing the substrate holder with short pulses of a high negative voltage, direct ion implantation, recoil implantation, and surface deposition are combined to modify the near-surface regions of the head or substrate in processing times which may be less than 5 min. The modified regions are atomically mixed into the substrate. This surface modification improves the surface smoothness and hardness and enhances the tribological characteristics under conditions of contact-start-stop and continuous sliding. These results are obtained while maintaining original tolerances.

Journal ArticleDOI
TL;DR: In this paper, a bias voltage was applied between the tip and the surface of a thin chromium layer on a Si(100) substrate, and truded patterns of various shapes were formed only on the water-adsorbed chromium surface.
Abstract: Writing of nanostructures on thin metal films using atomic force microscopy (AFM) was demonstrated. The writing experiments were done in a nitrogen ambient having variable humidity. Using a p‐type heavily doped silicon AFM tip, a bias voltage was independently applied between the tip and the surface of a thin chromium layer deposited on a Si(100) substrate. Protruded patterns of various shapes were formed only on the water‐adsorbed chromium surface when applying a negative bias on the tip. Their sizes were found to be dependent on the writing time, the bias voltage, and the humidity. The smallest feature size obtained is about 20 nm. From Auger electron spectroscopy (AES) analysis, the products are shown to be Cr oxides. The surface modification mechanism appears to be tip‐induced local oxidation, i.e., anodization.

Journal ArticleDOI
TL;DR: In this paper, the performance of a small-size electrically tunable microwave resonator is reported, which is made of bulk single crystal SrTiO/sub 3/coated with thin YBa/sub 2/Cu/sub 7/x films.
Abstract: The performance of a small-size electrically tunable microwave resonator is reported. The parallel plate dielectric resonator is made of bulk single crystal SrTiO/sub 3/ coated with thin YBa/sub 2/Cu/sub 3/O/sub 7-/x films. High Q-factor and high tunability at relatively low bias voltage are observed. The dependence of Q-factor on bias voltage is discussed.

Journal ArticleDOI
TL;DR: In this paper, the authors show that the presence of a buried oxide layer in silicon causes enhanced self-heating in Silicon-On-Insulator (SOI) n-channel MOSFETs.
Abstract: The presence of a buried oxide layer in silicon causes enhanced self-heating in Silicon-On-Insulator (SOI) n-channel MOSFETs The self-heating becomes more pronounced as device dimensions are reduced into the submicron regime because of increased electric field density and reduced silicon volume available for heat removal Two-dimensional numerical simulations are used to show that self-heating manifests itself in the form of degraded drive current due to mobility reduction and premature breakdown The heat flow equation was consistently solved with the classical semiconductor equations to study the effect of power dissipation on carrier transport The simulated temperature increases in the channel region are shown to be in close agreement with recently measured data Numerical simulation results also demonstrated accelerated turn-on of the parasitic bipolar transistor due to self-heating Simulation results were used to identify scaling constraints caused by the parasitic bipolar transistor turn-on effect in SOI CMOS ULSI For a quarter-micron n-channel SOI MOSFET, results suggest a maximum power supply of 18 V In the deep submicron regime, SOI devices exhibited a negative differential resistance due to increased self-heating with drain bias voltage Detailed comparison with bulk devices suggested significant reduction in the drain-source avalanche breakdown voltage due to increased carrier injection at the source-body junction >

Patent
Richard A. Habel1, Kim B. Roberts1
10 Aug 1995
TL;DR: In this paper, a digital controller for an injection laser diode is presented, which maintains the diode average and peak power levels constant in spite of temperature and/or aging effects.
Abstract: A digital controller for an injection laser diode. The controller maintains the laser diode average and peak power levels constant in spite of temperature and/or aging effects. A pseudo-random sequence is superimposed on the `0` and/or `1` current levels to the laser diode and the optical output is detected by a back facet monitor. The detected signal is compared with preset references and a feedback signal is used to control both the bias current and the modulation current.

Patent
22 Sep 1995
TL;DR: In this paper, a magnetoresistive transducer with a pair of hard magnetic bias regions is described, where each bias region is disposed in contact with one of the end portions of the transducers.
Abstract: A magnetoresistive transducer includes a magnetoresistive layer having end portions spaced by a central active portion. The longitudinal bias for the magnetoresistive layer is cooperatively furnished by a pair of hard magnetic bias regions. Each of the two hard magnetic bias regions includes a plurality of magnetized layers and each bias region is disposed in contact with one of the end portions of the magnetoresistive transducer. The magnetic flux required for the magnetoresistive layer to maintain a single domain state is adequately provided by the hard magnetic bias regions. In one embodiment, a substantially uniform thickness for the entire transducer is achieved, allowing the longitudinal bias to be continuously supplied to the magnetoresistive layer. In another embodiment, thinner hard magnetic bias regions provide improved step coverage for the second read gap thereby increasing yield. Also the thinner hard magnetic bias regions provide a significant increase of planarization of the write poles.

Journal ArticleDOI
TL;DR: In this paper, a non-injecting, non-alloyed ohmic contact was proposed to improve the performance of GaAs detectors beyond the voltage bias required for full active detection.
Abstract: In recent papers, we have investigated, within the context of the RD-8 experiment, the behaviour as a function of bias of the active region of particle detectors made by Alenia SpA on semi-insulating liquid encapsulated Czochralski gallium arsenide: the active region width depends linearly on the bias voltage. The diodes were found to break down as soon as the field reached the back ohmic contact. This suggested that the ohmic contact was injecting holes into the diode, therefore we have decided to develop a new, non-injecting, non-alloyed ohmic contact. This new contact allows us to go far beyond, five times, the voltage bias necessary to have a fully active detector. The higher voltage reached by the detectors helps us improve the charge collection efficiency, up to more than 95% for alphas and more than 90% for beta (mips) particles and X-rays, giving a more stable operation of the detectors. For the first time we can explore the characteristics of a GaAs detector beyond the voltage needed for it to be completely active.

Patent
13 Nov 1995
TL;DR: In this paper, a CMOS (complementary metaloxide-semiconductor) inverter is presented, which includes a PMOS transistor and an NMOS transistor connected in cascade, and back-gate biasing circuits.
Abstract: The present invention utilizes a CMOS (complementary metal-oxide-semiconductor) inverter, which includes a PMOS transistor and an NMOS transistor connected in cascade, and back-gate biasing circuits. The back-gate biasing circuit consists of capacitors and loads (active load or passive load). By providing a bias voltage to either one of bulks of the transistors or both of them, the constituted CMOS inverter demonstrates higher operation speed and lower standby current than the conventional one.

Journal ArticleDOI
TL;DR: In this article, the effect of substrate bias voltage was investigated for biasenhanced diamond nucleation pretreatments of diamond thin films in a microwave plasma chemical vapor deposition (PCVD) reactor.
Abstract: The effect of substrate bias voltage was investigated for bias‐enhanced diamond nucleation pretreatments of diamond thin films in a microwave plasma chemical vapor deposition reactor. A critical bias voltage of approximately −200 V was observed for nucleation density enhancement from ∼104 cm−2 to ∼1010 cm−2. Furthermore, the nucleation density under bias conditions was five orders of magnitude lower for a small silicon region electrically isolated from the otherwise negatively biased silicon substrate. These results confirm that bombardment of the substrate by energetic cations plays a significant role in the diamond nucleation mechanism during bias pretreatments.

Journal ArticleDOI
TL;DR: In this article, the I-V characteristics of one-dimensional arrays of normal metal tunnel junctions have been tested against inhomogenities in the junction parameters, number of junctions in the array, and magnetic field.
Abstract: Universal features of I–V characteristics of one‐dimensional arrays of normal metal tunnel junctions have been tested against inhomogenities in the junction parameters, number of junctions in the array, and magnetic field. We find that the differential conductance versus bias voltage obeys the analytic form to within 1% if the fabrication errors are smaller than 10% in junction areas, and if the array has more than ten junctions. Furthermore, the universal relation is insensitive to magnetic field at least up to 8 T.

Journal ArticleDOI
TL;DR: In this article, photoresponse signals with widths as short as 1.5 ps are observed from epitaxial YBa2Cu3O7−δ ǫ thin films using electro-optic sampling techniques.
Abstract: Photoresponse signals with widths as short as 1.5 ps are observed from epitaxial YBa2Cu3O7−δ thin films using electro‐optic sampling techniques. Voltage transients less than 2 ps wide are seen in 100‐ and 200‐nm films exposed to 150‐fs laser pulses and cooled to 79 K. At low bias currents, the amplitude of the fast response varies linearly with the bias current, suggesting a kinetic inductive mechanism. A negative transient about 15‐ps long is also seen that may provide evidence for nonequilibrium recombination of excited quasiparticles into Cooper pairs. At high bias currents or large laser fluences, a fast tail with a decay time of about 10 ps appears in the response followed by a slow, resistive bolometric component due to sample heating. Nonequilibrium aspects of the photoresponse and the origin of the fast tail are discussed.

Journal ArticleDOI
TL;DR: In this article, a light-emitting diode is made by closely contacting an n + -type porous Si film with chemically polymerized polyaniline inside the pores of Si. The diode shows a rectifying I − V characteristic, has a series resistance of 2 Ω and passes out high current densities under a forward bias of only a few volts.

Journal ArticleDOI
TL;DR: The hysteresis is due to the increase of conductivity by the forward bias current in epitaxial ferroelectric/perovskite-conductor heterostructures, which exhibits the memory retention for more than an hour.
Abstract: Leakage currents in epitaxial ferroelectric/perovskite‐conductor heterostructures reproducibly show diode properties having hysteresis. The hysteresis appears in forward bias, which is positive for electron (n) type conductors and negative for hole (p) type conductors. The hysteresis is due to the increase of conductivity by the forward bias current, which exhibits the memory retention for more than an hour. The write and erase speeds of the diode and the origin of the effect are discussed.