Showing papers on "Biasing published in 1998"

A low-voltage, low quiescent current, low drop-out regulator

Abstract: The demand for low-voltage, low drop-out (LDO) regulators is increasing because of the growing demand for portable electronics, i.e., cellular phones, pagers, laptops, etc. LDO's are used coherently with dc-dc converters as well as standalone parts. In power supply systems, they are typically cascaded onto switching regulators to suppress noise and provide a low noise output. The need for low voltage is innate to portable low power devices and corroborated by lower breakdown voltages resulting from reductions in feature size. Low quiescent current in a battery-operated system is an intrinsic performance parameter because it partially determines battery life. This paper discusses some techniques that enable the practical realizations of low quiescent current LDO's at low voltages and in existing technologies. The proposed circuit exploits the frequency response dependence on load-current to minimize quiescent current flow. Moreover, the output current capabilities of MOS power transistors are enhanced and drop-out voltages are decreased for a given device size. Other applications, like dc-dc converters, can also reap the benefits of these enhanced MOS devices. An LDO prototype incorporating the aforementioned techniques was fabricated. The circuit was operable down to input voltages of 1 V with a zero-load quiescent current flow of 23 /spl mu/A. Moreover, the regulator provided 18 and 50 mA of output current at input voltages of 1 and 1.2 V, respectively.

High brightness and efficiency blue light-emitting polymer diodes

Abstract: Efficient blue electroluminescence, peaked at 436 nm, is demonstrated from polymer light-emitting diodes operating at high brightness A dioctyl-substituted polyfluorene was used as the emissive layer in combination with a polymeric triphenyldiamine hole transport layer The luminance reaches 600 cd/m2 at a current density of 150 mA/cm2 for a bias voltage of 20 V, corresponding to an efficiency of 025 cd/A and a luminosity of 004 lm/W These values are optimized at a critical emissive layer thickness

Magnetic tunnel junction magnetoresistive sensor with in-stack biasing

Abstract: A magnetic tunnel junction (MTJ) magnetoresistive (MR) read head has one fixed ferromagnetic layer and one sensing ferromagnetic layer on opposite sides of the tunnel barrier layer, and with a biasing ferromagnetic layer in the MTJ stack of layers that is magnetostatically coupled with the sensing ferromagnetic layer to provide either longitudinal bias or transverse bias or a combination of longitudinal and transverse bias fields to the sensing ferromagnetic layer. The magnetic tunnel junction in the MTJ MR head is formed on an electrical lead on a substrate and is made up of a stack of layers. The layers in the stack are an antiferromagnetic layer, a fixed ferromagnetic layer exchange biased with the antiferromagnetic layer so that its magnetic moment cannot rotate in the presence of an applied magnetic field, an insulating tunnel barrier layer in contact with the fixed ferromagnetic layer, a sensing ferromagnetic layer in contact with the tunnel barrier layer and whose magnetic moment is free to rotate in the presence of an applied magnetic field, a biasing ferromagnetic layer that has its magnetic moment aligned generally within the plane of the device and a nonmagnetic electrically conductive spacer layer separating the biasing ferromagnetic layer from the other layers in the stack. The self field or demagnetizing field from the biasing ferromagnetic layer magnetostatically couples with the edges of the sensing ferromagnetic layer to stabilize its magnetic moment, and, to linearize the output of the device. The electrically conductive spacer layer prevents direct ferromagnetic coupling between the biasing ferromagnetic layer and the other layers in the stack and allows sense current to flow perpendicularly through the layers in the MTJ stack.

Development of a novel structure zone model relating to the closed-field unbalanced magnetron sputtering system

Abstract: It is well established that the microstructure of a thin film strongly influences its physical and chemical properties. Microstructure, in turn, is determined by a number of deposition and process parameters which control the energy delivered to the growing film. The closed-field unbalanced magnetron sputtering (CFUBMS) process has now been developed to the stage where it can be routinely used to deposit very high quality, well adhered coatings of a wide range of metals and ceramics. A key factor in the success of this process is the ability to transport large ion currents to the substrate. This can enhance the formation of fully dense coating structures at relatively low homologous temperatures, compared to other sputtering systems. The importance of microstructure on the performance of a coating has led to the development of models designed to describe coating structure in terms of specific deposition parameters. Several such structure zone models (SZMs) relating to various physical vapor deposition (PVD) processes have been published. However, because of the advantages of operating in the CFUBMS mode, the structure of coatings deposited in this mode do not conform to those predicted by existing SZMs relating to other PVD processes. Also, in most existing SZMs, the final coating structure is described in terms of the homologous temperature of the coating and one other parameter which attempts to describe the additional influence on the structure of the simultaneous ion bombardment of the growing film. Several parameters have been used to fill this role including coating pressure, substrate bias voltage, and an energy parameter defined as the average energy carried by the arriving ions per condensing atom. However, other studies have shown that ion energy and ion flux are fundamental parameters in ion-assisted PVD processes and their effects must be considered separately when describing coating structures. A detailed investigation has now been carried out into the CFUBMS process. As a result of this, a SZM relating to the CFUBMS system has been developed, in which coating structures are described in terms of homologous temperature, bias voltage and the ion-to-atom ratio incident at the substrate. This is a novel model which allows the influence of ion flux and ion energy to be considered separately. This study has also highlighted a number of other characteristics of the CFUBMS system. For example, both ion current density and deposition rate are directly proportional to the target current, although their coefficients of proportionality differ. Deposition rate decreases more rapidly with increasing substrate-to-target separation than ion current. Consequently the ion-to-atom ratio incident at the substrate increases with separation. Indeed, with magnetrons of fixed magnetic configuration, in order to increase the ion-to-atom ratio for any set of deposition parameters, it is necessary to increase the substrate-to-target separation.

The non-linear redshift-space power spectrum of galaxies

Abstract: We study the power spectrum of galaxies in redshift space, with third-order perturbation theory to include corrections that are absent in linear theory. We assume a local bias for the galaxies: i.e., the galaxy density is sampled from some local function of the underlying mass distribution. We find that the effect of the non-linear bias in real space is to introduce two new features: first, there is a contribution to the power which is constant with wavenumber, whose nature we reveal as essentially a shot-noise term. In principle this contribution can mask the primordial power spectrum, and could limit the accuracy with which the latter might be measured on very large scales. Secondly, the effect of second- and third-order bias is to modify the effective bias (defined as the square root of the ratio of galaxy power spectrum to matter power spectrum). The effective bias is almost scale-independent over a wide range of scales. These general conclusions also hold in redshift space. In addition, we have investigated the distortion of the power spectrum by peculiar velocities, which may be used to constrain the density of the Universe. We look at the quadrupole-to-monopole ratio, and find that higher order terms can mimic linear theory bias, but the bias implied is neither the linear bias, nor the effective bias referred to above. We test the theory with biased N-body simulations, and find excellent agreement in both real and redshift space, providing the local biasing is applied on a scale whose fractional rms density fluctuations are < 0.5.

A charge-injection method for Gilbert cell biasing

Abstract: A CMOS Gilbert cell mixer biasing topology is presented. The new biasing technique offers several key advantages over the traditional biasing arrangement. First, the new topology allows the designer to easily adjust the bias current present in the Gilbert cell input transistors, while maintaining bias currents in other portions of the circuit. Second, the mixer linearity can be improved using this biasing method by accurate adjustment of the input MOSFET operating point. Third, the biasing method reduces the "voltage headroom" difficulties inherent to the Gilbert cell, which uses a stacked arrangement of transistors. The importance of these adjustments with regard to the mixer conversion gain and IP3 is examined.

Offset reduction in Hall devices by continuous spinning current method

Abstract: A novel method for dynamic offset compensation in a Hall plate is presented. The continuous spinning current method is based on minimalsize four-contact Hall devices and, therefore, the lowest possible offset resulting from material inhomogeneities is achieved. A continuous spinning current vector is generated in the device by spatially superimposing two periodic biasing currents. The resulting voltages allow the constant Hall voltage to be separated from the periodic offset voltage. Remaining offsets are below 10 μT, which corresponds to fractions of the earth's magnetic field.

Magnetic tunnel junction memory cell with in-stack biasing of the free ferromagnetic layer and memory array using the cell

Abstract: A magnetic tunnel junction (MTJ) memory cell uses a biasing ferromagnetic layer in the MTJ stack of layers that is magnetostatically coupled with the free ferromagnetic layer in the MTJ stack to provide transverse and/or longitudinal bias fields to the free ferromagnetic layer. The MTJ is formed on an electrical lead on a substrate and is made up of a stack of layers. The layers in the MTJ stack are an antiferromagnetic layer, a fixed ferromagnetic layer exchange biased with the antiferromagnetic layer so that its magnetic moment cannot rotate in the presence of an applied magnetic field, an insulating tunnel barrier layer in contact with the fixed ferromagnetic layer, a free ferromagnetic layer in contact with the tunnel barrier layer and whose magnetic moment is free to rotate in the presence of an applied magnetic field, and whose moment, in the absence of any applied field, is generally either parallel or antiparallel to that of the fixed ferromagnetic layer, a biasing ferromagnetic layer that has its magnetic moment aligned generally in the plane of the MTJ, and a nonferromagnetic electrically conductive spacer layer separating the biasing ferromagnetic layer from the other layers in the stack. The self field or demagnetizing field from the biasing layer magnetostatically couples with the edges of the free layer so as to provide a transverse bias field, which results in a coherent rotation of the moment of the free layer, and/or a longitudinal bias field, which assures that the two states of the memory cell are equally stable with respect to magnetic field excursions.

Tunnel junction head structure without current shunting

Abstract: A magnetic tunnel junction (MTJ) device for use as a magnetic field sensor or as a memory cell in a magnetic random access (MRAM) array has one pinned ferromagnetic layer and one free ferromagnetic layer formed on opposite sides of an insulating tunnel barrier layer, and a hard biasing layer that is in proximate contact with and magnetostatically coupled to the free ferromagnetic layer. The magnetic tunnel junction in the sensor is formed on a first shield, which also serves as an electrical lead, and is made up of a stack of layers (MTJ stack). The layers in the MTJ stack are an antiferromagnetic layer, a pinned ferromagnetic layer, an insulating tunnel barrier layer, and a free ferromagnetic layer. The MTJ stack is generally rectangularly shaped with parallel side edges. A layer of hard biasing ferromagnetic material is in abutting contact to or overlapping the MTJ stack to longitudinally bias the magnetic moment of the free ferromagnetic layer in a preferred direction. A first layer of electrically insulating material isolates the hard biasing material from the first shield so that sensing current is not shunted to the hard biasing material but is allowed to flow perpendicularly through the layers in the MTJ stack. A second layer of electrically insulating material isolates the hard bias material from the second shield which also acts as an electrical lead for the MTJ stack.

Voltage-Biased Superconducting Transition-Edge Bolometer with Strong Electrothermal Feedback Operated at 370 mK.

Abstract: We present an experimental study of a composite voltage-biased superconducting bolometer (VSB). The tested VSB consists of a Ti-film superconducting thermometer (Tc ∼ 375 mK) on a Si substrate suspended by NbTi superconducting leads. A resistor attached to the substrate provides calibrated heat input into the bolometer. The current through the bolometer is measured with a superconducting quantum interference device ammeter. Strong negative electrothermal feedback fixes the bolometer temperature at Tc and reduces the measured response time from 2.6 s to 13 ms. As predicted, the measured current responsivity of the bolometer is equal to the inverse of the bias voltage. A noise equivalent power of 5 × 10-17 W/√Hz was measured for a thermal conductance G ∼ 4.7 × 10-10 W/K, which is consistent with the expected thermal noise. Excess noise was observed for bias conditions for which the electrothermal feedback strength was close to maximum.

Adaptive power supply for avalanche photodiode

Abstract: An adaptive power supply for an avalanche photodiode (APD) is used to determine an optimum bias voltage. Without an optical signal input the adaptive power supply applies a swept voltage to the APD while monitoring the photodiode current. When breakdown occurs, the voltage is noted and the bias voltage from the adaptive power supply is set at a specified offset below the breakdown voltage. Where a source of optical digital data signal is present, it is coupled to the input of the APD via a programmable optical attenuator. The electrical digital signal output from the APD is input to a bit error rate counter, the output of which is monitored. For different optical power levels the APD bias voltage is swept by the adaptive power supply, determining a constant power level curve over which the bit error rate is virtually zero. This is repeated for a plurality of optical power levels, the resulting family of curves defining a region within the bit error rate is virtually zero. The adaptive power supply is set to a value that falls within the virtually zero bit error rate region for the expected optical power level input.

Enhanced tunnel magnetoresistance at high bias voltage in double-barrier planar junctions

Abstract: Single Co/Al2O3/NiFe and double Co/Al2O3/Co/Al2O3/NiFe planar tunnel junctions were grown by sputtering and subsequently patterned in a four-step process using optical lithography. The Al2O3 barriers are formed by radio frequency plasma oxidation of 1.5 nm aluminum layers. The double junctions exhibit three clear resistance levels depending on the relative configuration of the magnetizations. Both single and double junctions exhibit maximum magnetoresistance (MR) ratios above 10% at room temperature and 20% at 30 K and a decrease of MR with increasing bias voltage. With regard to its low bias value, the MR is reduced by a factor of 2 at 0.26 V for the single junctions and at values above 0.8 V for the double junctions. The decay of the MR of double junctions with bias voltage is significantly slower than expected from two independent junctions in series.

High-performance condenser microphone with fully integrated CMOS amplifier and DC-DC voltage converter

Abstract: The development of a capacitive microphone with an integrated detection circuit is described. The condenser microphone is made by micromachining of polyimide on silicon. Therefore, the structure can be realized by postprocessing on substrates containing integrated circuits (IC's), independently of the IC process, integrated microphones with excellent performances have been realized on a CMOS substrate containing dc-dc voltage converters and preamplifiers. The measured sensitivity of the integrated condenser microphone was 10 mV/Pa, and the equivalent noise level (ENL) was 27 dB(A) re. 20 /spl mu/Pa for a power supply voltage of 1.9 V, which was measured with no bias voltage applied to the microphone. Furthermore, a back chamber of infinite volume was used in all reported measurements and simulations.

Green electroluminescence from Er-doped GaN Schottky barrier diodes

Abstract: Visible lightelectroluminescence(EL) has been obtained from Er-doped GaN Schottky barrierdiodes. The GaN was grown by molecular beam epitaxy on Si substrates using solid sources (for Ga, and Er) and a plasma source for N 2 . Al was utilized for both the Schottky (small-area) and ground (large-area) electrodes. Strong green light emission was observed under reverse bias, with weaker emission present under forward bias. The emission spectrum consists of two narrow green lines at 537 and 558 nm and minor peaks at 413 and at 666/672 nm. The green emission lines have been identified as Er transitions from the 2 H 11/2 and 4 S 3/2 levels to the 4 I 15/2 ground state and the blue and red peaks as the 2 H 9/2 and 4 F 9/2 Er transitions to the same ground state. The reverse bias EL intensity was found to increase linearly with bias current.

High-power microwave 0.25-μm gate doped-channel GaN/AlGaN heterostructure field effect transistor

Abstract: We report on the high-power performance of the 0.25-/spl mu/m gate Doped-Channel GaN/AlGaN Heterostructure Field Effect Transistors (DC-HFETs). At a drain bias voltage of 18 V and drain bias current of 46 mA, these 100-/spl mu/m wide devices exhibit high gain at 8.4 GHz with a power density reaching 1.73 W/mm. The devices also display high gain at moderate power over a wide range of frequencies. This high gain at high frequency is a result of an optimal doping level in the AlGaN layer that gives rise to a high sheet charge density while maintaining a high-channel electron mobility. These results demonstrate the excellent microwave power capability of the GaN/AlGaN based heterostructure field effect transistors.

Influence of negative dc bias voltage on structural transformation of carbon nitride at 600 °C

Abstract: Carbon nitride (CN) thin films were prepared at 600 °C by rf plasma pulsed laser deposition. As we increased the magnitude of the negative dc bias voltage, the CN bonds were transformed from a mixture of sp2 C–N and sp3 C–N states into a CN phase predominated by tetrahedral CN bonds. A biasing threshold of this transformation occurred due to the annihilation of the graphite microstructure, which coincided with a threshold of significant nitrogen incorporation. We found that suppression of graphite supersaturation appeared to be important for the formation of the tetrahedral sp3 C–N bonds. The nitrogen content of these films is stable upon annealing at 800 °C in vacuum.

The nonlinear redshift-space power spectrum of galaxies

Abstract: We study the power spectrum of galaxies in redshift space, with third order perturbation theory to include corrections that are absent in linear theory. We assume a local bias for the galaxies: i.e. the galaxy density is sampled from some local function of the underlying mass distribution. We find that the effect of the nonlinear bias in real space is to introduce two new features: first, there is a contribution to the power which is constant with wavenumber, whose nature we reveal as essentially a shot-noise term. In principle this contribution can mask the primordial power spectrum, and could limit the accuracy with which the latter might be measured on very large scales. Secondly, the effect of second- and third-order bias is to modify the effective bias (defined as the square root of the ratio of galaxy power spectrum to matter power spectrum). The effective bias is almost scale-independent over a wide range of scales. These general conclusions also hold in redshift space. In addition, we have investigated the distortion of the power spectrum by peculiar velocities, which may be used to constrain the density of the Universe. We look at the quadrupole-to-monopole ratio, and find that higher-order terms can mimic linear theory bias, but the bias implied is neither the linear bias, nor the effective bias referred to above. We test the theory with biased N-body simulations, and find excellent agreement in both real and redshift space, providing the local biasing is applied on a scale whose fractional r.m.s. density fluctuations are $< 0.5$.

Bias voltage and temperature dependence of magnetotunneling effect

Abstract: We have studied systematically the magnetotunneling properties of several metallic magnetictunnel-junction systems (Ni80Fe20–insulator–Ni80Fe20,Ni80Fe20–I–Co,Co–I–Co, Ni40Fe60–I–Co). The room-temperature magnetoresistance MR value at zero-bias ranges between 16% and 27%, depending on the spin polarization of the electrodes. There seems to be a general bias dependence of MR in all of these systems. In particular, it requires a bias in the range of 0.22–0.23 V to suppress the maximum MR value by half. We have also measured the bias dependence of MR as a function of barrier parameters (thickness and oxidation time). At low temperature, a sharp cusplike feature appears near zero bias. In some cases, low-temperature MR values substantially exceed expectations from established spin-polarization.

High speed semiconductor laser driver circuits

Abstract: A semiconductor laser driver circuit that provides single supply operation over a wide supply voltage range (e.g., 3V to 5.5V), is capable of high speed data transmission, and is programmable over a wide laser modulation current range (such as 5mA to 60mA). The circuit includes temperature sensitive circuits to adjust for changes in Vbe over the operating temperature range, and to adjust a bias current to maintain transistor gm in the presence of temperature changes. Also included is an adaptive drive feature to accommodate different laser drive currents. Details of these and other features are disclosed.

Method for changing the weight of a synaptic element

Abstract: An analog storage array according to the present invention is disposed on a semiconductor substrate. The array is arranged as a plurality of rows and a plurality of columns and includes a plurality of N-channel MOS transistors disposed in the rows and columns in a p-well in the semiconductor substrate. Each of the MOS transistors includes a source, a drain, and a floating gate forming a tunneling junction with a tunneling electrode. An input line is associated with each of the rows in the array. Each input line is connected to the source of each of the N-channel MOS transistors disposed in the row with which the input line is associated. A bias line is associated with each of the rows in the array. Each bias line is capacitively coupled to the floating gate of each of the N-channel MOS transistors disposed in the row with which the bias line is associated. A tunnel line is associated with each of the columns in the array. Each tunnel line connected to the tunneling electrode of each of the N-channel MOS transistors disposed in the column with which the bias line is associated. A current-sum line is associated with each of the columns in the array. Each current-sum line is connected to the drain of each of the N-channel MOS transistors disposed in the column with which the bias line is associated. Circuitry is provided for forward biasing said p-well with respect to the substrate. Circuitry is provided for simultaneously driving a selected one of the bias lines low while driving a selected one of the tunnel lines high, for raising the floating gate voltage of the one of the N-channel MOS transistors common to the selected one of the bias lines and the selected one of the tunnel lines.

High-voltage cmos level shifter

Abstract: A high-voltage level shifter includes one or more complementary NMOS/PMOS series intermediate transistor pairs to divide the high-voltage supply range into two or more sub-ranges. The level shifter has a differential structure with complementary NMOS input transistors. Cross-coupled PMOS output transistors provide complementary outputs. The complementary NMOS/PMOS series intermediate transistor pairs separate the NMOS input transistor drains from the PMOS output transistor drains. In order to divide the high voltage range into h subranges, h-1 complementary NMOS/PMOS series intermediate transistor pairs are used each being biased by monotonically increasing fixed intermediate voltages. In a shared-bias embodiment, each complementary NMOS/PMOS series intermediate transistor pair is biased by a single corresponding intermediate voltage. In a split-bias embodiment, each complementary NMOS/PMOS series intermediate transistor pair is biased by a corresponding NMOS bias voltage and a corresponding PMOS bias voltage, in which the NMOS bias voltage is higher than the PMOS bias voltage by the sum or the NMOS threshold voltage and the PMOS threshold voltage. In another aspect, the N-wells of the PMOS transistors are tied to an upwardly vertically adjacent intermediate voltage in the shared-bias embodiments, and are tied to an upwardly vertically adjacent NMOS bias voltage in the split-bias embodiments. In a twin tub embodiment for very high voltage applications, the P-wells of the NMOS transistors are tied to a downwardly vertically adjacent intermediate voltage in the shared-bias embodiments, and are tied to a downwardly vertically adjacent PMOS bias voltage for the split-bias embodiments.

Magnetic tunnel junction magnetoresistive read head with longitudinal and transverse bias

Abstract: A magnetic tunnel junction magnetoresistive read head has one fixed ferromagnetic layer and one generally rectangularly shaped sensing ferromagnetic layer on opposite sides of the tunnel barrier layer, and a biasing ferromagnetic layer located around the side edges and back edges of the sensing ferromagnetic layer. An electrically insulating layer separates the biasing layer from the edges of the sensing layer. The biasing layer is a continuous boundary biasing layer that has side regions and a back region to surround the three edges of the sensing layer. When the biasing layer is a single layer with contiguous side and back regions its magnetic moment can be selected to make an angle with the long edges of the sensing layer. In this manner the biasing layer provides both a transverse bias field to compensate for transverse ferromagnetic coupling and magnetostatic coupling fields acting on the sensing layer to thus provide for a linear response of the head and a longitudinal bias field to stabilize the head. The biasing layer may also be formed with discrete side regions and a back region. The discrete side regions may have a magnetic moment oriented in a different direction from the moment of the back region in order to provide the correct combination of transverse and longitudinal bias fields.

Thermally-induced voltage alteration for integrated circuit analysis

Abstract: A thermally-induced voltage alteration (TIVA) apparatus and method are disclosed for analyzing an integrated circuit (IC) either from a device side of the IC or through the IC substrate to locate any open-circuit or short-circuit defects therein. The TIVA apparatus uses constant-current biasing of the IC while scanning a focused laser beam over electrical conductors (i.e. a patterned metallization) in the IC to produce localized heating of the conductors. This localized heating produces a thermoelectric potential due to the Seebeck effect in any conductors with open-circuit defects and a resistance change in any conductors with short-circuit defects, both of which alter the power demand by the IC and thereby change the voltage of a source or power supply providing the constant-current biasing. By measuring the change in the supply voltage and the position of the focused and scanned laser beam over time, any open-circuit or short-circuit defects in the IC can be located and imaged. The TIVA apparatus can be formed in part from a scanning optical microscope, and has applications for qualification testing or failure analysis of ICs.

Dynamic write process for high bandwidth multi-bit-per-cell and analog/multi-level non-volatile memories

Abstract: A write process and circuit for a non-volatile memory such as a multi-bit-per-cell Flash memory has multiple local memory arrays and a global bias circuit that charges row lines in the arrays for programming operations. A programming operation in an array includes a charging period during which the global bias circuit charges a selected row line to a voltage corresponding to a value to be written in a memory cell and a sequence of program cycles and verify cycles during which the selected row line is isolated to preserve the charge from the bias circuit. A global control circuit can use a capacitive coupling to the charged row line to raise and lower the row line voltage. In one embodiment, the row line voltage rises to a programming voltage to change the threshold voltage of the selected cell during program cycles and falls to a verify voltage during verify cycles to sense whether the selected cell has a target threshold voltage. Alternatively, the row line voltage remains constant as charged by the bias circuit if a maximum current for biasing a column line connected to a sense amplifier causes the programming voltage to be equal to the trip point of the sense amplifier when the memory cell has the target threshold voltage.

H-bridge circuit for generating a high-energy biphasic waveform in an external defibrillator

Abstract: An external defibrillator (8) with an output circuit (14) having four legs arrayed in the form of an 'H' (an 'H-bridge') is disclosed. Each leg of the output circuit contains a solid-state switch (31, 32, 33, 34). By selectively switching on pairs of switches in the H-bridge, a biphasic defibrillation pulse may be applied to a patient. The switches in three of the legs of the H-bridge output circuit are preferably silicon controlled rectifiers (SCRs). Gate drive circuits (51, 53, 54) are coupled to the SCRs to bias the SCRs with a voltage that allows the SCRs to remain turned-on even when conducting low current. The switch in the fourth leg is preferably a pair of insulated gate bipolar transistors (IGBTs) coupled in series. A gate drive circuit (52) is coupled to the gate of the IGBTs to provide a slow turn-on and a fast turn-off of the IGBTs. The gate drive circuit (52) also biases the IGBTs with a sufficient voltage to allow the IGBTs to withstand a shorted discharge of the external defibrillator through the output circuit. The circuit also includes a protective component (27) that has both inductive and resistive properties. The protective component (27) serves to both limit current during a defibrillation pulse, and to absorb energy during an internal energy dump. An internal energy dump is performed by biasing on the switches in two legs on the same side of the H-bridge output circuit (14), eliminating the need for a separate energy dump circuit.

In Situ Scanning Tunneling Microscopy of a Redox Molecule as a Vibrationally Coherent Electronic Three-Level Process

Abstract: We provide a theoretical frame for in situ scanning tunneling microscopy (STM) of adsorbate molecules with low-lying redox levels strongly coupled to the environmental nuclear motion. The STM process is viewed as a coherent two-step electron transfer (ET) involving electron exchange between the local redox level and the manifolds of electronic levels in the substrate and tip. The notion coherence is here taken to imply that the intermediate electron or hole state after the first ET step does not fully relax vibrationally before the second ET step. These views and the theoretical formalism are appropriate to in situ STM of large transition metal complexes and redox metalloproteins. The formalism offers two kinds of spectroscopic features. One is the relation between the tunnel current and the bias voltage at fixed overvoltage of either the tip or the substrate relative to a reference electrode. The other one is the tunnel current dependence on the overvoltage, at fixed bias voltage. Recent data on tunnelin...

Isolation between power supplies of an analog-digital circuit

Abstract: The present invention relates to a composite integrated circuit including at least one well that separates analog and digital blocks of the circuit, this well being connected to a first terminal of a power supply of biasing of one of the two blocks, and being of type opposite to that of the circuit substrate, and a resistor being interposed on the well biasing link.

Fiberoptic transmitter using thermistor to maintain stable operating conditions over a range of temperature

Abstract: Techniques for controlling the operation of a laser diode to maintain optimum operating characteristics (i.e., fairly constant output power and extinction ratio) despite the fact that the threshold current and slope efficiency vary greatly over a the desired range of operating temperature. A laser driving circuit includes a bias current generator, a temperature-dependent modulation current generator, and a switching element for switching the modulation current on and off in accordance with a desired input pattern. The modulation current is caused to vary with temperature in a manner that compensates for the fact that the laser diode's slope efficiency varies with temperature.

Noise properties of ferromagnetic tunnel junctions

Abstract: We report measurements of voltage fluctuations in magnetic tunnel junctions which exhibit both high and low magnetoresistance (MR). The voltage noise power normalized to the square of the junction bias voltage was 10−14/Hz at a frequency of 1 Hz in a high MR junction. Low MR junctions had significantly higher noise power at 1 Hz and the origin of the noise was not magnetic. In these junctions, random telegraph noise was observed over a wide range of temperatures and junction biases. The results are consistent with a two-channel model of conduction, one of which is spin independent and gives rise to large noise. A noise measuring technique provides evidence for bias-dependent current-path rearrangements. The data support the existence of an inhomogeneous (filamentary-like) current-flow pattern across the tunnel junction associated with the spin-independent channel.