Biasing

About: Biasing is a research topic. Over the lifetime, 29422 publications have been published within this topic receiving 301035 citations.

AlxGa1−xN-based avalanche photodiodes with high reproducible avalanche gain

Abstract: The authors report high performance solar-blind photodetectors with reproducible avalanche gain as high as 1560 under ultraviolet illumination. The solar-blind photodetectors have a sharp cutoff around 276nm. The dark currents of the 40μm diameter devices are measured to be lower than 8fA for bias voltages up to 20V. The responsivity of the photodetectors is 0.13A∕W at 272nm under 20V reverse bias. The thermally limited detectivity is calculated as D*=1.4×1014cmHz1∕2W−1 for a 40μm diameter device.

Fundamental Limits on the Subthreshold Slope in Schottky Source/Drain Black Phosphorus Field-Effect Transistors

Abstract: The effect of thickness, temperature, and source–drain bias voltage, VDS, on the subthreshold slope, SS, and off-state properties of black phosphorus (BP) field-effect transistors is reported. Locally back-gated p-MOSFETs with thin HfO2 gate dielectrics were analyzed using exfoliated BP layers ranging in thickness from ∼4 to 14 nm. SS was found to degrade with increasing VDS and to a greater extent in thicker flakes. In one of the thinnest devices, SS values as low as 126 mV/decade were achieved at VDS = −0.1 V, and the devices displayed record performance at VDS = −1.0 V with SS = 161 mV/decade and on-to-off current ratio of 2.84 × 103 within a 1 V gate bias window. A one-dimensional transport model has been utilized to extract the band gap, interface state density, and the work function of the metal contacts. The model shows that SS degradation in BP MOSFETs occurs due to the ambipolar turn on of the carriers injected at the drain before the onset of purely thermionic-limited transport at the source. Th...

Temperature dependence and post-stress recovery of hot electron degradation effects in bipolar transistors

Abstract: The authors present the results of a study of the BJT (bipolar junction transistor) degradation process due to hot electrons with the goal of better understanding the degradation rate of current gain and noise characteristics under various temperature and bias conditions. Degradation was produced by reverse biasing (-4 V) the base emitter junction of bipolar transistors at various temperatures (-75 to 240 C), with stress periods ranging from 1/60th of a second to over 1000 h. Post-stress recovery of the degradation was studied using both high-temperature annealing and base-emitter forward biases. Two mechanisms which decrease the rate of degradation at higher temperatures are the reduction in the number of hot electrons at higher temperatures and the simultaneous annealing of the states produced by hot electrons at higher temperatures. Experimental data are used to develop a model description of the hot-electron-induced gain degradation process which includes both the temperature dependence of the number of hot electrons and the temperature dependence of a simultaneous repassivation process which is observed at high ambient temperatures. >

Short-circuit evaluation and overcurrent protection for SiC power MOSFETs

Abstract: In this paper, the short-circuit (SC) performance of two different SiC MOSFETs is experimentally investigated for different input voltages, biasing voltages and case temperatures. The measurement results are compared to simulations, and a good agreement is achieved. For fault handling, two different overcurrent protection (OCP) circuits are designed and applied to the SiC MOSFETs. The desaturation method is successfully tested with a hardware solution substituting the blanking time delay. The second method is based on sensing the voltage drop across the parasitic inductance at the source pin. The experimental and simulation results show that both OCP methods have the capability to detect a short circuit condition in the SiC MOSFET within safe SC time avoiding device failure.

STM/AFM nano-oxidation process to room-temperature-operated single-electron transistor and other devices

Abstract: Application of a scanning tunneling microscopy (STM) and an atomic force microscopy (AFM) to electron devices and an optical device are introduced in this paper. Using STM tip/AFM cantilever as a cathode, surfaces of a metal or a semiconductor are oxidized to form a few tens of nanometers-wide oxidized metal line or an oxidized semiconductor line, which works as an energy barrier for an electron. A single-electron transistor (SET), a photoconductive switch, and a high-electron mobility transistor (HEMT) are fabricated using this fabrication process. The fabricated SET operates even at high room temperatures and shows the large Coulomb gap and staircase of 200-mV periods and the large Coulomb oscillation periods of 406 mV. The fabricated photoconductive switch shows a ultra-fast response time, i.e., a full-width at half-maximum response of 380 fs at a bias voltage of 10 V. The drain current of HEMT was controlled by the oxidized semiconductor wire on the channel region formed by this fabrication process.