Biasing

About: Biasing is a research topic. Over the lifetime, 29422 publications have been published within this topic receiving 301035 citations.

Sub-micron high input voltage tolerant input output (I/O) circuit

Abstract: A method of providing bias voltages for input output connections on low voltage integrated circuits. As integrated circuit voltages drop generally so does the external voltages that those circuits can handle. By placing input and output devices, in series, external voltages can be divided between the devices thereby reducing junction voltages seen by internal devices. By using external voltages as part of a biasing scheme for integrated circuit devices, stress created by the differential between external voltages and internal voltages can be minimized. Additionally device wells can be biased so that they are at a potential that is dependant on the external voltages seen by the low voltage integrated circuit.

Synchronous sense amplifier with temperature and voltage compensated translator

Abstract: A bias control circuit for controlling the bias current in a sense amplifier circuit. The bias control circuit maintains a substantially constant bias current when the VCC supply voltage decreases, thereby maintaining the operating speed of the sense amplifier circuit at a predetermined level. The bias control circuit also increases the bias current as the temperature of the sense amplifier circuit increases, thereby maintaining the operating speed of the sense amplifier circuit at the predetermined level. Furthermore, the bias circuit controls the logic low voltage provided by the sense amplifier circuit to be less than a predetermined threshold value, even as the VCC supply voltage increases.

High radial confinement mode induced by dc limiter biasing in the HIEI tandem mirror.

Abstract: A transition from low to high radial confinement mode is triggered by biasing a limiter in the HIEI tandem mirror. Positive dc biasing gives rise to reduction of fluctuation level in density and potential in the periphery, drop of neutral line emission, and bifurcation in limiter current. After the transition, the plasma exhibits density rise in the bulk and steepening of the density gradient. Significant radial rotational shear is observed when the edge turbulence is suppressed by the biasing. The total feature shows similar characteristics of [ital L]- to [ital H]-mode transition observed in tokamak devices.

Method and apparatus for plasma processing with control of ion energy distribution at the substrates

Abstract: In plasma processing, a bias voltage is provided from a power supply through a DC blocking capacitor to a platform on which a substrate to be treated is supported within a plasma reactor. The periodic bias voltage applied to the DC blocking capacitor has a waveform comprised of a voltage pulse peak followed by a ramp down of voltage from a first level lower than the pulse peak to a second lower level, the period of the bias waveform and the ramp down of voltage in each cycle selected to compensate for and substantially cancel the effect of ion accumulation on the substrate so as to maintain a substantially constant DC self-bias voltage on the substrate between the voltage pulse peaks. The waveform may include a single voltage pulse peak followed by a ramp down in voltage during each cycle of the bias voltage such that the ion energy distribution function at the substrate has a single narrow peak centered at a selected ion energy. The waveform may also comprise two voltage pulse peaks each followed by a ramp down of voltage selected to provide a bias voltage at the substrate comprising two voltage peaks during each cycle with DC self-bias voltages following each pulse peak at two different substantially constant DC levels, resulting in an ion energy distribution function at the substrate that includes two peaks of ion flux centered at two selected ion energies with substantially no ion flux at other ion energies. The ion energy distribution function may thus be tailored to best accommodate the desired plasma treatment process and can be used to reduce the effects of differential charging of substrates.

Recent results on metalorganic vapor phase epitaxially grown HgCdTe heterostructure devices

Abstract: The ability to grow complex multilayer structures in Hg1-xCdxTe by epitaxial techniques has made it possible to produce a range of new devices such as infrared LEDs, lasers, and two-color infrared detector arrays. The devices described here, however, are designed to operate at temperatures above 145K and include both infrared sources and detectors. Three layer ppn structures, where the underlined symbols mean wider gap, have close to Auger limited RoAs at temperatures above 145K. Under reverse bias, the devices exhibit Auger suppression leading to useful detectivities at room temperature. The diodes exhibit forward biased electroluminescence at room temperature although the efficiency of this emission is found to fall rapidly as the peak wavelength is increased toward 9 μm due to increased Auger recombination rates. By reverse biasing them, however, the devices show negative luminescence as a result of reducing the electron and hole densities below their thermal equilibrium value. The diode emitters have a higher quantum efficiency when used in this mode due to Auger suppression of the dark current.