Biasing

About: Biasing is a research topic. Over the lifetime, 29422 publications have been published within this topic receiving 301035 citations.

A 250 mV 7.5 μW 61 dB SNDR SC ΔΣ Modulator Using Near-Threshold-Voltage-Biased Inverter Amplifiers in 130 nm CMOS

Abstract: An ultra-low voltage switched-capacitor (SC) ΔΣ converter running at a record low supply voltage of only 250 mV is introduced. System level aspects are discussed and special circuit techniques described, that enable robust operation at such a low supply voltage. Using a SC biasing approach, inverter-based integrators are realized with overdrives close to the transistor threshold voltage Vth while compensating for process, voltage and temperature (PVT) variation. Biasing voltages are generated on-chip using a novel level shifting circuit, that overcomes headroom limitations due to saturation voltage Vsat. With an oversampling ratio (OSR) of 70 and a sampling frequency (fS) of 1.4 MHz at 250 mV power supply the converter achieves 61 dB SNDR in 10 kHz bandwidth while consuming a total power of 7.5 μW.

Enhanced tunnel magnetoresistance at high bias voltage in double-barrier planar junctions

Abstract: Single Co/Al2O3/NiFe and double Co/Al2O3/Co/Al2O3/NiFe planar tunnel junctions were grown by sputtering and subsequently patterned in a four-step process using optical lithography. The Al2O3 barriers are formed by radio frequency plasma oxidation of 1.5 nm aluminum layers. The double junctions exhibit three clear resistance levels depending on the relative configuration of the magnetizations. Both single and double junctions exhibit maximum magnetoresistance (MR) ratios above 10% at room temperature and 20% at 30 K and a decrease of MR with increasing bias voltage. With regard to its low bias value, the MR is reduced by a factor of 2 at 0.26 V for the single junctions and at values above 0.8 V for the double junctions. The decay of the MR of double junctions with bias voltage is significantly slower than expected from two independent junctions in series.

A Review of Sharp-Switching Devices for Ultra-Low Power Applications

Abstract: The reduction of the supply voltage is standard MOSFETs is impeded by the subthreshold slope, which cannot be lowered below 60 mV/decade, even in ideal fully-depleted devices. We review selected CMOS-compatible devices capable of switching more abruptly than MOSFETs, and discuss their merits and limitations. Tunneling FETs (TFETs) are reverse-biased gated PIN diodes where the gate controls the electric field in the interband tunneling junction. Technological solutions for improved performance will be described, including alternative channel materials and geometries, as well as a proposed paradigm shift of increasing the current drive by internal amplification in the bipolar-enhanced TFET. Other emerging sharp-switching mechanisms are reviewed, including the abrupt change in the polarization of ferroelectric materials, mechanical contact in nano-electro-mechanical systems, energy filtering of injected carriers, etc. Recently proposed band modulation feedback transistors are conceptually different from MOSFETs or TFETs. They have similar gated-diode configuration, but are operated in forward-bias mode. Electrostatic barriers are formed (via gate biasing) to prevent electron/hole injection into the channel until the gate or drain bias reaches a turn-on value. Due to bandgap modulation along the channel, these devices can switch abruptly (<1 mV/decade) to a high current.