Biasing

About: Biasing is a research topic. Over the lifetime, 29422 publications have been published within this topic receiving 301035 citations.

Current-voltage characteristics of carbon nanotubes with substitutional nitrogen

Abstract: We report ab initio analysis of current-voltage (I-V) characteristics of carbon nanotubes with nitrogen substitution doping. For zigzag semiconducting tubes doping with a single N impurity increases current flow and, for small radii tubes, narrows the current gap. Doping a N impurity per nanotube unit cell generates a metallic transport behavior. Nonlinear I-V characteristics set in at high bias and a negative differential resistance region is observed for the doped tubes. These behaviors can be well understood from the alignment/misalignment of the current carrying bands in the nanotube leads due to the applied bias voltage. For a armchair metallic nanotube, a reduction of current is observed with substitutional doping due to elastic backscattering by the impurity.

Electronic Circuit, Method of Driving Electronic Circuit, Electro-Optical Device, Method of Driving Electro-Optical Device, and Electronic Apparatus

Abstract: To provide an electronic circuit, a method of driving the electronic circuit, an electro-optical device, a method of driving the electro-optical device and an electronic apparatus, capable of reducing deviations in threshold voltages of transistors. A pixel circuit 20 is constructed with three transistors of a driving transistor Trd, an adjusting transistor Trc and a switching transistor Trs, and two capacitors of a first capacitor C 1 and a second capacitor C 2 . Further, a source of the adjusting transistor Trc is connected to a voltage supply line VL for supplying a driving voltage Vdd through a control transistor Q in common with the sources of the adjusting transistors Trc of other pixel circuits, the voltage supply line VL being provided at the right end side of an active matrix part.

Charging in Dielectricless Capacitive RF-MEMS Switches

Abstract: This paper presents results on high lifetime RF microelectromechanical (RF-MEMS) dielectricless capacitive switches. Using air gap variation only, these RF MEMS capacitive switches achieve a capacitance ratio of 9, associated with small residual charging. The reliability of the switch has been studied, pull-in and pull-out voltages shifts have been observed, modeled and validated with good agreement between model and measurements for a switch held for one month in the down state. The dependence of charging mechanism to the biasing signal is also presented by applying unipolar and bipolar waveforms with different duty cycles. Charging can be modeled using a simple Curie-Von Schweidler equation. It is shown that the duty cycle of the bias signal is strongly accelerating switch failure, and that using bipolar signals improves the lifetime of these switches by several orders of magnitude. The projected lifetime of current RF-MEMS dielectricless switches held in the down state using bipolar signals is several tens of years.

Substrate processing method

Abstract: A substrate processing apparatus capable of improving a processing controllability in an etching process is provided. The substrate processing apparatus ( 10 ) includes a depressurized processing room ( 11 ); a susceptor ( 12 ) that is provided in the processing room ( 11 ) and configured to mount a wafer (W) thereon; a HF high frequency power supply ( 18 ) configured to apply a high frequency voltage for plasma generation to the susceptor ( 12 ); a LF high frequency power supply ( 20 ) configured to apply a high frequency voltage for a bias voltage generation to the susceptor ( 12 ); and a DC voltage applying unit ( 23 ) configured to apply a DC voltage of a rectangle-shaped wave to the susceptor ( 12 ).

Structures and methods for selectively applying a well bias to portions of a programmable device

Abstract: Structures and methods for selectively applying a well bias to only those portions of a PLD where such a bias is necessary or desirable, e.g., applying a positive well bias to transistors on critical paths within a user's design. A substrate for an integrated circuit includes a plurality of wells, each of which can be independently and programmably biased with the same or a different well bias voltage. In one embodiment, FPGA implementation software automatically determines the critical paths and generates a configuration bitstream that enables positive well biasing only for the transistors participating in the critical paths, or only for programmable logic elements (e.g., CLBs or lookup tables) containing those transistors. In another embodiment, negative well biasing is selectively applied to reduce leakage current.