Showing papers on "Binary number published in 1973"

On arithmetic weight for a general radix representation of integers (Corresp.)

Abstract: In this correspondence we define a "nonadjacent form" for integers in an arbitrary radix r > 1 . This form is proved to be unique, and the arithmetic weight of an integer is shown to be equal to the number of nonzero terms in the form. Two algorithms are presented for the computation of this form. If r = 2 , our form coincides with the well-known modified binary nonadjacent form.

Digital sequence detector using multiple samples during each digit time period

Abstract: An asynchronous detector for detecting a binary word within a train of signals, wherein the train of signals and the binary word each contain bits, and each bit has a predetermined period. The detector includes a clock which develops a number of clock pulses within the time inverval of a bit period. The train of signals is coupled to the input of a shift register which is responsive to each clock pulse to shift the contents of each stage in the shift register, and enter a binary signal, corresponding to the signal in the train of signals coupled to the input, into the first stage. A memory circuit stores a binary word corresponding to the binary word to be recognized. A comparison circuit compares the binary signals in the shift register and the binary word in the memory circuit between clock pulses. If a predetermined number of correlations occur between the memory circuit contents and the shift register contents, the comparison circuit will develop a detection signal.

Static and Dynamic Numerical Characteristics of Floating-Point Arithmetic

Abstract: The appearance of hexadecimal floating-point arithmetic systems has prompted a continuing discourse on the relative numerical merits of various choices of base. Until lately this discourse has centered around the static properties of the floating-point representation of numbers, and has primarily concerned only binary and hexadecimal representations. Recent events may change this discourse considerably. A third numerically attractive alternative for the choice of base has been proposed, and a comparison of the dynamic numerical properties of floating-point arithmetic systems has been completed. This paper surveys these recent events and summarizes our current knowledge of the numerical characteristics of floating-point arithmetic systems.

A statistical study of the accuracy of floating point number systems

Abstract: This paper presents the statistical results of tests of the accuracy of certain arithmetic systems in evaluating sums, products and inner products, and analytic error estimates for some of the computations. The arithmetic systems studied are 6-digit hexadecimal and 22-digit binary floating point number representations combined with the usual chop and round modes of arithmetic with various numbers of guard digits, and with a modified round mode with guard digits. In a certain sense, arithmetic systems differing only in their use of binary or hexadecimal number representations are shown to be approximately statistically equivalent in accuracy. Further, the usual round mode with guard digits is shown to be statistically superior in accuracy to the usual chop mode in all cases save one. The modified round mode is found to be superior to the chop mode in all cases.

A universal digital data scrambler

Abstract: Analyses in the literature of digital communications often presuppose that the digital source is “white,” that is, that it produces stochastically independent equiprobable symbols. In this paper we show that it is possible to “whiten” to any degree all the first- and second-order statistics of any binary source at the cost of an arbitrarily small controllable error rate. Specifically, we prove that the self-synchronizing digital data scrambler, already shown effective at scrambling strictly periodic data sources, will scramble any binary source to an arbitrarily small first- and second-order probability density imbalance δ if (i) the source is first passed through the equivalent of a symmetric memoryless channel with an arbitrarily small but nonzero error probability ∊, and (ii) the scrambler contains M stages where Some interpretations and applications of this result are included.

Coherent potential approximation for nonmagnetic weak-coupling superconducting alloys

Abstract: With the aid of the Nambu formalism the coherent potential approximation (CPA) is applied to superconducting binary alloys of arbitrary composition. It will be shown that an approximation in which the order parameter Δ does not depend on the space variable leads to a generalized Abrikosov relation, simplifying the CPA equations considerably. This relation yields the BCS equation forTc, however, the density of states is determined by the CPA.

Pipeline array for square-root extraction

Abstract: Pipelining an arithmetic process is a well known technique for improving the computation speed of the arithmetic algorithm. In the letter is proposed a pipeline version of the array for the extraction of square roots of binary numbers. It is shown that a significant speed improvement (on a throughout basis) can result by this modification of the conventional logic arrays.

Binary coded digital frequency synthesis

Abstract: Any one of a group of discrete frequencies, each offset from a starting frequency by a respective number of predetermined fixed frequency intervals, is generated selectively using only two driving frequencies, chosen in a sequence according to a binary coded representation of the number corresponding to the selected frequency. The synthesis is readily adaptable to various numerical radices, and to any number of digital orders by an iterative technique realizable with a cascade arrangement of identical modules.

The structure and superconducting behavior of some V-Al binary alloys and of ternary ‘β-W’ alloys based on the V-Al system

Abstract: Results are given for the structure and superconducting behavior of binary V-Al alloys and of ‘β-W’ ternary alloys based on V3X-V3Al where X=Si, Ge, Sn, Ga, and Sb. No ‘β-W’ phase was observed in the binary V-Al system at 25 at. % Al. Instead the alloys were bcc. However, some evidence was found for a martensitic transformation in alloys rapidly quenched from high temperatures. Solid solubility of Al in the ‘β-W’ phase V3X was restricted as would be expected from the absence of a binary ‘β-W’ V3Al phase. The superconducting transition temperatures varied systematically with composition in a manner consistent with the phase structure of the alloys.

Precision digital interpolator

Abstract: A clock signal of a first frequency is applied to a first binary counter. The first counter provides an output signal after counting to a predetermined binary number. The output signal causes a second clock signal, of a second frequency, to be applied to a second counter. The second counter provides a second output signal after counting to a binary number which is the complement of the predetermined binary number. The temporal position of the second output signal is varied, in steps equal to the difference in the periods of the two clocks, by varying the predetermined binary number.

Code converter system and method

Abstract: A system and method for converting binary coded decimal numbers to binary and for converting binary to binary coded decimal. Read only memories include a programmed mapping between the binary and binary coded decimal codes. Input to the read only memory in one code is converted to an output in the other code. The outputs from the read only memories are summed to produce the desired result.

Fault testing of logic circuits

Abstract: A method and apparatus for detecting faults in logic circuits requires the retention of a single binary reference word for each circuit type to be tested. Responsive to a sequence of input binary words preselected to reveal potential faults of the circuit under test, a single binary word is derived, as a figure of merit, by adding the sequence of output binary words produced by the circuit under test. Comparison of the single binary word generated by the circuit under test with the reference binary word which is characteristic of a properly functioning circuit of the same type provides the desired fault indication. Economies of time and apparatus are thus realized.

Data reordering system

Abstract: A combination of delays and programmed switches is used to convert serial data in reverse binary order to normal binary order or to convert data in normal binary order to data in reverse binary order.

Binary bypassable arithmetic linear module

Abstract: A bypassable module for performing an arithmetic linear function is disclosed. The module utilizes well-known binary elements to construct a novel combination thereof that given three multibit binary input signals C, D, X and the single bit binary input signal b generates the alternative output functions

Seismic playback system

Abstract: Hereinafter disclosed is methodology and apparatus for converting wide dynamic amplitude range digital data recorded in floating point digital word form, comprising a binary coded mantissa and a binary coded exponent, to an analog signal, or oscillogram, of compressed dynamic amplitude range. The digital word, occupying a number of binary bit positions, is, in algebraic form, ±AG.sup.-E ; where A represents the mantissa, or argument, G represents the base, or radix, of the number system used and E represents the exponent. Since the base G is constant at 8, for example, the only binary bits that need to be recorded are those representing the mantissa A and the exponent E. In reconverting the digital data to analog form for making an oscillogram, or wiggle trace, it is proposed to compress the dynamic range and, yet, at the same time avoid introducing serious distortion. Apparatus for performing the aforesaid changes, among other things, is disclosed.

Seismic playback/monitor system

Abstract: Hereinafter disclosed is methodology and apparatus for converting wide dynamic amplitude range digital data recorded in floating point digital word form, comprising a binary coded mantissa and a binary coded exponent, to an analog signal or visible display, such as an oscillogram, or ''''wiggle trace,'''' of selectively compressed dynamic amplitude range The digital word occupying a number of binary digit, or bit, positions is, in algebraic form, + OR - AG E; wherein A represents the mantissa or argument, G represents the base, or radix, of the number system employed, and E represents the exponent Since the radix G is constant, the only bits that have to be recoreded are those bits representing the mantissa A and the exponent E In reconverting the aforementioned digital data to analog form data for making an oscillogram, wiggle trace or other visible display, the invention involves the selective compression of the dynamic amplitude range of the analog signals and, at the same time, avoiding the introduction of serious distortions

Code multiplex method using a binary channel

Abstract: A method of transmitting and receiving data transmitted via a binary transmission channel according to a code multiplex method wherein a plurality of data sources transmit data in the form of a receiver-specific coded binary sequence per data bit. At each of the data sources, the respective coded binary sequence is transformed to a transformed coded binary sequence which changes its polarity per bit clock pulse whenever a bit of the specific original coded binary sequence is present. The plurality of transformed coded binary sequences are added in a mod 2 adder to form a binary sequence which corresponds to the mod 2 sum signal of all of the transformed coded binary sequences, and the mod 2 sum signal is transmitted via the transmission channel as a binary sequence. At the receiving end, each receiver detects its specific binary coded signal in the mod 2 sum signal and regenerates the data bits.

Correlated Clutter and Resultant Properties of Binary Signals

Abstract: A simple Markov process model of binary, digitized radar clutter returns is assumed. Probability distributions for the number of hits in n observations are developed for small n with a binary parameter describing the process derived for Rayleigh distributed clutter. Tables of distributions are included, along with an example to show the effects of correlation on the false-alarm probabilities of a sliding-window detector.

A Note on Conditional-Sum Addition for Base - 2 Systems

Abstract: Conditional-sum addition in a -2 base system and its comparison with normal binary conditional-sum addition is discussed. It is found that approximately 2.0 to 2.5 times as much hardware is required for this high-speed addition method in the negative binary system as compared to the positive binary system.

Aspects of design for binary key models

Abstract: The idea of keys is explained for data where each unit has a binary response and the units are labelled by a set of k binary properties. The model is especially realistic for certain biological applications and is relevant to the medical diagnosis problem of predicting the presence or absence of a disease by means of a vector of binary symptoms. The results of the paper in particular concern the choice of units to maximize design utility. For the very simplest key model, optimum designs are given which closely resemble certain error correcting codes.

Odd/even boundary address alignment system

Abstract: Computer handling a binary representation of an index for an entry in a computer table to determine if the index is an odd or even multiple of the number of addressable units (i.e. bytes, characters, or words) in the length of an entry in the table. A mask field is generated and used in making the odd or even determination by identifying the bit position of the lower-order one bit value in the binary representation of the entry length. If the index is determined to be an odd multiple, an adjustment is made to the number of addressable units in the index prior to its use in generating a next index, so that the adjusted index is an even multiple. No adjustment is provided to the current index if it is determined to be an even multiple. When used within a binary search, the address generated to represent the next index will be boundary aligned to the beginning of a table entry. The next index is generated by a right shift (i.e. a shift of one bit position toward its lowest order bit) of the adjusted binary number representation of the current index. The even multiple adjustment assures that no remainder can be generated by a shift operation, which provides a remainderless binary divide-by-two.