Showing papers on "Bit error rate published in 1971"

The Probability of Error Due to Intersymbol Interference and Gaussian Noise in Digital Communication Systems

Abstract: The error rate or the probability of error is an important parameter in the design of digital communication systems. In this paper a Gram-Charlier expansion is used to compute the error rate in the presence of intersymbol interference and additive Gaussian noise. The method presented is very useful for numerical computations. We also present expressions for the truncation errors. Rigorous proofs are presented in the Appendix.

A New Coding Technique for Asynchronous Multiple Access Communication

Abstract: A new approach to asynchronous multiple access communications is presented. The technique, employing orthogonal convolutional coding and Viterbi decoding, is described and its performance characteristics are derived for the case in which other-user interference is the only source of noise. Results indicate that the technique is quite efficient in terms of the number of users supportable at a specified bit error rate in a given system bandwidth. Furthermore, the results of a design study are described, showing that the technique is a practical one to implement.

Codes for Error Correction in High-Speed Memory Systems—Part I: Correction of Cell Defects in Integrated Memories

Abstract: This paper introduces two schemes to correct bit errors caused by defective memory cells in high-speed random-access memory systems. The schemes are addressed to word-organized memories produced by the integrated technologies. One of the two schemes calls for encoding of input information and the other does not. The schemes are simple, economical for the technologies concerned, and exhibit a regularity which makes it possible to fabricate the necessary additional hardware within the same technology.

Delta modulation system with randomly timed multiplexing capability

Abstract: The principal feature of this multiplexed delta modulation system is its ability to introduce digital data or other lowfrequency information signals into a high-frequency digitized signal stream at random times, without loss of synchronization or undue degradation of the high-frequency signal. When a lowfrequency data bit is to be introduced into a bit stream representing the high-frequency signal, such a bit first is converted into a multibit code word W1 or W2, depending upon whether a 1 or 0 data bit is to be transmitted. The code word W1 or W2 they may be inserted into the transmitted bit stream at any random time, replacing a bit pattern of corresponding length in said stream which otherwise would represent the coincident portion of the high-frequency signal. The code word W1 or W2 is recognized as a data bit representation at the receiver regardless of where it occurs in the bit stream. If a bit pattern identical with W1 or W2, but not representing a low-frequency data bit, should appear by change in the high-frequency digitized signal, such a bit pattern is altered prior to its transmission so that it will not be mistaken for a data bit at the receiver. The delta modulation process automatically is adjusted to compensate for: (1) any difference between the numerical weight of an introduced bit pattern W1 or W2 and the numerical weight of the bit pattern which it replaces, or (2) in the case of a bit pattern fortuitously identical with W1 or W2, the difference between the respective numerical weights of such a bit pattern before and after its alteration.

Burst and single error detection and correction system

Abstract: A data communication system has a source of data. The data is divided into data segments. When a burst error is indicated, the location of the burst error is determined and the burst error is corrected. After the burst error has been corrected, the data segment is checked for single bit errors.

Process and circuit arrangement for the measuring of the frequency of bit erros and block errors with optional block length in the transmission of binary coded data characters

Abstract: A process and apparatus are described for measuring the frequency of bit errors and block errors with optional block length in the transmission of binary coded data characters, in which at the sending station, a certain test text with fixed text cycle length is sent out and in which the error measurement takes place at a receiving station.

Data transmission over pulse code modulation channels

Abstract: An arrangement to substitute data bits for and extract these data bits from at least one channel of a PCM-TDM intelligence (voice) communication system. The data bits do not have to be synchronized with the normal PCM bit stream. The normal PCM bit stream employs n bit positions, one bit position being employed for signalling and/or synchronization and (n-1) bit positions being employed for conveying intelligence. Data bits equal to or less than (n-2) are substituted for intelligence in a selected PCM channel. The data bits are grouped at one end of the (n-1) bit positions and a marker bit is inserted into a bit position adjacent the last data bit. The location of the marker bit in the (n-1) bit positions indicates the number and repetition rate of the data bits. The position of the marker bit within the (n-1) bit positions is employed in the receiver to extract the data bits from the PCM bit stream and to return the data bits to their original repetition rate for further utilization.

Cascade-feedback analog to digital encoder with error correction

Abstract: A coder for converting an input analog signal into a digital output signal containing first, second and other bit signals, includes a first coding circuit activated by the input analog signal to generate the output of the first coding circuit, a second coding circuit activated by the first bit signal to generate the second bit signal judged at a first time point, a feedback coding circuit energized by the output of the second coding circuit to generate the other bit signals; the first, second and other bit signal constituting the digital signal at an output terminal; the second and other bit signals subject to error due to the level of the output of the second coding circuit at the first time point; and a bit level comparison circuit comparing the second bit signal judged at the first time point and at a second time point succeeding the first time point for producing a comparison signal to correct the second and other bit signals, whereby the first bit signal and the corrected second and other bit signals after the second time point are included in the digital signal at the output terminal.

Design and Evaluation of a Generalized Burst-Trapping Error Control System

Abstract: An experimental error control system utilizing a generalized burst-trapping error control technique has been designed, built, and evaluated. Code parameters were chosen such that bursts as long as 1000 bits are likely to be corrected in the presence of a background random bit error rate as large as 3 \times 10^{-3} . In this paper we give a brief description of generalized burst-trapping codes, we discuss the design and implementation of the decoder, and we describe the performance evaluation.

Estimation of Bit Error Rates for Narrow-Band Digital Communication in the Presence of Atmospheric Radio Noise Bursts

Abstract: The lack of representativeness in the existing analysis concerning the problem of estimation of bit error rates for narrowband digital communications in the presence of atmospheric burst noise, arising due to the omission of consideration of the structure and time parameters of the noise bursts, is emphasized. A method of analysis in which these parameters can suitably be introduced is indicated. Areas in which further noise data is to be acquired are identified.

Statistical Bit Synchronization in Digital Communications

Abstract: A Kalman filtering algorithm has been applied to the problem of bit synchronization in an M -ary communication system. No synchronizing signal is assumed present; the approach is arranged to determine timing information from the transitions occurring in a pseudorandom sequence of symbols, generated with a fixed but initially unknown bit rate. Procedural steps subdivide naturally into an acquisition phase (block data processing) and a track mode (recursion). The method is supported by sample binary frequency-shift keying (FSK) simulation results, obtained from the output of a 4-pole Butterworth digital filter fed by a random MARK/SPACE sequence plus additive Gaussian noise. Results demonstrate accurate determination of both the bit phase reference time and the bit period. The scope is restricted to high SNR digital communication systems, for which acceptable error rates are obtainable without sophisticated decoding schemes.

Key-operated teleprinter

Abstract: Key-operated teleprinter for the transmission of code symbols by the start-stop method, wherein each key triggers a further bit which has a first value and a second value for letters and numerals respectively, the bit combination and further bit being supplied to a reserve store adapted to store same and a master clock for controlling transmission of said bit combinations and associated further bits from the reserve store to the transmitter sotre, also for controlling the output circuit which transmits the bit combination to the transmission of a bit combination to said line if the further bit transmitted together with the bit combination is different from that transmitted with the preceding bit combination and means for producing an operating character for shifting the receiver from letters to numerals or vice versa.

Performance results for a hybrid coding system.

Abstract: Results of computer simulation studies of the hybrid pull-up bootstrap decoding algorithm, using a constraint length 24, nonsystematic, rate 1/2 convolutional code for the symmetric channel with both binary and eight-level quantized outputs. Computational performance was used to measure the effect of several decoder parameters and determine practical operating constraints. Results reveal that the track length may be reduced to 500 information bits with small degradation in performance. The optimum number of tracks per block was found to be in the range from 7 to 11. An effective technique was devised to efficiently allocate computational effort and identify reliably decoded data sections. Long simulations indicate that a practical bootstrap decoding configuration has a computational performance about 1.0 dB better than sequential decoding and an output bit error rate about .0000025 near the R sub comp point.

Two Approaches for Increasing Storage Density in Modern Digital Computing Systems

Abstract: Modern digital computing systems are primarily limited in how densely information may be recorded on the magnetic storage elements by the manner in which the information is retrieved (detected) from these storage facilities. Current systems store information at a density around 1000 bits per inch (bit/in); system elements, other than the detection process, could easily handle densities in excess of 3000 bit/in. This paper describes the signal present at the output of the read-write head and suggests two systems by which detection at high bit densities may be accomplished. The error rate associated with each system is given and the results are applied to a computer system using a magnetic disk file as the storage element. It is demonstrated that these detection procedures can meet the widely accepted standard of one error in one billion bits at reasonable signal-to-noise ratios.

High Speed, High Density Digital Recording

Abstract: The wide signal bandwidth attainable with the 960 inch per second longitudinal tape transport, combined with high density recording at about 20,000 bits per inch provide a multichannel 20 Megabit/second recorder with a 64:1 time expansion capability. The tape transport mechanism consists of two solid, flangeless tape packs placed in direct contact with a large capstan. Stability of the tape movement is achieved by use of a control system which provides instantaneousadjustment of the pack contact forces as a function of direction, velocity, acceleration and pack diameter. This results in full versatility when programming the transport motion. The high density digital signal is phase encoded and processed through the recorder as an analog signal, then is demodulated using a phase lock loop to recover the clock. The sample and hold phase comparator controls a VCO at a fixed nominal frequency, followed by a divider. This configuration permits operation at all bit frequencies in a 128:1 range and allows the clock to coast through a 50 bit dropout without bit slip. Demonstrated bit error rate is 10 maximum.

Average Error Rate of Markov Channel

Abstract: In a recent paper, P. McManamon derived the average bit error rate for the simple partitioned Markov channel. This correspondence derives the same result by a simpler and more straightforward way.

Properties of a Class of Signaling Waveforms for Digital Phase Modulation

Abstract: This paper is concerned with the performance of partially coherent digital phase modulation (DPM) systems employing a class of binary signaling waveforms containing a zero crossing within each bit period. The class of waveforms includes the Manchester II bit code and sinusoidal bit code as well as an infinite number of other nonrectangular bit shapes. We wish to study the tradeoff between the RF bandwidth and the probability of bit error P(E) as a function of bit shape. The equation describing the RF power spectrum for these DPM signals is obtained using a two-dimensional Fourier transform technique and is shown to contain both continuous and discrete terms. The spectra are evaluated numerically for a typical bit rate showing the effect of different bit shapes. An original technique is presented for including the effects of modulation interference on the extraction of the carrier-phase reference from these DPM signals using a partially coherent phase-locked-loop receiver. The expression for the P(E) is obtained for the class of signals and is a function of the phase deviation angle and the modulation interference. This expression is evaluated numerically to obtain sets of curves that show the optimal phase deviation angles for five members of the class. The tradeoff between the RF bandwidth and the P(E) is given by a curve that indicates the increase in P(E) for a reduction in RF bandwidth as a function of the bit shape.